1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mcpu=corei7 -mtriple=i686-- -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=SSE42 3; RUN: llc < %s -mtriple=i686-- -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=NOSSE 4 5; 64-bit load/store on x86-32 6; FIXME: The generated code can be substantially improved. 7 8define void @test1(i64* %ptr, i64 %val1) { 9; SSE42-LABEL: test1: 10; SSE42: # %bb.0: 11; SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax 12; SSE42-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 13; SSE42-NEXT: movlps %xmm0, (%eax) 14; SSE42-NEXT: lock orl $0, (%esp) 15; SSE42-NEXT: retl 16; 17; NOSSE-LABEL: test1: 18; NOSSE: # %bb.0: 19; NOSSE-NEXT: pushl %ebp 20; NOSSE-NEXT: .cfi_def_cfa_offset 8 21; NOSSE-NEXT: .cfi_offset %ebp, -8 22; NOSSE-NEXT: movl %esp, %ebp 23; NOSSE-NEXT: .cfi_def_cfa_register %ebp 24; NOSSE-NEXT: andl $-8, %esp 25; NOSSE-NEXT: subl $8, %esp 26; NOSSE-NEXT: movl 8(%ebp), %eax 27; NOSSE-NEXT: movl 12(%ebp), %ecx 28; NOSSE-NEXT: movl 16(%ebp), %edx 29; NOSSE-NEXT: movl %edx, {{[0-9]+}}(%esp) 30; NOSSE-NEXT: movl %ecx, (%esp) 31; NOSSE-NEXT: fildll (%esp) 32; NOSSE-NEXT: fistpll (%eax) 33; NOSSE-NEXT: lock orl $0, (%esp) 34; NOSSE-NEXT: movl %ebp, %esp 35; NOSSE-NEXT: popl %ebp 36; NOSSE-NEXT: .cfi_def_cfa %esp, 4 37; NOSSE-NEXT: retl 38 store atomic i64 %val1, i64* %ptr seq_cst, align 8 39 ret void 40} 41 42define i64 @test2(i64* %ptr) { 43; SSE42-LABEL: test2: 44; SSE42: # %bb.0: 45; SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax 46; SSE42-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 47; SSE42-NEXT: movd %xmm0, %eax 48; SSE42-NEXT: pextrd $1, %xmm0, %edx 49; SSE42-NEXT: retl 50; 51; NOSSE-LABEL: test2: 52; NOSSE: # %bb.0: 53; NOSSE-NEXT: pushl %ebp 54; NOSSE-NEXT: .cfi_def_cfa_offset 8 55; NOSSE-NEXT: .cfi_offset %ebp, -8 56; NOSSE-NEXT: movl %esp, %ebp 57; NOSSE-NEXT: .cfi_def_cfa_register %ebp 58; NOSSE-NEXT: andl $-8, %esp 59; NOSSE-NEXT: subl $8, %esp 60; NOSSE-NEXT: movl 8(%ebp), %eax 61; NOSSE-NEXT: fildll (%eax) 62; NOSSE-NEXT: fistpll (%esp) 63; NOSSE-NEXT: movl (%esp), %eax 64; NOSSE-NEXT: movl {{[0-9]+}}(%esp), %edx 65; NOSSE-NEXT: movl %ebp, %esp 66; NOSSE-NEXT: popl %ebp 67; NOSSE-NEXT: .cfi_def_cfa %esp, 4 68; NOSSE-NEXT: retl 69 %val = load atomic i64, i64* %ptr seq_cst, align 8 70 ret i64 %val 71} 72 73; Same as test2, but with noimplicitfloat. 74define i64 @test3(i64* %ptr) noimplicitfloat { 75; CHECK-LABEL: test3: 76; CHECK: # %bb.0: 77; CHECK-NEXT: pushl %ebx 78; CHECK-NEXT: .cfi_def_cfa_offset 8 79; CHECK-NEXT: pushl %esi 80; CHECK-NEXT: .cfi_def_cfa_offset 12 81; CHECK-NEXT: .cfi_offset %esi, -12 82; CHECK-NEXT: .cfi_offset %ebx, -8 83; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi 84; CHECK-NEXT: xorl %eax, %eax 85; CHECK-NEXT: xorl %edx, %edx 86; CHECK-NEXT: xorl %ecx, %ecx 87; CHECK-NEXT: xorl %ebx, %ebx 88; CHECK-NEXT: lock cmpxchg8b (%esi) 89; CHECK-NEXT: popl %esi 90; CHECK-NEXT: .cfi_def_cfa_offset 8 91; CHECK-NEXT: popl %ebx 92; CHECK-NEXT: .cfi_def_cfa_offset 4 93; CHECK-NEXT: retl 94 %val = load atomic i64, i64* %ptr seq_cst, align 8 95 ret i64 %val 96} 97 98define i64 @test4(i64* %ptr) { 99; SSE42-LABEL: test4: 100; SSE42: # %bb.0: 101; SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax 102; SSE42-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 103; SSE42-NEXT: movd %xmm0, %eax 104; SSE42-NEXT: pextrd $1, %xmm0, %edx 105; SSE42-NEXT: retl 106; 107; NOSSE-LABEL: test4: 108; NOSSE: # %bb.0: 109; NOSSE-NEXT: pushl %ebp 110; NOSSE-NEXT: .cfi_def_cfa_offset 8 111; NOSSE-NEXT: .cfi_offset %ebp, -8 112; NOSSE-NEXT: movl %esp, %ebp 113; NOSSE-NEXT: .cfi_def_cfa_register %ebp 114; NOSSE-NEXT: andl $-8, %esp 115; NOSSE-NEXT: subl $8, %esp 116; NOSSE-NEXT: movl 8(%ebp), %eax 117; NOSSE-NEXT: fildll (%eax) 118; NOSSE-NEXT: fistpll (%esp) 119; NOSSE-NEXT: movl (%esp), %eax 120; NOSSE-NEXT: movl {{[0-9]+}}(%esp), %edx 121; NOSSE-NEXT: movl %ebp, %esp 122; NOSSE-NEXT: popl %ebp 123; NOSSE-NEXT: .cfi_def_cfa %esp, 4 124; NOSSE-NEXT: retl 125 %val = load atomic volatile i64, i64* %ptr seq_cst, align 8 126 ret i64 %val 127} 128