1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=avx | FileCheck %s 3 4@x = common global <8 x float> zeroinitializer, align 32 5@y = common global <4 x double> zeroinitializer, align 32 6@z = common global <4 x float> zeroinitializer, align 16 7 8define void @zero128() nounwind ssp { 9; CHECK-LABEL: zero128: 10; CHECK: ## %bb.0: 11; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0 12; CHECK-NEXT: movq _z@{{.*}}(%rip), %rax 13; CHECK-NEXT: vmovaps %xmm0, (%rax) 14; CHECK-NEXT: retq 15 store <4 x float> zeroinitializer, <4 x float>* @z, align 16 16 ret void 17} 18 19define void @zero256() nounwind ssp { 20; CHECK-LABEL: zero256: 21; CHECK: ## %bb.0: 22; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0 23; CHECK-NEXT: movq _x@{{.*}}(%rip), %rax 24; CHECK-NEXT: vmovaps %ymm0, (%rax) 25; CHECK-NEXT: movq _y@{{.*}}(%rip), %rax 26; CHECK-NEXT: vmovaps %ymm0, (%rax) 27; CHECK-NEXT: vzeroupper 28; CHECK-NEXT: retq 29 store <8 x float> zeroinitializer, <8 x float>* @x, align 32 30 store <4 x double> zeroinitializer, <4 x double>* @y, align 32 31 ret void 32} 33 34define void @ones([0 x float]* nocapture %RET, [0 x float]* nocapture %aFOO) nounwind { 35; CHECK-LABEL: ones: 36; CHECK: ## %bb.0: ## %allocas 37; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0 38; CHECK-NEXT: vcmptrueps %ymm0, %ymm0, %ymm0 39; CHECK-NEXT: vmovaps %ymm0, (%rdi) 40; CHECK-NEXT: vzeroupper 41; CHECK-NEXT: retq 42allocas: 43 %ptr2vec615 = bitcast [0 x float]* %RET to <8 x float>* 44 store <8 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 450xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 460xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, <8 x 47float>* %ptr2vec615, align 32 48 ret void 49} 50 51define void @ones2([0 x i32]* nocapture %RET, [0 x i32]* nocapture %aFOO) nounwind { 52; CHECK-LABEL: ones2: 53; CHECK: ## %bb.0: ## %allocas 54; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0 55; CHECK-NEXT: vcmptrueps %ymm0, %ymm0, %ymm0 56; CHECK-NEXT: vmovaps %ymm0, (%rdi) 57; CHECK-NEXT: vzeroupper 58; CHECK-NEXT: retq 59allocas: 60 %ptr2vec615 = bitcast [0 x i32]* %RET to <8 x i32>* 61 store <8 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, <8 x i32>* %ptr2vec615, align 32 62 ret void 63} 64 65;;; Just make sure this doesn't crash 66define <4 x i64> @ISelCrash(<4 x i64> %a) nounwind uwtable readnone ssp { 67; CHECK-LABEL: ISelCrash: 68; CHECK: ## %bb.0: 69; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0 70; CHECK-NEXT: retq 71 %shuffle = shufflevector <4 x i64> %a, <4 x i64> undef, <4 x i32> <i32 2, i32 3, i32 4, i32 4> 72 ret <4 x i64> %shuffle 73} 74 75;;; Don't crash on movd 76define <8 x i32> @VMOVZQI2PQI([0 x float]* nocapture %aFOO) nounwind { 77; CHECK-LABEL: VMOVZQI2PQI: 78; CHECK: ## %bb.0: 79; CHECK-NEXT: vbroadcastss (%rdi), %ymm0 80; CHECK-NEXT: retq 81 %ptrcast.i33.i = bitcast [0 x float]* %aFOO to i32* 82 %val.i34.i = load i32, i32* %ptrcast.i33.i, align 4 83 %ptroffset.i22.i992 = getelementptr [0 x float], [0 x float]* %aFOO, i64 0, i64 1 84 %ptrcast.i23.i = bitcast float* %ptroffset.i22.i992 to i32* 85 %val.i24.i = load i32, i32* %ptrcast.i23.i, align 4 86 %updatedret.i30.i = insertelement <8 x i32> undef, i32 %val.i34.i, i32 1 87 ret <8 x i32> %updatedret.i30.i 88} 89 90;;;; Don't crash on fneg 91; rdar://10566486 92define <16 x float> @fneg(<16 x float> %a) nounwind { 93; CHECK-LABEL: fneg: 94; CHECK: ## %bb.0: 95; CHECK-NEXT: vmovaps {{.*#+}} ymm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] 96; CHECK-NEXT: vxorps %ymm2, %ymm0, %ymm0 97; CHECK-NEXT: vxorps %ymm2, %ymm1, %ymm1 98; CHECK-NEXT: retq 99 %1 = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %a 100 ret <16 x float> %1 101} 102 103;;; Don't crash on build vector 104define <16 x i16> @build_vec_16x16(i16 %a) nounwind readonly { 105; CHECK-LABEL: build_vec_16x16: 106; CHECK: ## %bb.0: 107; CHECK-NEXT: movzwl %di, %eax 108; CHECK-NEXT: vmovd %eax, %xmm0 109; CHECK-NEXT: retq 110 %res = insertelement <16 x i16> <i16 undef, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>, i16 %a, i32 0 111 ret <16 x i16> %res 112} 113 114;;; Check that VMOVPQIto64rr generates the assembly string "vmovq". Previously 115;;; an incorrect mnemonic of "movd" was printed for this instruction. 116define i64 @VMOVPQIto64rr(<2 x i64> %a) { 117; CHECK-LABEL: VMOVPQIto64rr: 118; CHECK: ## %bb.0: 119; CHECK-NEXT: vmovq %xmm0, %rax 120; CHECK-NEXT: retq 121 %vecext.i = extractelement <2 x i64> %a, i32 0 122 ret i64 %vecext.i 123} 124 125; PR22685 126define <8 x float> @mov00_8f32(float* %ptr) { 127; CHECK-LABEL: mov00_8f32: 128; CHECK: ## %bb.0: 129; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 130; CHECK-NEXT: retq 131 %val = load float, float* %ptr 132 %vec = insertelement <8 x float> zeroinitializer, float %val, i32 0 133 ret <8 x float> %vec 134} 135