1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=CMOV
3; RUN: llc < %s -mtriple=i686-unknown-unknown   -mattr=-cmov | FileCheck %s --check-prefix=NO_CMOV
4
5define i16 @cmov_zpromotion_8_to_16(i1 %c) {
6; CMOV-LABEL: cmov_zpromotion_8_to_16:
7; CMOV:       # %bb.0:
8; CMOV-NEXT:    testb $1, %dil
9; CMOV-NEXT:    movl $117, %ecx
10; CMOV-NEXT:    movl $237, %eax
11; CMOV-NEXT:    cmovnel %ecx, %eax
12; CMOV-NEXT:    # kill: def $ax killed $ax killed $eax
13; CMOV-NEXT:    retq
14;
15; NO_CMOV-LABEL: cmov_zpromotion_8_to_16:
16; NO_CMOV:       # %bb.0:
17; NO_CMOV-NEXT:    testb $1, {{[0-9]+}}(%esp)
18; NO_CMOV-NEXT:    movl $117, %eax
19; NO_CMOV-NEXT:    jne .LBB0_2
20; NO_CMOV-NEXT:  # %bb.1:
21; NO_CMOV-NEXT:    movl $237, %eax
22; NO_CMOV-NEXT:  .LBB0_2:
23; NO_CMOV-NEXT:    # kill: def $ax killed $ax killed $eax
24; NO_CMOV-NEXT:    retl
25  %t0 = select i1 %c, i8 117, i8 -19
26  %ret = zext i8 %t0 to i16
27  ret i16 %ret
28}
29
30define i32 @cmov_zpromotion_8_to_32(i1 %c) {
31; CMOV-LABEL: cmov_zpromotion_8_to_32:
32; CMOV:       # %bb.0:
33; CMOV-NEXT:    testb $1, %dil
34; CMOV-NEXT:    movl $126, %ecx
35; CMOV-NEXT:    movl $255, %eax
36; CMOV-NEXT:    cmovnel %ecx, %eax
37; CMOV-NEXT:    retq
38;
39; NO_CMOV-LABEL: cmov_zpromotion_8_to_32:
40; NO_CMOV:       # %bb.0:
41; NO_CMOV-NEXT:    testb $1, {{[0-9]+}}(%esp)
42; NO_CMOV-NEXT:    movl $126, %eax
43; NO_CMOV-NEXT:    jne .LBB1_2
44; NO_CMOV-NEXT:  # %bb.1:
45; NO_CMOV-NEXT:    movl $255, %eax
46; NO_CMOV-NEXT:  .LBB1_2:
47; NO_CMOV-NEXT:    retl
48  %t0 = select i1 %c, i8 12414, i8 -1
49  %ret = zext i8 %t0 to i32
50  ret i32 %ret
51}
52
53define i64 @cmov_zpromotion_8_to_64(i1 %c) {
54; CMOV-LABEL: cmov_zpromotion_8_to_64:
55; CMOV:       # %bb.0:
56; CMOV-NEXT:    testb $1, %dil
57; CMOV-NEXT:    movl $126, %ecx
58; CMOV-NEXT:    movl $255, %eax
59; CMOV-NEXT:    cmovneq %rcx, %rax
60; CMOV-NEXT:    retq
61;
62; NO_CMOV-LABEL: cmov_zpromotion_8_to_64:
63; NO_CMOV:       # %bb.0:
64; NO_CMOV-NEXT:    testb $1, {{[0-9]+}}(%esp)
65; NO_CMOV-NEXT:    movl $126, %eax
66; NO_CMOV-NEXT:    jne .LBB2_2
67; NO_CMOV-NEXT:  # %bb.1:
68; NO_CMOV-NEXT:    movl $255, %eax
69; NO_CMOV-NEXT:  .LBB2_2:
70; NO_CMOV-NEXT:    xorl %edx, %edx
71; NO_CMOV-NEXT:    retl
72  %t0 = select i1 %c, i8 12414, i8 -1
73  %ret = zext i8 %t0 to i64
74  ret i64 %ret
75}
76
77define i32 @cmov_zpromotion_16_to_32(i1 %c) {
78; CMOV-LABEL: cmov_zpromotion_16_to_32:
79; CMOV:       # %bb.0:
80; CMOV-NEXT:    testb $1, %dil
81; CMOV-NEXT:    movl $12414, %ecx # imm = 0x307E
82; CMOV-NEXT:    movl $65535, %eax # imm = 0xFFFF
83; CMOV-NEXT:    cmovnel %ecx, %eax
84; CMOV-NEXT:    retq
85;
86; NO_CMOV-LABEL: cmov_zpromotion_16_to_32:
87; NO_CMOV:       # %bb.0:
88; NO_CMOV-NEXT:    testb $1, {{[0-9]+}}(%esp)
89; NO_CMOV-NEXT:    movl $12414, %eax # imm = 0x307E
90; NO_CMOV-NEXT:    jne .LBB3_2
91; NO_CMOV-NEXT:  # %bb.1:
92; NO_CMOV-NEXT:    movl $65535, %eax # imm = 0xFFFF
93; NO_CMOV-NEXT:  .LBB3_2:
94; NO_CMOV-NEXT:    retl
95  %t0 = select i1 %c, i16 12414, i16 -1
96  %ret = zext i16 %t0 to i32
97  ret i32 %ret
98}
99
100define i64 @cmov_zpromotion_16_to_64(i1 %c) {
101; CMOV-LABEL: cmov_zpromotion_16_to_64:
102; CMOV:       # %bb.0:
103; CMOV-NEXT:    testb $1, %dil
104; CMOV-NEXT:    movl $12414, %ecx # imm = 0x307E
105; CMOV-NEXT:    movl $65535, %eax # imm = 0xFFFF
106; CMOV-NEXT:    cmovneq %rcx, %rax
107; CMOV-NEXT:    retq
108;
109; NO_CMOV-LABEL: cmov_zpromotion_16_to_64:
110; NO_CMOV:       # %bb.0:
111; NO_CMOV-NEXT:    testb $1, {{[0-9]+}}(%esp)
112; NO_CMOV-NEXT:    movl $12414, %eax # imm = 0x307E
113; NO_CMOV-NEXT:    jne .LBB4_2
114; NO_CMOV-NEXT:  # %bb.1:
115; NO_CMOV-NEXT:    movl $65535, %eax # imm = 0xFFFF
116; NO_CMOV-NEXT:  .LBB4_2:
117; NO_CMOV-NEXT:    xorl %edx, %edx
118; NO_CMOV-NEXT:    retl
119  %t0 = select i1 %c, i16 12414, i16 -1
120  %ret = zext i16 %t0 to i64
121  ret i64 %ret
122}
123
124define i64 @cmov_zpromotion_32_to_64(i1 %c) {
125; CMOV-LABEL: cmov_zpromotion_32_to_64:
126; CMOV:       # %bb.0:
127; CMOV-NEXT:    testb $1, %dil
128; CMOV-NEXT:    movl $12414, %ecx # imm = 0x307E
129; CMOV-NEXT:    movl $-1, %eax
130; CMOV-NEXT:    cmovnel %ecx, %eax
131; CMOV-NEXT:    retq
132;
133; NO_CMOV-LABEL: cmov_zpromotion_32_to_64:
134; NO_CMOV:       # %bb.0:
135; NO_CMOV-NEXT:    testb $1, {{[0-9]+}}(%esp)
136; NO_CMOV-NEXT:    movl $12414, %eax # imm = 0x307E
137; NO_CMOV-NEXT:    jne .LBB5_2
138; NO_CMOV-NEXT:  # %bb.1:
139; NO_CMOV-NEXT:    movl $-1, %eax
140; NO_CMOV-NEXT:  .LBB5_2:
141; NO_CMOV-NEXT:    xorl %edx, %edx
142; NO_CMOV-NEXT:    retl
143  %t0 = select i1 %c, i32 12414, i32 -1
144  %ret = zext i32 %t0 to i64
145  ret i64 %ret
146}
147
148define i16 @cmov_spromotion_8_to_16(i1 %c) {
149; CMOV-LABEL: cmov_spromotion_8_to_16:
150; CMOV:       # %bb.0:
151; CMOV-NEXT:    testb $1, %dil
152; CMOV-NEXT:    movl $117, %ecx
153; CMOV-NEXT:    movl $65517, %eax # imm = 0xFFED
154; CMOV-NEXT:    cmovnel %ecx, %eax
155; CMOV-NEXT:    # kill: def $ax killed $ax killed $eax
156; CMOV-NEXT:    retq
157;
158; NO_CMOV-LABEL: cmov_spromotion_8_to_16:
159; NO_CMOV:       # %bb.0:
160; NO_CMOV-NEXT:    testb $1, {{[0-9]+}}(%esp)
161; NO_CMOV-NEXT:    movl $117, %eax
162; NO_CMOV-NEXT:    jne .LBB6_2
163; NO_CMOV-NEXT:  # %bb.1:
164; NO_CMOV-NEXT:    movl $65517, %eax # imm = 0xFFED
165; NO_CMOV-NEXT:  .LBB6_2:
166; NO_CMOV-NEXT:    # kill: def $ax killed $ax killed $eax
167; NO_CMOV-NEXT:    retl
168  %t0 = select i1 %c, i8 117, i8 -19
169  %ret = sext i8 %t0 to i16
170  ret i16 %ret
171}
172
173define i32 @cmov_spromotion_8_to_32(i1 %c) {
174; CMOV-LABEL: cmov_spromotion_8_to_32:
175; CMOV:       # %bb.0:
176; CMOV-NEXT:    testb $1, %dil
177; CMOV-NEXT:    movl $126, %ecx
178; CMOV-NEXT:    movl $-1, %eax
179; CMOV-NEXT:    cmovnel %ecx, %eax
180; CMOV-NEXT:    retq
181;
182; NO_CMOV-LABEL: cmov_spromotion_8_to_32:
183; NO_CMOV:       # %bb.0:
184; NO_CMOV-NEXT:    testb $1, {{[0-9]+}}(%esp)
185; NO_CMOV-NEXT:    movl $126, %eax
186; NO_CMOV-NEXT:    jne .LBB7_2
187; NO_CMOV-NEXT:  # %bb.1:
188; NO_CMOV-NEXT:    movl $-1, %eax
189; NO_CMOV-NEXT:  .LBB7_2:
190; NO_CMOV-NEXT:    retl
191  %t0 = select i1 %c, i8 12414, i8 -1
192  %ret = sext i8 %t0 to i32
193  ret i32 %ret
194}
195
196define i64 @cmov_spromotion_8_to_64(i1 %c) {
197; CMOV-LABEL: cmov_spromotion_8_to_64:
198; CMOV:       # %bb.0:
199; CMOV-NEXT:    testb $1, %dil
200; CMOV-NEXT:    movl $126, %ecx
201; CMOV-NEXT:    movq $-1, %rax
202; CMOV-NEXT:    cmovneq %rcx, %rax
203; CMOV-NEXT:    retq
204;
205; NO_CMOV-LABEL: cmov_spromotion_8_to_64:
206; NO_CMOV:       # %bb.0:
207; NO_CMOV-NEXT:    testb $1, {{[0-9]+}}(%esp)
208; NO_CMOV-NEXT:    jne .LBB8_1
209; NO_CMOV-NEXT:  # %bb.2:
210; NO_CMOV-NEXT:    movl $-1, %eax
211; NO_CMOV-NEXT:    movl $-1, %edx
212; NO_CMOV-NEXT:    retl
213; NO_CMOV-NEXT:  .LBB8_1:
214; NO_CMOV-NEXT:    xorl %edx, %edx
215; NO_CMOV-NEXT:    movl $126, %eax
216; NO_CMOV-NEXT:    retl
217  %t0 = select i1 %c, i8 12414, i8 -1
218  %ret = sext i8 %t0 to i64
219  ret i64 %ret
220}
221
222define i32 @cmov_spromotion_16_to_32(i1 %c) {
223; CMOV-LABEL: cmov_spromotion_16_to_32:
224; CMOV:       # %bb.0:
225; CMOV-NEXT:    testb $1, %dil
226; CMOV-NEXT:    movl $12414, %ecx # imm = 0x307E
227; CMOV-NEXT:    movl $-1, %eax
228; CMOV-NEXT:    cmovnel %ecx, %eax
229; CMOV-NEXT:    retq
230;
231; NO_CMOV-LABEL: cmov_spromotion_16_to_32:
232; NO_CMOV:       # %bb.0:
233; NO_CMOV-NEXT:    testb $1, {{[0-9]+}}(%esp)
234; NO_CMOV-NEXT:    movl $12414, %eax # imm = 0x307E
235; NO_CMOV-NEXT:    jne .LBB9_2
236; NO_CMOV-NEXT:  # %bb.1:
237; NO_CMOV-NEXT:    movl $-1, %eax
238; NO_CMOV-NEXT:  .LBB9_2:
239; NO_CMOV-NEXT:    retl
240  %t0 = select i1 %c, i16 12414, i16 -1
241  %ret = sext i16 %t0 to i32
242  ret i32 %ret
243}
244
245define i64 @cmov_spromotion_16_to_64(i1 %c) {
246; CMOV-LABEL: cmov_spromotion_16_to_64:
247; CMOV:       # %bb.0:
248; CMOV-NEXT:    testb $1, %dil
249; CMOV-NEXT:    movl $12414, %ecx # imm = 0x307E
250; CMOV-NEXT:    movq $-1, %rax
251; CMOV-NEXT:    cmovneq %rcx, %rax
252; CMOV-NEXT:    retq
253;
254; NO_CMOV-LABEL: cmov_spromotion_16_to_64:
255; NO_CMOV:       # %bb.0:
256; NO_CMOV-NEXT:    testb $1, {{[0-9]+}}(%esp)
257; NO_CMOV-NEXT:    jne .LBB10_1
258; NO_CMOV-NEXT:  # %bb.2:
259; NO_CMOV-NEXT:    movl $-1, %eax
260; NO_CMOV-NEXT:    movl $-1, %edx
261; NO_CMOV-NEXT:    retl
262; NO_CMOV-NEXT:  .LBB10_1:
263; NO_CMOV-NEXT:    xorl %edx, %edx
264; NO_CMOV-NEXT:    movl $12414, %eax # imm = 0x307E
265; NO_CMOV-NEXT:    retl
266  %t0 = select i1 %c, i16 12414, i16 -1
267  %ret = sext i16 %t0 to i64
268  ret i64 %ret
269}
270
271define i64 @cmov_spromotion_32_to_64(i1 %c) {
272; CMOV-LABEL: cmov_spromotion_32_to_64:
273; CMOV:       # %bb.0:
274; CMOV-NEXT:    testb $1, %dil
275; CMOV-NEXT:    movl $12414, %ecx # imm = 0x307E
276; CMOV-NEXT:    movq $-1, %rax
277; CMOV-NEXT:    cmovneq %rcx, %rax
278; CMOV-NEXT:    retq
279;
280; NO_CMOV-LABEL: cmov_spromotion_32_to_64:
281; NO_CMOV:       # %bb.0:
282; NO_CMOV-NEXT:    testb $1, {{[0-9]+}}(%esp)
283; NO_CMOV-NEXT:    jne .LBB11_1
284; NO_CMOV-NEXT:  # %bb.2:
285; NO_CMOV-NEXT:    movl $-1, %eax
286; NO_CMOV-NEXT:    movl $-1, %edx
287; NO_CMOV-NEXT:    retl
288; NO_CMOV-NEXT:  .LBB11_1:
289; NO_CMOV-NEXT:    xorl %edx, %edx
290; NO_CMOV-NEXT:    movl $12414, %eax # imm = 0x307E
291; NO_CMOV-NEXT:    retl
292  %t0 = select i1 %c, i32 12414, i32 -1
293  %ret = sext i32 %t0 to i64
294  ret i64 %ret
295}
296