1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx,+f16c | FileCheck %s --check-prefixes=CHECK,X86
3; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx,+f16c | FileCheck %s --check-prefixes=CHECK,X64
4
5; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/f16c-builtins.c
6
7define float @test_cvtsh_ss(i16 %a0) nounwind {
8; X86-LABEL: test_cvtsh_ss:
9; X86:       # %bb.0:
10; X86-NEXT:    pushl %eax
11; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
12; X86-NEXT:    vmovd %eax, %xmm0
13; X86-NEXT:    vcvtph2ps %xmm0, %xmm0
14; X86-NEXT:    vmovss %xmm0, (%esp)
15; X86-NEXT:    flds (%esp)
16; X86-NEXT:    popl %eax
17; X86-NEXT:    retl
18;
19; X64-LABEL: test_cvtsh_ss:
20; X64:       # %bb.0:
21; X64-NEXT:    movzwl %di, %eax
22; X64-NEXT:    vmovd %eax, %xmm0
23; X64-NEXT:    vcvtph2ps %xmm0, %xmm0
24; X64-NEXT:    retq
25  %ins0 = insertelement <8 x i16> undef, i16 %a0, i32 0
26  %ins1 = insertelement <8 x i16> %ins0, i16 0, i32 1
27  %ins2 = insertelement <8 x i16> %ins1, i16 0, i32 2
28  %ins3 = insertelement <8 x i16> %ins2, i16 0, i32 3
29  %ins4 = insertelement <8 x i16> %ins3, i16 0, i32 4
30  %ins5 = insertelement <8 x i16> %ins4, i16 0, i32 5
31  %ins6 = insertelement <8 x i16> %ins5, i16 0, i32 6
32  %ins7 = insertelement <8 x i16> %ins6, i16 0, i32 7
33  %shuffle = shufflevector <8 x i16> %ins7, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
34  %bc = bitcast <4 x i16> %shuffle to <4 x half>
35  %cvt = fpext <4 x half> %bc to <4 x float>
36  %res = extractelement <4 x float> %cvt, i32 0
37  ret float %res
38}
39
40define i16 @test_cvtss_sh(float %a0) nounwind {
41; X86-LABEL: test_cvtss_sh:
42; X86:       # %bb.0:
43; X86-NEXT:    vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
44; X86-NEXT:    vxorps %xmm1, %xmm1, %xmm1
45; X86-NEXT:    vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
46; X86-NEXT:    vcvtps2ph $0, %xmm0, %xmm0
47; X86-NEXT:    vmovd %xmm0, %eax
48; X86-NEXT:    # kill: def $ax killed $ax killed $eax
49; X86-NEXT:    retl
50;
51; X64-LABEL: test_cvtss_sh:
52; X64:       # %bb.0:
53; X64-NEXT:    vxorps %xmm1, %xmm1, %xmm1
54; X64-NEXT:    vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
55; X64-NEXT:    vcvtps2ph $0, %xmm0, %xmm0
56; X64-NEXT:    vmovd %xmm0, %eax
57; X64-NEXT:    # kill: def $ax killed $ax killed $eax
58; X64-NEXT:    retq
59  %ins0 = insertelement <4 x float> undef, float %a0, i32 0
60  %ins1 = insertelement <4 x float> %ins0, float 0.000000e+00, i32 1
61  %ins2 = insertelement <4 x float> %ins1, float 0.000000e+00, i32 2
62  %ins3 = insertelement <4 x float> %ins2, float 0.000000e+00, i32 3
63  %cvt = call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %ins3, i32 0)
64  %res = extractelement <8 x i16> %cvt, i32 0
65  ret i16 %res
66}
67
68define <4 x float> @test_mm_cvtph_ps(<2 x i64> %a0) nounwind {
69; CHECK-LABEL: test_mm_cvtph_ps:
70; CHECK:       # %bb.0:
71; CHECK-NEXT:    vcvtph2ps %xmm0, %xmm0
72; CHECK-NEXT:    ret{{[l|q]}}
73  %arg0 = bitcast <2 x i64> %a0 to <8 x i16>
74  %shuffle = shufflevector <8 x i16> %arg0, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
75  %bc = bitcast <4 x i16> %shuffle to <4 x half>
76  %res = fpext <4 x half> %bc to <4 x float>
77  ret <4 x float> %res
78}
79
80define <8 x float> @test_mm256_cvtph_ps(<2 x i64> %a0) nounwind {
81; CHECK-LABEL: test_mm256_cvtph_ps:
82; CHECK:       # %bb.0:
83; CHECK-NEXT:    vcvtph2ps %xmm0, %ymm0
84; CHECK-NEXT:    ret{{[l|q]}}
85  %arg0 = bitcast <2 x i64> %a0 to <8 x i16>
86  %bc = bitcast <8 x i16> %arg0 to <8 x half>
87  %res = fpext <8 x half> %bc to <8 x float>
88  ret <8 x float> %res
89}
90
91define <2 x i64> @test_mm_cvtps_ph(<4 x float> %a0) nounwind {
92; CHECK-LABEL: test_mm_cvtps_ph:
93; CHECK:       # %bb.0:
94; CHECK-NEXT:    vcvtps2ph $0, %xmm0, %xmm0
95; CHECK-NEXT:    ret{{[l|q]}}
96  %cvt = call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %a0, i32 0)
97  %res = bitcast <8 x i16> %cvt to <2 x i64>
98  ret <2 x i64> %res
99}
100
101define <2 x i64> @test_mm256_cvtps_ph(<8 x float> %a0) nounwind {
102; CHECK-LABEL: test_mm256_cvtps_ph:
103; CHECK:       # %bb.0:
104; CHECK-NEXT:    vcvtps2ph $0, %ymm0, %xmm0
105; CHECK-NEXT:    vzeroupper
106; CHECK-NEXT:    ret{{[l|q]}}
107  %cvt = call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %a0, i32 0)
108  %res = bitcast <8 x i16> %cvt to <2 x i64>
109  ret <2 x i64> %res
110}
111
112declare <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16>) nounwind readonly
113declare <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16>) nounwind readonly
114
115declare <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float>, i32) nounwind readonly
116declare <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float>, i32) nounwind readonly
117