1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -fast-isel -O1 | FileCheck %s
3
4; This used to crash due to the bitcast in the entry block reusing the vreg
5; from its input. This resulted in known bits being calculated on the v2i64
6; type. But the second basic block tried to use them with a v8i16 type. This
7; was fixed by emitting a reg-reg copy for the bitcast so the vreg type will
8; be seen the same in both basic blocks.
9
10; We need the entry block to fall out of fast isel after selecting the bitcast.
11; The shuffle vector guarantees that. The zext gives us a useful known bits
12; value. We also need the second basic block to fall out of fast isel which the
13; intrinsic guarantees.
14
15define <8 x i16> @bitcast_crash(i32 %arg, <8 x i16> %x, i1 %c) {
16; CHECK-LABEL: bitcast_crash:
17; CHECK:       # %bb.0: # %bb
18; CHECK-NEXT:    movl %edi, %eax
19; CHECK-NEXT:    movq %rax, %xmm1
20; CHECK-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
21; CHECK-NEXT:    testb $1, %sil
22; CHECK-NEXT:    je .LBB0_2
23; CHECK-NEXT:  # %bb.1: # %bb1
24; CHECK-NEXT:    psraw %xmm1, %xmm0
25; CHECK-NEXT:    retq
26; CHECK-NEXT:  .LBB0_2: # %bb2
27; CHECK-NEXT:    movdqa %xmm1, %xmm0
28; CHECK-NEXT:    retq
29bb:
30  %tmp = zext i32 %arg to i64
31  %tmp1 = insertelement <2 x i64> undef, i64 %tmp, i32 0
32  %tmp2 = shufflevector <2 x i64> %tmp1, <2 x i64> undef, <2 x i32> zeroinitializer
33  %tmp5 = bitcast <2 x i64> %tmp2 to <8 x i16>
34  br i1 %c, label %bb1, label %bb2
35
36bb1:                                              ; preds = %bb8, %bb6
37  %tmp9 = call <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16> %x, <8 x i16> %tmp5)
38  ret <8 x i16> %tmp9
39
40bb2:
41  ret <8 x i16> %tmp5
42}
43
44declare <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16>, <8 x i16>)
45