1; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -fast-isel -fast-isel-abort=1 -asm-verbose=0 | FileCheck %s 2; 3; Bitcasts between 256-bit vector types are no-ops since no instruction is 4; needed for the conversion. 5 6define <4 x i64> @v8i32_to_v4i64(<8 x i32> %a) { 7;CHECK-LABEL: v8i32_to_v4i64: 8;CHECK-NEXT: .cfi_startproc 9;CHECK-NEXT: ret 10 %1 = bitcast <8 x i32> %a to <4 x i64> 11 ret <4 x i64> %1 12} 13 14define <4 x i64> @v16i16_to_v4i64(<16 x i16> %a) { 15;CHECK-LABEL: v16i16_to_v4i64: 16;CHECK-NEXT: .cfi_startproc 17;CHECK-NEXT: ret 18 %1 = bitcast <16 x i16> %a to <4 x i64> 19 ret <4 x i64> %1 20} 21 22define <4 x i64> @v32i8_to_v4i64(<32 x i8> %a) { 23;CHECK-LABEL: v32i8_to_v4i64: 24;CHECK-NEXT: .cfi_startproc 25;CHECK-NEXT: ret 26 %1 = bitcast <32 x i8> %a to <4 x i64> 27 ret <4 x i64> %1 28} 29 30define <4 x i64> @v4f64_to_v4i64(<4 x double> %a) { 31;CHECK-LABEL: v4f64_to_v4i64: 32;CHECK-NEXT: .cfi_startproc 33;CHECK-NEXT: ret 34 %1 = bitcast <4 x double> %a to <4 x i64> 35 ret <4 x i64> %1 36} 37 38define <4 x i64> @v8f32_to_v4i64(<8 x float> %a) { 39;CHECK-LABEL: v8f32_to_v4i64: 40;CHECK-NEXT: .cfi_startproc 41;CHECK-NEXT: ret 42 %1 = bitcast <8 x float> %a to <4 x i64> 43 ret <4 x i64> %1 44} 45 46define <8 x i32> @v4i64_to_v8i32(<4 x i64> %a) { 47;CHECK-LABEL: v4i64_to_v8i32: 48;CHECK-NEXT: .cfi_startproc 49;CHECK-NEXT: ret 50 %1 = bitcast <4 x i64> %a to <8 x i32> 51 ret <8 x i32> %1 52} 53 54define <8 x i32> @v16i16_to_v8i32(<16 x i16> %a) { 55;CHECK-LABEL: v16i16_to_v8i32: 56;CHECK-NEXT: .cfi_startproc 57;CHECK-NEXT: ret 58 %1 = bitcast <16 x i16> %a to <8 x i32> 59 ret <8 x i32> %1 60} 61 62define <8 x i32> @v32i8_to_v8i32(<32 x i8> %a) { 63;CHECK-LABEL: v32i8_to_v8i32: 64;CHECK-NEXT: .cfi_startproc 65;CHECK-NEXT: ret 66 %1 = bitcast <32 x i8> %a to <8 x i32> 67 ret <8 x i32> %1 68} 69 70define <8 x i32> @v4f64_to_v8i32(<4 x double> %a) { 71;CHECK-LABEL: v4f64_to_v8i32: 72;CHECK-NEXT: .cfi_startproc 73;CHECK-NEXT: ret 74 %1 = bitcast <4 x double> %a to <8 x i32> 75 ret <8 x i32> %1 76} 77 78define <8 x i32> @v8f32_to_v8i32(<8 x float> %a) { 79;CHECK-LABEL: v8f32_to_v8i32: 80;CHECK-NEXT: .cfi_startproc 81;CHECK-NEXT: ret 82 %1 = bitcast <8 x float> %a to <8 x i32> 83 ret <8 x i32> %1 84} 85 86define <16 x i16> @v4i64_to_v16i16(<4 x i64> %a) { 87;CHECK-LABEL: v4i64_to_v16i16: 88;CHECK-NEXT: .cfi_startproc 89;CHECK-NEXT: ret 90 %1 = bitcast <4 x i64> %a to <16 x i16> 91 ret <16 x i16> %1 92} 93 94define <16 x i16> @v8i32_to_v16i16(<8 x i32> %a) { 95;CHECK-LABEL: v8i32_to_v16i16: 96;CHECK-NEXT: .cfi_startproc 97;CHECK-NEXT: ret 98 %1 = bitcast <8 x i32> %a to <16 x i16> 99 ret <16 x i16> %1 100} 101 102define <16 x i16> @v32i8_to_v16i16(<32 x i8> %a) { 103;CHECK-LABEL: v32i8_to_v16i16: 104;CHECK-NEXT: .cfi_startproc 105;CHECK-NEXT: ret 106 %1 = bitcast <32 x i8> %a to <16 x i16> 107 ret <16 x i16> %1 108} 109 110define <16 x i16> @v4f64_to_v16i16(<4 x double> %a) { 111;CHECK-LABEL: v4f64_to_v16i16: 112;CHECK-NEXT: .cfi_startproc 113;CHECK-NEXT: ret 114 %1 = bitcast <4 x double> %a to <16 x i16> 115 ret <16 x i16> %1 116} 117 118define <16 x i16> @v8f32_to_v16i16(<8 x float> %a) { 119;CHECK-LABEL: v8f32_to_v16i16: 120;CHECK-NEXT: .cfi_startproc 121;CHECK-NEXT: ret 122 %1 = bitcast <8 x float> %a to <16 x i16> 123 ret <16 x i16> %1 124} 125 126define <32 x i8> @v16i16_to_v32i8(<16 x i16> %a) { 127;CHECK-LABEL: v16i16_to_v32i8: 128;CHECK-NEXT: .cfi_startproc 129;CHECK-NEXT: ret 130 %1 = bitcast <16 x i16> %a to <32 x i8> 131 ret <32 x i8> %1 132} 133 134define <32 x i8> @v4i64_to_v32i8(<4 x i64> %a) { 135;CHECK-LABEL: v4i64_to_v32i8: 136;CHECK-NEXT: .cfi_startproc 137;CHECK-NEXT: ret 138 %1 = bitcast <4 x i64> %a to <32 x i8> 139 ret <32 x i8> %1 140} 141 142define <32 x i8> @v8i32_to_v32i8(<8 x i32> %a) { 143;CHECK-LABEL: v8i32_to_v32i8: 144;CHECK-NEXT: .cfi_startproc 145;CHECK-NEXT: ret 146 %1 = bitcast <8 x i32> %a to <32 x i8> 147 ret <32 x i8> %1 148} 149 150define <32 x i8> @v4f64_to_v32i8(<4 x double> %a) { 151;CHECK-LABEL: v4f64_to_v32i8: 152;CHECK-NEXT: .cfi_startproc 153;CHECK-NEXT: ret 154 %1 = bitcast <4 x double> %a to <32 x i8> 155 ret <32 x i8> %1 156} 157 158define <32 x i8> @v8f32_to_v32i8(<8 x float> %a) { 159;CHECK-LABEL: v8f32_to_v32i8: 160;CHECK-NEXT: .cfi_startproc 161;CHECK-NEXT: ret 162 %1 = bitcast <8 x float> %a to <32 x i8> 163 ret <32 x i8> %1 164} 165 166define <8 x float> @v32i8_to_v8f32(<32 x i8> %a) { 167;CHECK-LABEL: v32i8_to_v8f32: 168;CHECK-NEXT: .cfi_startproc 169;CHECK-NEXT: ret 170 %1 = bitcast <32 x i8> %a to <8 x float> 171 ret <8 x float> %1 172} 173 174define <8 x float> @v16i16_to_v8f32(<16 x i16> %a) { 175;CHECK-LABEL: v16i16_to_v8f32: 176;CHECK-NEXT: .cfi_startproc 177;CHECK-NEXT: ret 178 %1 = bitcast <16 x i16> %a to <8 x float> 179 ret <8 x float> %1 180} 181 182define <8 x float> @v4i64_to_v8f32(<4 x i64> %a) { 183;CHECK-LABEL: v4i64_to_v8f32: 184;CHECK-NEXT: .cfi_startproc 185;CHECK-NEXT: ret 186 %1 = bitcast <4 x i64> %a to <8 x float> 187 ret <8 x float> %1 188} 189 190define <8 x float> @v8i32_to_v8f32(<8 x i32> %a) { 191;CHECK-LABEL: v8i32_to_v8f32: 192;CHECK-NEXT: .cfi_startproc 193;CHECK-NEXT: ret 194 %1 = bitcast <8 x i32> %a to <8 x float> 195 ret <8 x float> %1 196} 197 198define <8 x float> @v4f64_to_v8f32(<4 x double> %a) { 199;CHECK-LABEL: v4f64_to_v8f32: 200;CHECK-NEXT: .cfi_startproc 201;CHECK-NEXT: ret 202 %1 = bitcast <4 x double> %a to <8 x float> 203 ret <8 x float> %1 204} 205 206define <4 x double> @v8f32_to_v4f64(<8 x float> %a) { 207;CHECK-LABEL: v8f32_to_v4f64: 208;CHECK-NEXT: .cfi_startproc 209;CHECK-NEXT: ret 210 %1 = bitcast <8 x float> %a to <4 x double> 211 ret <4 x double> %1 212} 213 214define <4 x double> @v32i8_to_v4f64(<32 x i8> %a) { 215;CHECK-LABEL: v32i8_to_v4f64: 216;CHECK-NEXT: .cfi_startproc 217;CHECK-NEXT: ret 218 %1 = bitcast <32 x i8> %a to <4 x double> 219 ret <4 x double> %1 220} 221 222define <4 x double> @v16i16_to_v4f64(<16 x i16> %a) { 223;CHECK-LABEL: v16i16_to_v4f64: 224;CHECK-NEXT: .cfi_startproc 225;CHECK-NEXT: ret 226 %1 = bitcast <16 x i16> %a to <4 x double> 227 ret <4 x double> %1 228} 229 230define <4 x double> @v4i64_to_v4f64(<4 x i64> %a) { 231;CHECK-LABEL: v4i64_to_v4f64: 232;CHECK-NEXT: .cfi_startproc 233;CHECK-NEXT: ret 234 %1 = bitcast <4 x i64> %a to <4 x double> 235 ret <4 x double> %1 236} 237 238define <4 x double> @v8i32_to_v4f64(<8 x i32> %a) { 239;CHECK-LABEL: v8i32_to_v4f64: 240;CHECK-NEXT: .cfi_startproc 241;CHECK-NEXT: ret 242 %1 = bitcast <8 x i32> %a to <4 x double> 243 ret <4 x double> %1 244} 245