1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10                  | FileCheck %s
3; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -mattr=+avx512f  | FileCheck %s
4
5; Test conditional move for the supported types (i16, i32, and i32) and
6; conditon input (argument or cmp). Currently i8 is not supported.
7
8define zeroext i16 @select_cmov_i16(i1 zeroext %cond, i16 zeroext %a, i16 zeroext %b) {
9; CHECK-LABEL: select_cmov_i16:
10; CHECK:       ## %bb.0:
11; CHECK-NEXT:    testb $1, %dil
12; CHECK-NEXT:    cmovew %dx, %si
13; CHECK-NEXT:    movzwl %si, %eax
14; CHECK-NEXT:    retq
15  %1 = select i1 %cond, i16 %a, i16 %b
16  ret i16 %1
17}
18
19define zeroext i16 @select_cmp_cmov_i16(i16 zeroext %a, i16 zeroext %b) {
20; CHECK-LABEL: select_cmp_cmov_i16:
21; CHECK:       ## %bb.0:
22; CHECK-NEXT:    cmpw %si, %di
23; CHECK-NEXT:    cmovbw %di, %si
24; CHECK-NEXT:    movzwl %si, %eax
25; CHECK-NEXT:    retq
26  %1 = icmp ult i16 %a, %b
27  %2 = select i1 %1, i16 %a, i16 %b
28  ret i16 %2
29}
30
31define i32 @select_cmov_i32(i1 zeroext %cond, i32 %a, i32 %b) {
32; CHECK-LABEL: select_cmov_i32:
33; CHECK:       ## %bb.0:
34; CHECK-NEXT:    movl %esi, %eax
35; CHECK-NEXT:    testb $1, %dil
36; CHECK-NEXT:    cmovel %edx, %eax
37; CHECK-NEXT:    retq
38  %1 = select i1 %cond, i32 %a, i32 %b
39  ret i32 %1
40}
41
42define i32 @select_cmp_cmov_i32(i32 %a, i32 %b) {
43; CHECK-LABEL: select_cmp_cmov_i32:
44; CHECK:       ## %bb.0:
45; CHECK-NEXT:    movl %esi, %eax
46; CHECK-NEXT:    cmpl %esi, %edi
47; CHECK-NEXT:    cmovbl %edi, %eax
48; CHECK-NEXT:    retq
49  %1 = icmp ult i32 %a, %b
50  %2 = select i1 %1, i32 %a, i32 %b
51  ret i32 %2
52}
53
54define i64 @select_cmov_i64(i1 zeroext %cond, i64 %a, i64 %b) {
55; CHECK-LABEL: select_cmov_i64:
56; CHECK:       ## %bb.0:
57; CHECK-NEXT:    movq %rsi, %rax
58; CHECK-NEXT:    testb $1, %dil
59; CHECK-NEXT:    cmoveq %rdx, %rax
60; CHECK-NEXT:    retq
61  %1 = select i1 %cond, i64 %a, i64 %b
62  ret i64 %1
63}
64
65define i64 @select_cmp_cmov_i64(i64 %a, i64 %b) {
66; CHECK-LABEL: select_cmp_cmov_i64:
67; CHECK:       ## %bb.0:
68; CHECK-NEXT:    movq %rsi, %rax
69; CHECK-NEXT:    cmpq %rsi, %rdi
70; CHECK-NEXT:    cmovbq %rdi, %rax
71; CHECK-NEXT:    retq
72  %1 = icmp ult i64 %a, %b
73  %2 = select i1 %1, i64 %a, i64 %b
74  ret i64 %2
75}
76
77