1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx \
3; RUN:     -enable-legalize-types-checking | FileCheck %s
4; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx \
5; RUN:     -enable-legalize-types-checking | FileCheck %s
6
7define i32 @TestComp128GT(fp128 %d1, fp128 %d2) {
8; CHECK-LABEL: TestComp128GT:
9; CHECK:       # %bb.0: # %entry
10; CHECK-NEXT:    pushq %rax
11; CHECK-NEXT:    .cfi_def_cfa_offset 16
12; CHECK-NEXT:    callq __gttf2
13; CHECK-NEXT:    xorl %ecx, %ecx
14; CHECK-NEXT:    testl %eax, %eax
15; CHECK-NEXT:    setg %cl
16; CHECK-NEXT:    movl %ecx, %eax
17; CHECK-NEXT:    popq %rcx
18; CHECK-NEXT:    .cfi_def_cfa_offset 8
19; CHECK-NEXT:    retq
20entry:
21  %cmp = fcmp ogt fp128 %d1, %d2
22  %conv = zext i1 %cmp to i32
23  ret i32 %conv
24}
25
26define i32 @TestComp128GE(fp128 %d1, fp128 %d2) {
27; CHECK-LABEL: TestComp128GE:
28; CHECK:       # %bb.0: # %entry
29; CHECK-NEXT:    pushq %rax
30; CHECK-NEXT:    .cfi_def_cfa_offset 16
31; CHECK-NEXT:    callq __getf2
32; CHECK-NEXT:    xorl %ecx, %ecx
33; CHECK-NEXT:    testl %eax, %eax
34; CHECK-NEXT:    setns %cl
35; CHECK-NEXT:    movl %ecx, %eax
36; CHECK-NEXT:    popq %rcx
37; CHECK-NEXT:    .cfi_def_cfa_offset 8
38; CHECK-NEXT:    retq
39entry:
40  %cmp = fcmp oge fp128 %d1, %d2
41  %conv = zext i1 %cmp to i32
42  ret i32 %conv
43}
44
45define i32 @TestComp128LT(fp128 %d1, fp128 %d2) {
46; CHECK-LABEL: TestComp128LT:
47; CHECK:       # %bb.0: # %entry
48; CHECK-NEXT:    pushq %rax
49; CHECK-NEXT:    .cfi_def_cfa_offset 16
50; CHECK-NEXT:    callq __lttf2
51; CHECK-NEXT:    xorl %ecx, %ecx
52; CHECK-NEXT:    testl %eax, %eax
53; CHECK-NEXT:    sets %cl
54; CHECK-NEXT:    movl %ecx, %eax
55; CHECK-NEXT:    popq %rcx
56; CHECK-NEXT:    .cfi_def_cfa_offset 8
57; CHECK-NEXT:    retq
58entry:
59  %cmp = fcmp olt fp128 %d1, %d2
60  %conv = zext i1 %cmp to i32
61  ret i32 %conv
62; FIXME: This used to generate a shrl to move the sign bit of eax into bit 0.
63; This no longer happens with fp128 compares being expanded by LegalizeDAG.
64; We can add a new DAG combine for X86ISD::CMP/SETCC to restore this.
65}
66
67define i32 @TestComp128LE(fp128 %d1, fp128 %d2) {
68; CHECK-LABEL: TestComp128LE:
69; CHECK:       # %bb.0: # %entry
70; CHECK-NEXT:    pushq %rax
71; CHECK-NEXT:    .cfi_def_cfa_offset 16
72; CHECK-NEXT:    callq __letf2
73; CHECK-NEXT:    xorl %ecx, %ecx
74; CHECK-NEXT:    testl %eax, %eax
75; CHECK-NEXT:    setle %cl
76; CHECK-NEXT:    movl %ecx, %eax
77; CHECK-NEXT:    popq %rcx
78; CHECK-NEXT:    .cfi_def_cfa_offset 8
79; CHECK-NEXT:    retq
80entry:
81  %cmp = fcmp ole fp128 %d1, %d2
82  %conv = zext i1 %cmp to i32
83  ret i32 %conv
84}
85
86define i32 @TestComp128EQ(fp128 %d1, fp128 %d2) {
87; CHECK-LABEL: TestComp128EQ:
88; CHECK:       # %bb.0: # %entry
89; CHECK-NEXT:    pushq %rax
90; CHECK-NEXT:    .cfi_def_cfa_offset 16
91; CHECK-NEXT:    callq __eqtf2
92; CHECK-NEXT:    xorl %ecx, %ecx
93; CHECK-NEXT:    testl %eax, %eax
94; CHECK-NEXT:    sete %cl
95; CHECK-NEXT:    movl %ecx, %eax
96; CHECK-NEXT:    popq %rcx
97; CHECK-NEXT:    .cfi_def_cfa_offset 8
98; CHECK-NEXT:    retq
99entry:
100  %cmp = fcmp oeq fp128 %d1, %d2
101  %conv = zext i1 %cmp to i32
102  ret i32 %conv
103}
104
105define i32 @TestComp128NE(fp128 %d1, fp128 %d2) {
106; CHECK-LABEL: TestComp128NE:
107; CHECK:       # %bb.0: # %entry
108; CHECK-NEXT:    pushq %rax
109; CHECK-NEXT:    .cfi_def_cfa_offset 16
110; CHECK-NEXT:    callq __netf2
111; CHECK-NEXT:    xorl %ecx, %ecx
112; CHECK-NEXT:    testl %eax, %eax
113; CHECK-NEXT:    setne %cl
114; CHECK-NEXT:    movl %ecx, %eax
115; CHECK-NEXT:    popq %rcx
116; CHECK-NEXT:    .cfi_def_cfa_offset 8
117; CHECK-NEXT:    retq
118entry:
119  %cmp = fcmp une fp128 %d1, %d2
120  %conv = zext i1 %cmp to i32
121  ret i32 %conv
122}
123
124define i32 @TestComp128UEQ(fp128 %d1, fp128 %d2) {
125; CHECK-LABEL: TestComp128UEQ:
126; CHECK:       # %bb.0: # %entry
127; CHECK-NEXT:    pushq %rbx
128; CHECK-NEXT:    .cfi_def_cfa_offset 16
129; CHECK-NEXT:    subq $32, %rsp
130; CHECK-NEXT:    .cfi_def_cfa_offset 48
131; CHECK-NEXT:    .cfi_offset %rbx, -16
132; CHECK-NEXT:    movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
133; CHECK-NEXT:    movaps %xmm0, (%rsp) # 16-byte Spill
134; CHECK-NEXT:    callq __eqtf2
135; CHECK-NEXT:    testl %eax, %eax
136; CHECK-NEXT:    sete %bl
137; CHECK-NEXT:    movaps (%rsp), %xmm0 # 16-byte Reload
138; CHECK-NEXT:    movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
139; CHECK-NEXT:    callq __unordtf2
140; CHECK-NEXT:    testl %eax, %eax
141; CHECK-NEXT:    setne %al
142; CHECK-NEXT:    orb %bl, %al
143; CHECK-NEXT:    movzbl %al, %eax
144; CHECK-NEXT:    addq $32, %rsp
145; CHECK-NEXT:    .cfi_def_cfa_offset 16
146; CHECK-NEXT:    popq %rbx
147; CHECK-NEXT:    .cfi_def_cfa_offset 8
148; CHECK-NEXT:    retq
149entry:
150  %cmp = fcmp ueq fp128 %d1, %d2
151  %conv = zext i1 %cmp to i32
152  ret i32 %conv
153}
154
155define i32 @TestComp128ONE(fp128 %d1, fp128 %d2) {
156; CHECK-LABEL: TestComp128ONE:
157; CHECK:       # %bb.0: # %entry
158; CHECK-NEXT:    pushq %rbx
159; CHECK-NEXT:    .cfi_def_cfa_offset 16
160; CHECK-NEXT:    subq $32, %rsp
161; CHECK-NEXT:    .cfi_def_cfa_offset 48
162; CHECK-NEXT:    .cfi_offset %rbx, -16
163; CHECK-NEXT:    movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
164; CHECK-NEXT:    movaps %xmm0, (%rsp) # 16-byte Spill
165; CHECK-NEXT:    callq __eqtf2
166; CHECK-NEXT:    testl %eax, %eax
167; CHECK-NEXT:    setne %bl
168; CHECK-NEXT:    movaps (%rsp), %xmm0 # 16-byte Reload
169; CHECK-NEXT:    movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
170; CHECK-NEXT:    callq __unordtf2
171; CHECK-NEXT:    testl %eax, %eax
172; CHECK-NEXT:    sete %al
173; CHECK-NEXT:    andb %bl, %al
174; CHECK-NEXT:    movzbl %al, %eax
175; CHECK-NEXT:    addq $32, %rsp
176; CHECK-NEXT:    .cfi_def_cfa_offset 16
177; CHECK-NEXT:    popq %rbx
178; CHECK-NEXT:    .cfi_def_cfa_offset 8
179; CHECK-NEXT:    retq
180entry:
181  %cmp = fcmp one fp128 %d1, %d2
182  %conv = zext i1 %cmp to i32
183  ret i32 %conv
184}
185
186define fp128 @TestMax(fp128 %x, fp128 %y) {
187; CHECK-LABEL: TestMax:
188; CHECK:       # %bb.0: # %entry
189; CHECK-NEXT:    subq $40, %rsp
190; CHECK-NEXT:    .cfi_def_cfa_offset 48
191; CHECK-NEXT:    movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
192; CHECK-NEXT:    movaps %xmm1, (%rsp) # 16-byte Spill
193; CHECK-NEXT:    callq __gttf2
194; CHECK-NEXT:    movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
195; CHECK-NEXT:    testl %eax, %eax
196; CHECK-NEXT:    jg .LBB8_2
197; CHECK-NEXT:  # %bb.1: # %entry
198; CHECK-NEXT:    movaps (%rsp), %xmm0 # 16-byte Reload
199; CHECK-NEXT:  .LBB8_2: # %entry
200; CHECK-NEXT:    addq $40, %rsp
201; CHECK-NEXT:    .cfi_def_cfa_offset 8
202; CHECK-NEXT:    retq
203entry:
204  %cmp = fcmp ogt fp128 %x, %y
205  %cond = select i1 %cmp, fp128 %x, fp128 %y
206  ret fp128 %cond
207}
208