1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown             | FileCheck %s --check-prefixes=X86,X86-NOSSE
3; RUN: llc < %s -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefixes=X86,X86-SSE2
4; RUN: llc < %s -mtriple=i686-unknown -mattr=avx | FileCheck %s --check-prefixes=X86,X86-AVX
5; RUN: llc < %s -mtriple=i686-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X86,X86-AVX
6; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64,X64-SSE
7; RUN: llc < %s -mtriple=x86_64-unknown -mattr=avx | FileCheck %s --check-prefixes=X64,X64-AVX
8; RUN: llc < %s -mtriple=x86_64-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X64,X64-AVX
9
10define i32 @testmsws(float %x) {
11; X86-NOSSE-LABEL: testmsws:
12; X86-NOSSE:       # %bb.0: # %entry
13; X86-NOSSE-NEXT:    pushl %eax
14; X86-NOSSE-NEXT:    .cfi_def_cfa_offset 8
15; X86-NOSSE-NEXT:    flds {{[0-9]+}}(%esp)
16; X86-NOSSE-NEXT:    fistpl (%esp)
17; X86-NOSSE-NEXT:    movl (%esp), %eax
18; X86-NOSSE-NEXT:    popl %ecx
19; X86-NOSSE-NEXT:    .cfi_def_cfa_offset 4
20; X86-NOSSE-NEXT:    retl
21;
22; X86-SSE2-LABEL: testmsws:
23; X86-SSE2:       # %bb.0: # %entry
24; X86-SSE2-NEXT:    cvtss2si {{[0-9]+}}(%esp), %eax
25; X86-SSE2-NEXT:    retl
26;
27; X86-AVX-LABEL: testmsws:
28; X86-AVX:       # %bb.0: # %entry
29; X86-AVX-NEXT:    vcvtss2si {{[0-9]+}}(%esp), %eax
30; X86-AVX-NEXT:    retl
31;
32; X64-SSE-LABEL: testmsws:
33; X64-SSE:       # %bb.0: # %entry
34; X64-SSE-NEXT:    cvtss2si %xmm0, %eax
35; X64-SSE-NEXT:    retq
36;
37; X64-AVX-LABEL: testmsws:
38; X64-AVX:       # %bb.0: # %entry
39; X64-AVX-NEXT:    vcvtss2si %xmm0, %eax
40; X64-AVX-NEXT:    retq
41entry:
42  %0 = tail call i32 @llvm.lrint.i32.f32(float %x)
43  ret i32 %0
44}
45
46define i32 @testmswd(double %x) {
47; X86-NOSSE-LABEL: testmswd:
48; X86-NOSSE:       # %bb.0: # %entry
49; X86-NOSSE-NEXT:    pushl %eax
50; X86-NOSSE-NEXT:    .cfi_def_cfa_offset 8
51; X86-NOSSE-NEXT:    fldl {{[0-9]+}}(%esp)
52; X86-NOSSE-NEXT:    fistpl (%esp)
53; X86-NOSSE-NEXT:    movl (%esp), %eax
54; X86-NOSSE-NEXT:    popl %ecx
55; X86-NOSSE-NEXT:    .cfi_def_cfa_offset 4
56; X86-NOSSE-NEXT:    retl
57;
58; X86-SSE2-LABEL: testmswd:
59; X86-SSE2:       # %bb.0: # %entry
60; X86-SSE2-NEXT:    cvtsd2si {{[0-9]+}}(%esp), %eax
61; X86-SSE2-NEXT:    retl
62;
63; X86-AVX-LABEL: testmswd:
64; X86-AVX:       # %bb.0: # %entry
65; X86-AVX-NEXT:    vcvtsd2si {{[0-9]+}}(%esp), %eax
66; X86-AVX-NEXT:    retl
67;
68; X64-SSE-LABEL: testmswd:
69; X64-SSE:       # %bb.0: # %entry
70; X64-SSE-NEXT:    cvtsd2si %xmm0, %eax
71; X64-SSE-NEXT:    retq
72;
73; X64-AVX-LABEL: testmswd:
74; X64-AVX:       # %bb.0: # %entry
75; X64-AVX-NEXT:    vcvtsd2si %xmm0, %eax
76; X64-AVX-NEXT:    retq
77entry:
78  %0 = tail call i32 @llvm.lrint.i32.f64(double %x)
79  ret i32 %0
80}
81
82define i32 @testmsll(x86_fp80 %x) {
83; X86-LABEL: testmsll:
84; X86:       # %bb.0: # %entry
85; X86-NEXT:    pushl %eax
86; X86-NEXT:    .cfi_def_cfa_offset 8
87; X86-NEXT:    fldt {{[0-9]+}}(%esp)
88; X86-NEXT:    fistpl (%esp)
89; X86-NEXT:    movl (%esp), %eax
90; X86-NEXT:    popl %ecx
91; X86-NEXT:    .cfi_def_cfa_offset 4
92; X86-NEXT:    retl
93;
94; X64-LABEL: testmsll:
95; X64:       # %bb.0: # %entry
96; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
97; X64-NEXT:    fistpl -{{[0-9]+}}(%rsp)
98; X64-NEXT:    movl -{{[0-9]+}}(%rsp), %eax
99; X64-NEXT:    retq
100entry:
101  %0 = tail call i32 @llvm.lrint.i32.f80(x86_fp80 %x)
102  ret i32 %0
103}
104
105declare i32 @llvm.lrint.i32.f32(float) nounwind readnone
106declare i32 @llvm.lrint.i32.f64(double) nounwind readnone
107declare i32 @llvm.lrint.i32.f80(x86_fp80) nounwind readnone
108