1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+lwp | FileCheck %s --check-prefix=X64
3; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver1 | FileCheck %s --check-prefix=X64
4; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver2 | FileCheck %s --check-prefix=X64
5; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver3 | FileCheck %s --check-prefix=X64
6; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver4 | FileCheck %s --check-prefix=X64
7
8define i8 @test_lwpins64_rri(i64 %a0, i32 %a1) nounwind {
9; X64-LABEL: test_lwpins64_rri:
10; X64:       # %bb.0:
11; X64-NEXT:    lwpins $-1985229329, %esi, %rdi # imm = 0x89ABCDEF
12; X64-NEXT:    setb %al
13; X64-NEXT:    retq
14  %1 = tail call i8 @llvm.x86.lwpins64(i64 %a0, i32 %a1, i32 2309737967)
15  ret i8 %1
16}
17
18define i8 @test_lwpins64_rmi(i64 %a0, i32 *%p1) nounwind {
19; X64-LABEL: test_lwpins64_rmi:
20; X64:       # %bb.0:
21; X64-NEXT:    lwpins $1985229328, (%rsi), %rdi # imm = 0x76543210
22; X64-NEXT:    setb %al
23; X64-NEXT:    retq
24  %a1 = load i32, i32 *%p1
25  %1 = tail call i8 @llvm.x86.lwpins64(i64 %a0, i32 %a1, i32 1985229328)
26  ret i8 %1
27}
28
29define void @test_lwpval64_rri(i64 %a0, i32 %a1) nounwind {
30; X64-LABEL: test_lwpval64_rri:
31; X64:       # %bb.0:
32; X64-NEXT:    lwpval $-19088744, %esi, %rdi # imm = 0xFEDCBA98
33; X64-NEXT:    retq
34  tail call void @llvm.x86.lwpval64(i64 %a0, i32 %a1, i32 4275878552)
35  ret void
36}
37
38define void @test_lwpval64_rmi(i64 %a0, i32 *%p1) nounwind {
39; X64-LABEL: test_lwpval64_rmi:
40; X64:       # %bb.0:
41; X64-NEXT:    lwpval $305419896, (%rsi), %rdi # imm = 0x12345678
42; X64-NEXT:    retq
43  %a1 = load i32, i32 *%p1
44  tail call void @llvm.x86.lwpval64(i64 %a0, i32 %a1, i32 305419896)
45  ret void
46}
47
48declare i8 @llvm.x86.lwpins64(i64, i32, i32) nounwind
49declare void @llvm.x86.lwpval64(i64, i32, i32) nounwind
50