1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
3; RUN: llc < %s -mtriple=i386-unknown-unknown   | FileCheck %s --check-prefix=X32
4
5define i8 @select_i8_neg1_or_0(i1 %a) {
6; X64-LABEL: select_i8_neg1_or_0:
7; X64:       # %bb.0:
8; X64-NEXT:    movl %edi, %eax
9; X64-NEXT:    andb $1, %al
10; X64-NEXT:    negb %al
11; X64-NEXT:    # kill: def $al killed $al killed $eax
12; X64-NEXT:    retq
13;
14; X32-LABEL: select_i8_neg1_or_0:
15; X32:       # %bb.0:
16; X32-NEXT:    movb {{[0-9]+}}(%esp), %al
17; X32-NEXT:    andb $1, %al
18; X32-NEXT:    negb %al
19; X32-NEXT:    retl
20  %b = sext i1 %a to i8
21  ret i8 %b
22}
23
24define i8 @select_i8_neg1_or_0_zeroext(i1 zeroext %a) {
25; X64-LABEL: select_i8_neg1_or_0_zeroext:
26; X64:       # %bb.0:
27; X64-NEXT:    movl %edi, %eax
28; X64-NEXT:    negb %al
29; X64-NEXT:    # kill: def $al killed $al killed $eax
30; X64-NEXT:    retq
31;
32; X32-LABEL: select_i8_neg1_or_0_zeroext:
33; X32:       # %bb.0:
34; X32-NEXT:    movb {{[0-9]+}}(%esp), %al
35; X32-NEXT:    negb %al
36; X32-NEXT:    retl
37  %b = sext i1 %a to i8
38  ret i8 %b
39}
40
41define i16 @select_i16_neg1_or_0(i1 %a) {
42; X64-LABEL: select_i16_neg1_or_0:
43; X64:       # %bb.0:
44; X64-NEXT:    movl %edi, %eax
45; X64-NEXT:    andl $1, %eax
46; X64-NEXT:    negl %eax
47; X64-NEXT:    # kill: def $ax killed $ax killed $eax
48; X64-NEXT:    retq
49;
50; X32-LABEL: select_i16_neg1_or_0:
51; X32:       # %bb.0:
52; X32-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
53; X32-NEXT:    andl $1, %eax
54; X32-NEXT:    negl %eax
55; X32-NEXT:    # kill: def $ax killed $ax killed $eax
56; X32-NEXT:    retl
57  %b = sext i1 %a to i16
58  ret i16 %b
59}
60
61define i16 @select_i16_neg1_or_0_zeroext(i1 zeroext %a) {
62; X64-LABEL: select_i16_neg1_or_0_zeroext:
63; X64:       # %bb.0:
64; X64-NEXT:    movl %edi, %eax
65; X64-NEXT:    negl %eax
66; X64-NEXT:    # kill: def $ax killed $ax killed $eax
67; X64-NEXT:    retq
68;
69; X32-LABEL: select_i16_neg1_or_0_zeroext:
70; X32:       # %bb.0:
71; X32-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
72; X32-NEXT:    negl %eax
73; X32-NEXT:    # kill: def $ax killed $ax killed $eax
74; X32-NEXT:    retl
75  %b = sext i1 %a to i16
76  ret i16 %b
77}
78
79define i32 @select_i32_neg1_or_0(i1 %a) {
80; X64-LABEL: select_i32_neg1_or_0:
81; X64:       # %bb.0:
82; X64-NEXT:    movl %edi, %eax
83; X64-NEXT:    andl $1, %eax
84; X64-NEXT:    negl %eax
85; X64-NEXT:    retq
86;
87; X32-LABEL: select_i32_neg1_or_0:
88; X32:       # %bb.0:
89; X32-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
90; X32-NEXT:    andl $1, %eax
91; X32-NEXT:    negl %eax
92; X32-NEXT:    retl
93  %b = sext i1 %a to i32
94  ret i32 %b
95}
96
97define i32 @select_i32_neg1_or_0_zeroext(i1 zeroext %a) {
98; X64-LABEL: select_i32_neg1_or_0_zeroext:
99; X64:       # %bb.0:
100; X64-NEXT:    movl %edi, %eax
101; X64-NEXT:    negl %eax
102; X64-NEXT:    retq
103;
104; X32-LABEL: select_i32_neg1_or_0_zeroext:
105; X32:       # %bb.0:
106; X32-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
107; X32-NEXT:    negl %eax
108; X32-NEXT:    retl
109  %b = sext i1 %a to i32
110  ret i32 %b
111}
112
113define i64 @select_i64_neg1_or_0(i1 %a) {
114; X64-LABEL: select_i64_neg1_or_0:
115; X64:       # %bb.0:
116; X64-NEXT:    movl %edi, %eax
117; X64-NEXT:    andl $1, %eax
118; X64-NEXT:    negq %rax
119; X64-NEXT:    retq
120;
121; X32-LABEL: select_i64_neg1_or_0:
122; X32:       # %bb.0:
123; X32-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
124; X32-NEXT:    andl $1, %eax
125; X32-NEXT:    negl %eax
126; X32-NEXT:    movl %eax, %edx
127; X32-NEXT:    retl
128  %b = sext i1 %a to i64
129  ret i64 %b
130}
131
132define i64 @select_i64_neg1_or_0_zeroext(i1 zeroext %a) {
133; X64-LABEL: select_i64_neg1_or_0_zeroext:
134; X64:       # %bb.0:
135; X64-NEXT:    movl %edi, %eax
136; X64-NEXT:    negq %rax
137; X64-NEXT:    retq
138;
139; X32-LABEL: select_i64_neg1_or_0_zeroext:
140; X32:       # %bb.0:
141; X32-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
142; X32-NEXT:    negl %eax
143; X32-NEXT:    movl %eax, %edx
144; X32-NEXT:    retl
145  %b = sext i1 %a to i64
146  ret i64 %b
147}
148
149