1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mcpu=corei7-avx -enable-misched=false | FileCheck %s
3
4define i64 @main(i1 %tobool1) nounwind {
5; CHECK-LABEL: main:
6; CHECK:       # %bb.0: # %entry
7; CHECK-NEXT:    pushl %esi
8; CHECK-NEXT:    testb $1, {{[0-9]+}}(%esp)
9; CHECK-NEXT:    movl $-12, %eax
10; CHECK-NEXT:    movl $-1, %edx
11; CHECK-NEXT:    cmovel %edx, %eax
12; CHECK-NEXT:    xorl %ecx, %ecx
13; CHECK-NEXT:    movl %eax, %esi
14; CHECK-NEXT:    addl $-1, %esi
15; CHECK-NEXT:    movl $-1, %esi
16; CHECK-NEXT:    adcl $-1, %esi
17; CHECK-NEXT:    cmovsl %ecx, %eax
18; CHECK-NEXT:    cmovsl %ecx, %edx
19; CHECK-NEXT:    popl %esi
20; CHECK-NEXT:    retl
21entry:
22  %0 = zext i1 %tobool1 to i32
23  %. = xor i32 %0, 1
24  %.21 = select i1 %tobool1, i32 -12, i32 -1
25  %conv = sext i32 %.21 to i64
26  %1 = add i64 %conv, -1
27  %cmp10 = icmp slt i64 %1, 0
28  %sub17 = select i1 %cmp10, i64 0, i64 %conv
29  ret i64 %sub17
30}
31