1; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s
2
3@d = global i32 0, align 4
4
5; Verify the sar happens before ecx is clobbered with the parameter being
6; passed to fn3
7; CHECK-LABEL: fn4
8; CHECK: movb d, %cl
9; CHECK: sarl %cl
10; CHECK: movl $2, %ecx
11define i32 @fn4(i32 %i) #0 {
12entry:
13  %0 = load i32, i32* @d, align 4
14  %shr = ashr i32 %i, %0
15  tail call fastcc void @fn3(i32 2, i32 5, i32 %shr, i32 %i)
16  %cmp = icmp slt i32 %shr, 1
17  %. = zext i1 %cmp to i32
18  ret i32 %.
19}
20
21declare void @fn3(i32 %p1, i32 %p2, i32 %p3, i32 %p4) #0
22
23attributes #0 = { nounwind }
24