1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mcpu=corei7 | FileCheck %s --check-prefixes=CHECK,X86
3; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s --check-prefixes=CHECK,X64
4
5define i32 @mul_f(<4 x i8>* %A) {
6; X86-LABEL: mul_f:
7; X86:       # %bb.0: # %entry
8; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
9; X86-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
10; X86-NEXT:    pmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
11; X86-NEXT:    pmullw %xmm0, %xmm0
12; X86-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,u,u,u,u,u,u,u,u,u,u,u,u]
13; X86-NEXT:    movd %xmm0, (%eax)
14; X86-NEXT:    xorl %eax, %eax
15; X86-NEXT:    retl
16;
17; X64-LABEL: mul_f:
18; X64:       # %bb.0: # %entry
19; X64-NEXT:    pmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
20; X64-NEXT:    pmullw %xmm0, %xmm0
21; X64-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,u,u,u,u,u,u,u,u,u,u,u,u]
22; X64-NEXT:    movd %xmm0, (%rax)
23; X64-NEXT:    xorl %eax, %eax
24; X64-NEXT:    retq
25entry:
26  %0 = load <4 x i8>, <4 x i8>* %A, align 8
27  %mul = mul <4 x i8> %0, %0
28  store <4 x i8> %mul, <4 x i8>* undef
29  ret i32 0
30}
31
32define i32 @shuff_f(<4 x i8>* %A) {
33; X86-LABEL: shuff_f:
34; X86:       # %bb.0: # %entry
35; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
36; X86-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
37; X86-NEXT:    paddb %xmm0, %xmm0
38; X86-NEXT:    movd %xmm0, (%eax)
39; X86-NEXT:    xorl %eax, %eax
40; X86-NEXT:    retl
41;
42; X64-LABEL: shuff_f:
43; X64:       # %bb.0: # %entry
44; X64-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
45; X64-NEXT:    paddb %xmm0, %xmm0
46; X64-NEXT:    movd %xmm0, (%rax)
47; X64-NEXT:    xorl %eax, %eax
48; X64-NEXT:    retq
49entry:
50  %0 = load <4 x i8>, <4 x i8>* %A, align 8
51  %add = add <4 x i8> %0, %0
52  store <4 x i8> %add, <4 x i8>* undef
53  ret i32 0
54}
55
56define <2 x float> @bitcast_widen(<4 x i32> %in) nounwind readnone {
57; CHECK-LABEL: bitcast_widen:
58; CHECK:       # %bb.0: # %entry
59; CHECK-NEXT:    ret{{[l|q]}}
60entry:
61 %x = shufflevector <4 x i32> %in, <4 x i32> undef, <2 x i32> <i32 0, i32 1>
62 %y = bitcast <2 x i32> %x to <2 x float>
63 ret <2 x float> %y
64}
65