1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-- | FileCheck %s
3
4; These tests differ from the ones in zext-inreg-0.ll in that
5; on x86-64 they do require and instructions.
6
7; These should use movzbl instead of 'and 255'.
8; This related to not having ZERO_EXTEND_REG node.
9
10define i64 @l(i64 %d) nounwind  {
11; CHECK-LABEL: l:
12; CHECK:       # %bb.0:
13; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
14; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %ecx
15; CHECK-NEXT:    addl $1, %eax
16; CHECK-NEXT:    adcl $0, %ecx
17; CHECK-NEXT:    movzbl %cl, %edx
18; CHECK-NEXT:    retl
19        %e = add i64 %d, 1
20        %retval = and i64 %e, 1099511627775
21        ret i64 %retval
22}
23define i64 @m(i64 %d) nounwind  {
24; CHECK-LABEL: m:
25; CHECK:       # %bb.0:
26; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
27; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %ecx
28; CHECK-NEXT:    addl $1, %eax
29; CHECK-NEXT:    adcl $0, %ecx
30; CHECK-NEXT:    movzwl %cx, %edx
31; CHECK-NEXT:    retl
32        %e = add i64 %d, 1
33        %retval = and i64 %e, 281474976710655
34        ret i64 %retval
35}
36