1# RUN: llc -mtriple=x86_64-unknown-unknown %s -o - -run-pass=simple-register-coalescing | FileCheck %s
2# PR40010: DBG_VALUEs do not contribute to the liveness of virtual registers,
3# and the register coalescer would merge new live values on top of DBG_VALUEs,
4# leading to them presenting new (wrong) values to the debugger. Test that
5# when out of liveness, coalescing will mark DBG_VALUEs in non-live locations
6# as undef.
7--- |
8  ; ModuleID = './test.ll'
9  source_filename = "./test.ll"
10  target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
11
12  ; Function Attrs: nounwind readnone speculatable
13  declare void @llvm.dbg.value(metadata, metadata, metadata) #0
14
15  ; Original IR source here:
16  define i32 @test(i32* %pin) {
17  entry:
18    br label %start.test1
19
20  start.test1:                                       ; preds = %start, %entry
21    %foo = phi i32 [ 0, %entry ], [ %bar, %start.test1 ]
22    %baz = load i32, i32* %pin, align 1
23    %qux = xor i32 %baz, 1234
24    %bar = add i32 %qux, %foo
25    call void @llvm.dbg.value(metadata i32 %foo, metadata !3, metadata !DIExpression()), !dbg !5
26    %cmp = icmp ugt i32 %bar, 1000000
27    br i1 %cmp, label %leave, label %start.test1
28
29  leave:                                            ; preds = %start
30    ret i32 %bar
31  }
32
33  ; Stubs to appease the MIR parser
34  define i32 @test2(i32* %pin) {
35  entry:
36    ret i32 0
37  start.test2:
38    ret i32 0
39  leave:
40    ret i32 0
41  }
42
43  ; Function Attrs: nounwind
44  declare void @llvm.stackprotector(i8*, i8**) #1
45
46  attributes #0 = { nounwind readnone speculatable }
47  attributes #1 = { nounwind }
48
49  !llvm.module.flags = !{!0}
50  !llvm.dbg.cu = !{!1}
51
52  !0 = !{i32 2, !"Debug Info Version", i32 3}
53  !1 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !2, producer: "beards", isOptimized: true, runtimeVersion: 4, emissionKind: FullDebug)
54  !2 = !DIFile(filename: "bees.cpp", directory: "")
55  !3 = !DILocalVariable(name: "bees", scope: !4)
56  !4 = distinct !DISubprogram(name: "nope", scope: !1, file: !2, line: 1, spFlags: DISPFlagDefinition, unit: !1)
57  !5 = !DILocation(line: 0, scope: !4)
58
59...
60---
61name:            test
62tracksRegLiveness: true
63body:             |
64  bb.0.entry:
65    successors: %bb.1(0x80000000)
66    liveins: $rdi
67
68    %2:gr64 = COPY killed $rdi
69    %3:gr32 = MOV32r0 implicit-def dead $eflags
70    %4:gr32 = MOV32ri 1234
71    %7:gr32 = COPY killed %3
72
73  bb.1.start.test1:
74    successors: %bb.2(0x04000000), %bb.1(0x7c000000)
75
76    ; CHECK-LABEL: name: test
77    ;
78    ; We currently expect %1 and %0 to merge into %7
79    ;
80    ; CHECK: %[[REG1:[0-9]+]]:gr32 = MOV32rm
81    ; CHECK-NEXT: %[[REG2:[0-9]+]]:gr32 = XOR32rr %[[REG1]]
82    ; CHECK-NEXT: %[[REG3:[0-9]+]]:gr32 = ADD32rr %[[REG3]], %[[REG2]]
83    ; CHECK-NEXT: DBG_VALUE $noreg
84
85    %0:gr32 = COPY killed %7
86    %8:gr32 = MOV32rm %2, 1, $noreg, 0, $noreg :: (load 4 from %ir.pin, align 1)
87    %5:gr32 = COPY killed %8
88    %5:gr32 = XOR32rr %5, %4, implicit-def dead $eflags
89    %1:gr32 = COPY killed %0
90    %1:gr32 = ADD32rr %1, killed %5, implicit-def dead $eflags
91    DBG_VALUE %0, $noreg, !3, !DIExpression(), debug-location !5
92    CMP32ri %1, 1000001, implicit-def $eflags
93    %7:gr32 = COPY %1
94    JCC_1 %bb.1, 2, implicit killed $eflags
95    JMP_1 %bb.2
96
97  bb.2.leave:
98    $eax = COPY killed %1
99    RET 0, killed $eax
100
101...
102---
103name:            test2
104tracksRegLiveness: true
105body:             |
106  bb.0.entry:
107    successors: %bb.1(0x80000000)
108    liveins: $rdi
109
110    %2:gr64 = COPY killed $rdi
111    %3:gr32 = MOV32r0 implicit-def dead $eflags
112    %4:gr32 = MOV32ri 1234
113    %7:gr32 = COPY killed %3
114
115  bb.1.start.test2:
116    successors: %bb.2(0x04000000), %bb.1(0x7c000000)
117
118    ; CHECK-LABEL: name: test2
119    ;
120    ; %0 should be merged into %7, but as %0 is live at this location the
121    ; DBG_VALUE should be preserved and point at the operand of ADD32rr.
122    ; RegisterCoalescer resolves %0 as CR_Erase: %0 is a redundant copy and
123    ; can be erased.
124    ;
125    ; CHECK: %[[REG11:[0-9]+]]:gr32 = MOV32rm
126    ; CHECK-NEXT: %[[REG12:[0-9]+]]:gr32 = XOR32rr %[[REG11]]
127    ; CHECK-NEXT: DBG_VALUE %[[REG13:[0-9]+]]
128    ; CHECK-NEXT: %[[REG13]]:gr32 = ADD32rr %[[REG13]], %[[REG12]]
129
130    %0:gr32 = COPY killed %7
131    %8:gr32 = MOV32rm %2, 1, $noreg, 0, $noreg :: (load 4 from %ir.pin, align 1)
132    %8:gr32 = XOR32rr %8, %4, implicit-def dead $eflags
133    DBG_VALUE %0, $noreg, !3, !DIExpression(), debug-location !5
134    %0:gr32 = ADD32rr %0, killed %8, implicit-def dead $eflags
135    CMP32ri %0, 1000001, implicit-def $eflags
136    %7:gr32 = COPY %0
137    JCC_1 %bb.1, 2, implicit killed $eflags
138    JMP_1 %bb.2
139
140  bb.2.leave:
141    $eax = COPY killed %7
142    RET 0, killed $eax
143
144...
145
146