1// RUN: not llvm-mc -triple armv8a   -show-encoding -mattr=+i8mm < %s 2>&1 | FileCheck %s
2// RUN: not llvm-mc -triple thumbv8a -show-encoding -mattr=+i8mm < %s 2>&1 | FileCheck %s
3
4
5// VSMMLA, VUMMLA, VUSMMLA
6
7// Data type specifier must match instruction
8
9vsmmla.u8 q0, q1, q2
10// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
11// CHECK-NEXT:    vsmmla.u8 q0, q1, q2
12// CHECK-NEXT: {{^      \^}}
13
14vummla.s8 q0, q1, q2
15// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
16// CHECK-NEXT:    vummla.s8 q0, q1, q2
17// CHECK-NEXT: {{^      \^}}
18
19vusmmla.u8 q0, q1, q2
20// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
21// CHECK-NEXT:    vusmmla.u8 q0, q1, q2
22// CHECK-NEXT: {{^       \^}}
23
24
25// Incorrect register type
26
27vsmmla.s8 d0, q1, q2
28// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [q0, q15]
29// CHECK-NEXT:    vsmmla.s8 d0, q1, q2
30// CHECK-NEXT: {{^          \^}}
31
32vummla.u8 q0, d1, q2
33// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [q0, q15]
34// CHECK-NEXT:    vummla.u8 q0, d1, q2
35// CHECK-NEXT: {{^              \^}}
36
37vusmmla.s8 q0, q1, d2
38// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [q0, q15]
39// CHECK-NEXT:    vusmmla.s8 q0, q1, d2
40// CHECK-NEXT: {{^                   \^}}
41
42
43// VUSDOT (vector)
44
45// Data type specifier must match instruction
46
47vusdot.u8 q0, q1, q2
48// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
49// CHECK-NEXT:    vusdot.u8 q0, q1, q2
50// CHECK-NEXT: {{^      \^}}
51
52// Mis-matched register types
53
54vusdot.s8 q0, d1, d2
55// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [d0, d31]
56vusdot.s8 d0, q1, d2
57// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [d0, d31]
58vusdot.s8 d0, d1, q2
59// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [d0, d31]
60
61
62// VUSDOT, VSUDOT (by scalar)
63
64// Data type specifier must match instruction
65
66vusdot.u8 d0, d1, d2[0]
67// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
68// CHECK-NEXT:    vusdot.u8 d0, d1, d2[0]
69// CHECK-NEXT: {{^      \^}}
70
71vsudot.s8 d0, d1, d2[0]
72// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
73// CHECK-NEXT:    vsudot.s8 d0, d1, d2[0]
74// CHECK-NEXT: {{^      \^}}
75
76// Incorrect register types
77
78vusdot.s8 q0, d1, d2[0]
79// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid instruction, any one of the following would fix this:
80// CHECK-NEXT: vusdot.s8 q0, d1, d2[0]
81// CHECK: [[@LINE-3]]:{{[0-9]+}}: note: operand must be a register in range [d0, d31]
82// CHECK-NEXT: vusdot.s8 q0, d1, d2[0]
83// CHECK-NEXT: {{^       \^}}
84// CHECK: [[@LINE-6]]:{{[0-9]+}}: note: operand must be a register in range [q0, q15]
85// CHECK-NEXT: vusdot.s8 q0, d1, d2[0]
86// CHECK-NEXT: {{^           \^}}
87
88vusdot.s8 d0, q1, d2[0]
89// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid instruction, any one of the following would fix this:
90// CHECK-NEXT: vusdot.s8 d0, q1, d2[0]
91// CHECK: [[@LINE-3]]:{{[0-9]+}}: note: operand must be a register in range [d0, d31]
92// CHECK-NEXT: vusdot.s8 d0, q1, d2[0]
93// CHECK-NEXT: {{^           \^}}
94// CHECK: [[@LINE-6]]:{{[0-9]+}}: note: operand must be a register in range [q0, q15]
95// CHECK-NEXT: vusdot.s8 d0, q1, d2[0]
96// CHECK-NEXT: {{^       \^}}
97
98vusdot.s8 q0, q1, q2[0]
99// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid instruction, any one of the following would fix this:
100// CHECK-NEXT: vusdot.s8 q0, q1, q2[0]
101// CHECK: [[@LINE-3]]:{{[0-9]+}}: note: operand must be a register in range [d0, d15]
102// CHECK-NEXT: vusdot.s8 q0, q1, q2[0]
103// CHECK-NEXT: {{^               \^}}
104// CHECK: [[@LINE-6]]:{{[0-9]+}}: note: too many operands for instruction
105// CHECK-NEXT: vusdot.s8 q0, q1, q2[0]
106// CHECK-NEXT: {{^                 \^}}
107
108// Out of range lane index
109
110vusdot.s8 d0, d1, d2[2]
111// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
112vsudot.u8 q0, q1, d2[2]
113// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
114