1// RUN: llvm-mc -triple armv7a < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v7A
2// RUN: llvm-mc -triple armv6m < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v6M
3// RUN: llvm-mc -triple armv7m < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v7M
4// RUN: llvm-mc -triple armv7a -mcpu=cortex-a15 < %s -arm-add-build-attributes | FileCheck %s --check-prefix=Cortex-A15
5// RUN: llvm-mc -triple armv8m.base < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v8M_Baseline
6// RUN: llvm-mc -triple armv8m.main < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v8M_Mainline
7
8// This isn't intended to be a through check of the build attributes emitted
9// for each target (that's tested elsewhere), but just to check that the
10// hardware attributes are emitted by the assembler based on the selected
11// target when requested.
12
13// v7A-NOT: .cpu
14// v7A: .eabi_attribute 6, 10   @ Tag_CPU_arch
15// v7A: .eabi_attribute 7, 65   @ Tag_CPU_arch_profile
16// v7A: .eabi_attribute 8, 1    @ Tag_ARM_ISA_use
17// v7A: .eabi_attribute 9, 2    @ Tag_THUMB_ISA_use
18// v7A: .fpu    neon
19// v7A: .eabi_attribute 34, 1   @ Tag_CPU_unaligned_access
20
21// v6M-NOT: .cpu
22// v6M: .eabi_attribute 6, 12   @ Tag_CPU_arch
23// v6M: .eabi_attribute 7, 77   @ Tag_CPU_arch_profile
24// v6M: .eabi_attribute 8, 0    @ Tag_ARM_ISA_use
25// v6M: .eabi_attribute 9, 1    @ Tag_THUMB_ISA_use
26// v6M: .eabi_attribute 34, 0   @ Tag_CPU_unaligned_access
27
28// v7M-NOT: .cpu
29// v7M: .eabi_attribute 6, 10   @ Tag_CPU_arch
30// v7M: .eabi_attribute 7, 77   @ Tag_CPU_arch_profile
31// v7M: .eabi_attribute 8, 0    @ Tag_ARM_ISA_use
32// v7M: .eabi_attribute 9, 2    @ Tag_THUMB_ISA_use
33// v7M: .eabi_attribute 34, 1   @ Tag_CPU_unaligned_access
34
35// v8M_Baseline-NOT: .cpu
36// v8M_Baseline: .eabi_attribute 6, 16   @ Tag_CPU_arch
37// v8M_Baseline: .eabi_attribute 7, 77   @ Tag_CPU_arch_profile
38// v8M_Baseline: .eabi_attribute 8, 0    @ Tag_ARM_ISA_use
39// v8M_Baseline: .eabi_attribute 9, 3    @ Tag_THUMB_ISA_use
40// v8M_Baseline: .eabi_attribute 34, 0   @ Tag_CPU_unaligned_access
41
42// v8M_Mainline-NOT: .cpu
43// v8M_Mainline: .eabi_attribute 6, 17   @ Tag_CPU_arch
44// v8M_Mainline: .eabi_attribute 7, 77   @ Tag_CPU_arch_profile
45// v8M_Mainline: .eabi_attribute 8, 0    @ Tag_ARM_ISA_use
46// v8M_Mainline: .eabi_attribute 9, 3    @ Tag_THUMB_ISA_use
47// v8M_Mainline: .eabi_attribute 34, 1   @ Tag_CPU_unaligned_access
48
49// Cortex-A15: .cpu    cortex-a15
50// Cortex-A15: .eabi_attribute 6, 10   @ Tag_CPU_arch
51// Cortex-A15: .eabi_attribute 7, 65   @ Tag_CPU_arch_profile
52// Cortex-A15: .eabi_attribute 8, 1    @ Tag_ARM_ISA_use
53// Cortex-A15: .eabi_attribute 9, 2    @ Tag_THUMB_ISA_use
54// Cortex-A15: .fpu    neon-vfpv4
55// Cortex-A15: .eabi_attribute 36, 1   @ Tag_FP_HP_extension
56// Cortex-A15: .eabi_attribute 42, 1   @ Tag_MPextension_use
57// Cortex-A15: .eabi_attribute 44, 2   @ Tag_DIV_use
58// Cortex-A15: .eabi_attribute 34, 1   @ Tag_CPU_unaligned_access
59// Cortex-A15: .eabi_attribute 68, 3   @ Tag_Virtualization_use
60