1# RUN: llvm-mc -triple aarch64-none-linux-gnu -disassemble < %s | FileCheck %s
2# RUN: llvm-mc -triple arm64-none-linux-gnu -disassemble < %s | FileCheck %s
3
40x8 0x3 0x31 0xd5
5# CHECK: mrs      x8, {{trcstatr|TRCSTATR}}
60xc9 0x0 0x31 0xd5
7# CHECK: mrs      x9, {{trcidr8|TRCIDR8}}
80xcb 0x1 0x31 0xd5
9# CHECK: mrs      x11, {{trcidr9|TRCIDR9}}
100xd9 0x2 0x31 0xd5
11# CHECK: mrs      x25, {{trcidr10|TRCIDR10}}
120xc7 0x3 0x31 0xd5
13# CHECK: mrs      x7, {{trcidr11|TRCIDR11}}
140xc7 0x4 0x31 0xd5
15# CHECK: mrs      x7, {{trcidr12|TRCIDR12}}
160xc6 0x5 0x31 0xd5
17# CHECK: mrs      x6, {{trcidr13|TRCIDR13}}
180xfb 0x8 0x31 0xd5
19# CHECK: mrs      x27, {{trcidr0|TRCIDR0}}
200xfd 0x9 0x31 0xd5
21# CHECK: mrs      x29, {{trcidr1|TRCIDR1}}
220xe4 0xa 0x31 0xd5
23# CHECK: mrs      x4, {{trcidr2|TRCIDR2}}
240xe8 0xb 0x31 0xd5
25# CHECK: mrs      x8, {{trcidr3|TRCIDR3}}
260xef 0xc 0x31 0xd5
27# CHECK: mrs      x15, {{trcidr4|TRCIDR4}}
280xf4 0xd 0x31 0xd5
29# CHECK: mrs      x20, {{trcidr5|TRCIDR5}}
300xe6 0xe 0x31 0xd5
31# CHECK: mrs      x6, {{trcidr6|TRCIDR6}}
320xe6 0xf 0x31 0xd5
33# CHECK: mrs      x6, {{trcidr7|TRCIDR7}}
340x98 0x11 0x31 0xd5
35# CHECK: mrs      x24, {{trcoslsr|TRCOSLSR}}
360x92 0x15 0x31 0xd5
37# CHECK: mrs      x18, {{trcpdsr|TRCPDSR}}
380xdc 0x7a 0x31 0xd5
39# CHECK: mrs      x28, {{trcdevaff0|TRCDEVAFF0}}
400xc5 0x7b 0x31 0xd5
41# CHECK: mrs      x5, {{trcdevaff1|TRCDEVAFF1}}
420xc5 0x7d 0x31 0xd5
43# CHECK: mrs      x5, {{trclsr|TRCLSR}}
440xcb 0x7e 0x31 0xd5
45# CHECK: mrs      x11, {{trcauthstatus|TRCAUTHSTATUS}}
460xcd 0x7f 0x31 0xd5
47# CHECK: mrs      x13, {{trcdevarch|TRCDEVARCH}}
480xf2 0x72 0x31 0xd5
49# CHECK: mrs      x18, {{trcdevid|TRCDEVID}}
500xf6 0x73 0x31 0xd5
51# CHECK: mrs      x22, {{trcdevtype|TRCDEVTYPE}}
520xee 0x74 0x31 0xd5
53# CHECK: mrs      x14, {{trcpidr4|TRCPIDR4}}
540xe5 0x75 0x31 0xd5
55# CHECK: mrs      x5, {{trcpidr5|TRCPIDR5}}
560xe5 0x76 0x31 0xd5
57# CHECK: mrs      x5, {{trcpidr6|TRCPIDR6}}
580xe9 0x77 0x31 0xd5
59# CHECK: mrs      x9, {{trcpidr7|TRCPIDR7}}
600xef 0x78 0x31 0xd5
61# CHECK: mrs      x15, {{trcpidr0|TRCPIDR0}}
620xe6 0x79 0x31 0xd5
63# CHECK: mrs      x6, {{trcpidr1|TRCPIDR1}}
640xeb 0x7a 0x31 0xd5
65# CHECK: mrs      x11, {{trcpidr2|TRCPIDR2}}
660xf4 0x7b 0x31 0xd5
67# CHECK: mrs      x20, {{trcpidr3|TRCPIDR3}}
680xf1 0x7c 0x31 0xd5
69# CHECK: mrs      x17, {{trccidr0|TRCCIDR0}}
700xe2 0x7d 0x31 0xd5
71# CHECK: mrs      x2, {{trccidr1|TRCCIDR1}}
720xf4 0x7e 0x31 0xd5
73# CHECK: mrs      x20, {{trccidr2|TRCCIDR2}}
740xe4 0x7f 0x31 0xd5
75# CHECK: mrs      x4, {{trccidr3|TRCCIDR3}}
760xb 0x1 0x31 0xd5
77# CHECK: mrs      x11, {{trcprgctlr|TRCPRGCTLR}}
780x17 0x2 0x31 0xd5
79# CHECK: mrs      x23, {{trcprocselr|TRCPROCSELR}}
800xd 0x4 0x31 0xd5
81# CHECK: mrs      x13, {{trcconfigr|TRCCONFIGR}}
820x17 0x6 0x31 0xd5
83# CHECK: mrs      x23, {{trcauxctlr|TRCAUXCTLR}}
840x9 0x8 0x31 0xd5
85# CHECK: mrs      x9, {{trceventctl0r|TRCEVENTCTL0R}}
860x10 0x9 0x31 0xd5
87# CHECK: mrs      x16, {{trceventctl1r|TRCEVENTCTL1R}}
880x4 0xb 0x31 0xd5
89# CHECK: mrs      x4, {{trcstallctlr|TRCSTALLCTLR}}
900xe 0xc 0x31 0xd5
91# CHECK: mrs      x14, {{trctsctlr|TRCTSCTLR}}
920x18 0xd 0x31 0xd5
93# CHECK: mrs      x24, {{trcsyncpr|TRCSYNCPR}}
940x1c 0xe 0x31 0xd5
95# CHECK: mrs      x28, {{trcccctlr|TRCCCCTLR}}
960xf 0xf 0x31 0xd5
97# CHECK: mrs      x15, {{trcbbctlr|TRCBBCTLR}}
980x21 0x0 0x31 0xd5
99# CHECK: mrs      x1, {{trctraceidr|TRCTRACEIDR}}
1000x34 0x1 0x31 0xd5
101# CHECK: mrs      x20, {{trcqctlr|TRCQCTLR}}
1020x42 0x0 0x31 0xd5
103# CHECK: mrs      x2, {{trcvictlr|TRCVICTLR}}
1040x4c 0x1 0x31 0xd5
105# CHECK: mrs      x12, {{trcviiectlr|TRCVIIECTLR}}
1060x50 0x2 0x31 0xd5
107# CHECK: mrs      x16, {{trcvissctlr|TRCVISSCTLR}}
1080x48 0x3 0x31 0xd5
109# CHECK: mrs      x8, {{trcvipcssctlr|TRCVIPCSSCTLR}}
1100x5b 0x8 0x31 0xd5
111# CHECK: mrs      x27, {{trcvdctlr|TRCVDCTLR}}
1120x49 0x9 0x31 0xd5
113# CHECK: mrs      x9, {{trcvdsacctlr|TRCVDSACCTLR}}
1140x40 0xa 0x31 0xd5
115# CHECK: mrs      x0, {{trcvdarcctlr|TRCVDARCCTLR}}
1160x8d 0x0 0x31 0xd5
117# CHECK: mrs      x13, {{trcseqevr0|TRCSEQEVR0}}
1180x8b 0x1 0x31 0xd5
119# CHECK: mrs      x11, {{trcseqevr1|TRCSEQEVR1}}
1200x9a 0x2 0x31 0xd5
121# CHECK: mrs      x26, {{trcseqevr2|TRCSEQEVR2}}
1220x8e 0x6 0x31 0xd5
123# CHECK: mrs      x14, {{trcseqrstevr|TRCSEQRSTEVR}}
1240x84 0x7 0x31 0xd5
125# CHECK: mrs      x4, {{trcseqstr|TRCSEQSTR}}
1260x91 0x8 0x31 0xd5
127# CHECK: mrs      x17, {{trcextinselr|TRCEXTINSELR}}
1280xb5 0x0 0x31 0xd5
129# CHECK: mrs      x21, {{trccntrldvr0|TRCCNTRLDVR0}}
1300xaa 0x1 0x31 0xd5
131# CHECK: mrs      x10, {{trccntrldvr1|TRCCNTRLDVR1}}
1320xb4 0x2 0x31 0xd5
133# CHECK: mrs      x20, {{trccntrldvr2|TRCCNTRLDVR2}}
1340xa5 0x3 0x31 0xd5
135# CHECK: mrs      x5, {{trccntrldvr3|TRCCNTRLDVR3}}
1360xb1 0x4 0x31 0xd5
137# CHECK: mrs      x17, {{trccntctlr0|TRCCNTCTLR0}}
1380xa1 0x5 0x31 0xd5
139# CHECK: mrs      x1, {{trccntctlr1|TRCCNTCTLR1}}
1400xb1 0x6 0x31 0xd5
141# CHECK: mrs      x17, {{trccntctlr2|TRCCNTCTLR2}}
1420xa6 0x7 0x31 0xd5
143# CHECK: mrs      x6, {{trccntctlr3|TRCCNTCTLR3}}
1440xbc 0x8 0x31 0xd5
145# CHECK: mrs      x28, {{trccntvr0|TRCCNTVR0}}
1460xb7 0x9 0x31 0xd5
147# CHECK: mrs      x23, {{trccntvr1|TRCCNTVR1}}
1480xa9 0xa 0x31 0xd5
149# CHECK: mrs      x9, {{trccntvr2|TRCCNTVR2}}
1500xa6 0xb 0x31 0xd5
151# CHECK: mrs      x6, {{trccntvr3|TRCCNTVR3}}
1520xf8 0x0 0x31 0xd5
153# CHECK: mrs      x24, {{trcimspec0|TRCIMSPEC0}}
1540xf8 0x1 0x31 0xd5
155# CHECK: mrs      x24, {{trcimspec1|TRCIMSPEC1}}
1560xef 0x2 0x31 0xd5
157# CHECK: mrs      x15, {{trcimspec2|TRCIMSPEC2}}
1580xea 0x3 0x31 0xd5
159# CHECK: mrs      x10, {{trcimspec3|TRCIMSPEC3}}
1600xfd 0x4 0x31 0xd5
161# CHECK: mrs      x29, {{trcimspec4|TRCIMSPEC4}}
1620xf2 0x5 0x31 0xd5
163# CHECK: mrs      x18, {{trcimspec5|TRCIMSPEC5}}
1640xfd 0x6 0x31 0xd5
165# CHECK: mrs      x29, {{trcimspec6|TRCIMSPEC6}}
1660xe2 0x7 0x31 0xd5
167# CHECK: mrs      x2, {{trcimspec7|TRCIMSPEC7}}
1680x8 0x12 0x31 0xd5
169# CHECK: mrs      x8, {{trcrsctlr2|TRCRSCTLR2}}
1700x0 0x13 0x31 0xd5
171# CHECK: mrs      x0, {{trcrsctlr3|TRCRSCTLR3}}
1720xc 0x14 0x31 0xd5
173# CHECK: mrs      x12, {{trcrsctlr4|TRCRSCTLR4}}
1740x1a 0x15 0x31 0xd5
175# CHECK: mrs      x26, {{trcrsctlr5|TRCRSCTLR5}}
1760x1d 0x16 0x31 0xd5
177# CHECK: mrs      x29, {{trcrsctlr6|TRCRSCTLR6}}
1780x11 0x17 0x31 0xd5
179# CHECK: mrs      x17, {{trcrsctlr7|TRCRSCTLR7}}
1800x0 0x18 0x31 0xd5
181# CHECK: mrs      x0, {{trcrsctlr8|TRCRSCTLR8}}
1820x1 0x19 0x31 0xd5
183# CHECK: mrs      x1, {{trcrsctlr9|TRCRSCTLR9}}
1840x11 0x1a 0x31 0xd5
185# CHECK: mrs      x17, {{trcrsctlr10|TRCRSCTLR10}}
1860x15 0x1b 0x31 0xd5
187# CHECK: mrs      x21, {{trcrsctlr11|TRCRSCTLR11}}
1880x1 0x1c 0x31 0xd5
189# CHECK: mrs      x1, {{trcrsctlr12|TRCRSCTLR12}}
1900x8 0x1d 0x31 0xd5
191# CHECK: mrs      x8, {{trcrsctlr13|TRCRSCTLR13}}
1920x18 0x1e 0x31 0xd5
193# CHECK: mrs      x24, {{trcrsctlr14|TRCRSCTLR14}}
1940x0 0x1f 0x31 0xd5
195# CHECK: mrs      x0, {{trcrsctlr15|TRCRSCTLR15}}
1960x22 0x10 0x31 0xd5
197# CHECK: mrs      x2, {{trcrsctlr16|TRCRSCTLR16}}
1980x3d 0x11 0x31 0xd5
199# CHECK: mrs      x29, {{trcrsctlr17|TRCRSCTLR17}}
2000x36 0x12 0x31 0xd5
201# CHECK: mrs      x22, {{trcrsctlr18|TRCRSCTLR18}}
2020x26 0x13 0x31 0xd5
203# CHECK: mrs      x6, {{trcrsctlr19|TRCRSCTLR19}}
2040x3a 0x14 0x31 0xd5
205# CHECK: mrs      x26, {{trcrsctlr20|TRCRSCTLR20}}
2060x3a 0x15 0x31 0xd5
207# CHECK: mrs      x26, {{trcrsctlr21|TRCRSCTLR21}}
2080x24 0x16 0x31 0xd5
209# CHECK: mrs      x4, {{trcrsctlr22|TRCRSCTLR22}}
2100x2c 0x17 0x31 0xd5
211# CHECK: mrs      x12, {{trcrsctlr23|TRCRSCTLR23}}
2120x21 0x18 0x31 0xd5
213# CHECK: mrs      x1, {{trcrsctlr24|TRCRSCTLR24}}
2140x20 0x19 0x31 0xd5
215# CHECK: mrs      x0, {{trcrsctlr25|TRCRSCTLR25}}
2160x31 0x1a 0x31 0xd5
217# CHECK: mrs      x17, {{trcrsctlr26|TRCRSCTLR26}}
2180x28 0x1b 0x31 0xd5
219# CHECK: mrs      x8, {{trcrsctlr27|TRCRSCTLR27}}
2200x2a 0x1c 0x31 0xd5
221# CHECK: mrs      x10, {{trcrsctlr28|TRCRSCTLR28}}
2220x39 0x1d 0x31 0xd5
223# CHECK: mrs      x25, {{trcrsctlr29|TRCRSCTLR29}}
2240x2c 0x1e 0x31 0xd5
225# CHECK: mrs      x12, {{trcrsctlr30|TRCRSCTLR30}}
2260x2b 0x1f 0x31 0xd5
227# CHECK: mrs      x11, {{trcrsctlr31|TRCRSCTLR31}}
2280x52 0x10 0x31 0xd5
229# CHECK: mrs      x18, {{trcssccr0|TRCSSCCR0}}
2300x4c 0x11 0x31 0xd5
231# CHECK: mrs      x12, {{trcssccr1|TRCSSCCR1}}
2320x43 0x12 0x31 0xd5
233# CHECK: mrs      x3, {{trcssccr2|TRCSSCCR2}}
2340x42 0x13 0x31 0xd5
235# CHECK: mrs      x2, {{trcssccr3|TRCSSCCR3}}
2360x55 0x14 0x31 0xd5
237# CHECK: mrs      x21, {{trcssccr4|TRCSSCCR4}}
2380x4a 0x15 0x31 0xd5
239# CHECK: mrs      x10, {{trcssccr5|TRCSSCCR5}}
2400x56 0x16 0x31 0xd5
241# CHECK: mrs      x22, {{trcssccr6|TRCSSCCR6}}
2420x57 0x17 0x31 0xd5
243# CHECK: mrs      x23, {{trcssccr7|TRCSSCCR7}}
2440x57 0x18 0x31 0xd5
245# CHECK: mrs      x23, {{trcsscsr0|TRCSSCSR0}}
2460x53 0x19 0x31 0xd5
247# CHECK: mrs      x19, {{trcsscsr1|TRCSSCSR1}}
2480x59 0x1a 0x31 0xd5
249# CHECK: mrs      x25, {{trcsscsr2|TRCSSCSR2}}
2500x51 0x1b 0x31 0xd5
251# CHECK: mrs      x17, {{trcsscsr3|TRCSSCSR3}}
2520x53 0x1c 0x31 0xd5
253# CHECK: mrs      x19, {{trcsscsr4|TRCSSCSR4}}
2540x4b 0x1d 0x31 0xd5
255# CHECK: mrs      x11, {{trcsscsr5|TRCSSCSR5}}
2560x45 0x1e 0x31 0xd5
257# CHECK: mrs      x5, {{trcsscsr6|TRCSSCSR6}}
2580x49 0x1f 0x31 0xd5
259# CHECK: mrs      x9, {{trcsscsr7|TRCSSCSR7}}
2600x9a 0x14 0x31 0xd5
261# CHECK: mrs      x26, {{trcpdcr|TRCPDCR}}
2620x8 0x20 0x31 0xd5
263# CHECK: mrs      x8, {{trcacvr0|TRCACVR0}}
2640xf 0x22 0x31 0xd5
265# CHECK: mrs      x15, {{trcacvr1|TRCACVR1}}
2660x13 0x24 0x31 0xd5
267# CHECK: mrs      x19, {{trcacvr2|TRCACVR2}}
2680x8 0x26 0x31 0xd5
269# CHECK: mrs      x8, {{trcacvr3|TRCACVR3}}
2700x1c 0x28 0x31 0xd5
271# CHECK: mrs      x28, {{trcacvr4|TRCACVR4}}
2720x3 0x2a 0x31 0xd5
273# CHECK: mrs      x3, {{trcacvr5|TRCACVR5}}
2740x19 0x2c 0x31 0xd5
275# CHECK: mrs      x25, {{trcacvr6|TRCACVR6}}
2760x18 0x2e 0x31 0xd5
277# CHECK: mrs      x24, {{trcacvr7|TRCACVR7}}
2780x26 0x20 0x31 0xd5
279# CHECK: mrs      x6, {{trcacvr8|TRCACVR8}}
2800x23 0x22 0x31 0xd5
281# CHECK: mrs      x3, {{trcacvr9|TRCACVR9}}
2820x38 0x24 0x31 0xd5
283# CHECK: mrs      x24, {{trcacvr10|TRCACVR10}}
2840x23 0x26 0x31 0xd5
285# CHECK: mrs      x3, {{trcacvr11|TRCACVR11}}
2860x2c 0x28 0x31 0xd5
287# CHECK: mrs      x12, {{trcacvr12|TRCACVR12}}
2880x29 0x2a 0x31 0xd5
289# CHECK: mrs      x9, {{trcacvr13|TRCACVR13}}
2900x2e 0x2c 0x31 0xd5
291# CHECK: mrs      x14, {{trcacvr14|TRCACVR14}}
2920x23 0x2e 0x31 0xd5
293# CHECK: mrs      x3, {{trcacvr15|TRCACVR15}}
2940x55 0x20 0x31 0xd5
295# CHECK: mrs      x21, {{trcacatr0|TRCACATR0}}
2960x5a 0x22 0x31 0xd5
297# CHECK: mrs      x26, {{trcacatr1|TRCACATR1}}
2980x48 0x24 0x31 0xd5
299# CHECK: mrs      x8, {{trcacatr2|TRCACATR2}}
3000x56 0x26 0x31 0xd5
301# CHECK: mrs      x22, {{trcacatr3|TRCACATR3}}
3020x46 0x28 0x31 0xd5
303# CHECK: mrs      x6, {{trcacatr4|TRCACATR4}}
3040x5d 0x2a 0x31 0xd5
305# CHECK: mrs      x29, {{trcacatr5|TRCACATR5}}
3060x45 0x2c 0x31 0xd5
307# CHECK: mrs      x5, {{trcacatr6|TRCACATR6}}
3080x52 0x2e 0x31 0xd5
309# CHECK: mrs      x18, {{trcacatr7|TRCACATR7}}
3100x62 0x20 0x31 0xd5
311# CHECK: mrs      x2, {{trcacatr8|TRCACATR8}}
3120x73 0x22 0x31 0xd5
313# CHECK: mrs      x19, {{trcacatr9|TRCACATR9}}
3140x6d 0x24 0x31 0xd5
315# CHECK: mrs      x13, {{trcacatr10|TRCACATR10}}
3160x79 0x26 0x31 0xd5
317# CHECK: mrs      x25, {{trcacatr11|TRCACATR11}}
3180x72 0x28 0x31 0xd5
319# CHECK: mrs      x18, {{trcacatr12|TRCACATR12}}
3200x7d 0x2a 0x31 0xd5
321# CHECK: mrs      x29, {{trcacatr13|TRCACATR13}}
3220x69 0x2c 0x31 0xd5
323# CHECK: mrs      x9, {{trcacatr14|TRCACATR14}}
3240x72 0x2e 0x31 0xd5
325# CHECK: mrs      x18, {{trcacatr15|TRCACATR15}}
3260x9d 0x20 0x31 0xd5
327# CHECK: mrs      x29, {{trcdvcvr0|TRCDVCVR0}}
3280x8f 0x24 0x31 0xd5
329# CHECK: mrs      x15, {{trcdvcvr1|TRCDVCVR1}}
3300x8f 0x28 0x31 0xd5
331# CHECK: mrs      x15, {{trcdvcvr2|TRCDVCVR2}}
3320x8f 0x2c 0x31 0xd5
333# CHECK: mrs      x15, {{trcdvcvr3|TRCDVCVR3}}
3340xb3 0x20 0x31 0xd5
335# CHECK: mrs      x19, {{trcdvcvr4|TRCDVCVR4}}
3360xb6 0x24 0x31 0xd5
337# CHECK: mrs      x22, {{trcdvcvr5|TRCDVCVR5}}
3380xbb 0x28 0x31 0xd5
339# CHECK: mrs      x27, {{trcdvcvr6|TRCDVCVR6}}
3400xa1 0x2c 0x31 0xd5
341# CHECK: mrs      x1, {{trcdvcvr7|TRCDVCVR7}}
3420xdd 0x20 0x31 0xd5
343# CHECK: mrs      x29, {{trcdvcmr0|TRCDVCMR0}}
3440xc9 0x24 0x31 0xd5
345# CHECK: mrs      x9, {{trcdvcmr1|TRCDVCMR1}}
3460xc1 0x28 0x31 0xd5
347# CHECK: mrs      x1, {{trcdvcmr2|TRCDVCMR2}}
3480xc2 0x2c 0x31 0xd5
349# CHECK: mrs      x2, {{trcdvcmr3|TRCDVCMR3}}
3500xe5 0x20 0x31 0xd5
351# CHECK: mrs      x5, {{trcdvcmr4|TRCDVCMR4}}
3520xf5 0x24 0x31 0xd5
353# CHECK: mrs      x21, {{trcdvcmr5|TRCDVCMR5}}
3540xe5 0x28 0x31 0xd5
355# CHECK: mrs      x5, {{trcdvcmr6|TRCDVCMR6}}
3560xe1 0x2c 0x31 0xd5
357# CHECK: mrs      x1, {{trcdvcmr7|TRCDVCMR7}}
3580x15 0x30 0x31 0xd5
359# CHECK: mrs      x21, {{trccidcvr0|TRCCIDCVR0}}
3600x18 0x32 0x31 0xd5
361# CHECK: mrs      x24, {{trccidcvr1|TRCCIDCVR1}}
3620x18 0x34 0x31 0xd5
363# CHECK: mrs      x24, {{trccidcvr2|TRCCIDCVR2}}
3640xc 0x36 0x31 0xd5
365# CHECK: mrs      x12, {{trccidcvr3|TRCCIDCVR3}}
3660xa 0x38 0x31 0xd5
367# CHECK: mrs      x10, {{trccidcvr4|TRCCIDCVR4}}
3680x9 0x3a 0x31 0xd5
369# CHECK: mrs      x9, {{trccidcvr5|TRCCIDCVR5}}
3700x6 0x3c 0x31 0xd5
371# CHECK: mrs      x6, {{trccidcvr6|TRCCIDCVR6}}
3720x14 0x3e 0x31 0xd5
373# CHECK: mrs      x20, {{trccidcvr7|TRCCIDCVR7}}
3740x34 0x30 0x31 0xd5
375# CHECK: mrs      x20, {{trcvmidcvr0|TRCVMIDCVR0}}
3760x34 0x32 0x31 0xd5
377# CHECK: mrs      x20, {{trcvmidcvr1|TRCVMIDCVR1}}
3780x3a 0x34 0x31 0xd5
379# CHECK: mrs      x26, {{trcvmidcvr2|TRCVMIDCVR2}}
3800x21 0x36 0x31 0xd5
381# CHECK: mrs      x1, {{trcvmidcvr3|TRCVMIDCVR3}}
3820x2e 0x38 0x31 0xd5
383# CHECK: mrs      x14, {{trcvmidcvr4|TRCVMIDCVR4}}
3840x3b 0x3a 0x31 0xd5
385# CHECK: mrs      x27, {{trcvmidcvr5|TRCVMIDCVR5}}
3860x3d 0x3c 0x31 0xd5
387# CHECK: mrs      x29, {{trcvmidcvr6|TRCVMIDCVR6}}
3880x31 0x3e 0x31 0xd5
389# CHECK: mrs      x17, {{trcvmidcvr7|TRCVMIDCVR7}}
3900x4a 0x30 0x31 0xd5
391# CHECK: mrs      x10, {{trccidcctlr0|TRCCIDCCTLR0}}
3920x44 0x31 0x31 0xd5
393# CHECK: mrs      x4, {{trccidcctlr1|TRCCIDCCTLR1}}
3940x49 0x32 0x31 0xd5
395# CHECK: mrs      x9, {{trcvmidcctlr0|TRCVMIDCCTLR0}}
3960x4b 0x33 0x31 0xd5
397# CHECK: mrs      x11, {{trcvmidcctlr1|TRCVMIDCCTLR1}}
3980x96 0x70 0x31 0xd5
399# CHECK: mrs      x22, {{trcitctrl|TRCITCTRL}}
4000xd7 0x78 0x31 0xd5
401# CHECK: mrs      x23, {{trcclaimset|TRCCLAIMSET}}
4020xce 0x79 0x31 0xd5
403# CHECK: mrs      x14, {{trcclaimclr|TRCCLAIMCLR}}
4040x9c 0x10 0x11 0xd5
405# CHECK: msr      {{trcoslar|TRCOSLAR}}, x28
4060xce 0x7c 0x11 0xd5
407# CHECK: msr      {{trclar|TRCLAR}}, x14
4080xa 0x1 0x11 0xd5
409# CHECK: msr      {{trcprgctlr|TRCPRGCTLR}}, x10
4100x1b 0x2 0x11 0xd5
411# CHECK: msr      {{trcprocselr|TRCPROCSELR}}, x27
4120x18 0x4 0x11 0xd5
413# CHECK: msr      {{trcconfigr|TRCCONFIGR}}, x24
4140x8 0x6 0x11 0xd5
415# CHECK: msr      {{trcauxctlr|TRCAUXCTLR}}, x8
4160x10 0x8 0x11 0xd5
417# CHECK: msr      {{trceventctl0r|TRCEVENTCTL0R}}, x16
4180x1b 0x9 0x11 0xd5
419# CHECK: msr      {{trceventctl1r|TRCEVENTCTL1R}}, x27
4200x1a 0xb 0x11 0xd5
421# CHECK: msr      {{trcstallctlr|TRCSTALLCTLR}}, x26
4220x0 0xc 0x11 0xd5
423# CHECK: msr      {{trctsctlr|TRCTSCTLR}}, x0
4240xe 0xd 0x11 0xd5
425# CHECK: msr      {{trcsyncpr|TRCSYNCPR}}, x14
4260x8 0xe 0x11 0xd5
427# CHECK: msr      {{trcccctlr|TRCCCCTLR}}, x8
4280x6 0xf 0x11 0xd5
429# CHECK: msr      {{trcbbctlr|TRCBBCTLR}}, x6
4300x37 0x0 0x11 0xd5
431# CHECK: msr      {{trctraceidr|TRCTRACEIDR}}, x23
4320x25 0x1 0x11 0xd5
433# CHECK: msr      {{trcqctlr|TRCQCTLR}}, x5
4340x40 0x0 0x11 0xd5
435# CHECK: msr      {{trcvictlr|TRCVICTLR}}, x0
4360x40 0x1 0x11 0xd5
437# CHECK: msr      {{trcviiectlr|TRCVIIECTLR}}, x0
4380x41 0x2 0x11 0xd5
439# CHECK: msr      {{trcvissctlr|TRCVISSCTLR}}, x1
4400x40 0x3 0x11 0xd5
441# CHECK: msr      {{trcvipcssctlr|TRCVIPCSSCTLR}}, x0
4420x47 0x8 0x11 0xd5
443# CHECK: msr      {{trcvdctlr|TRCVDCTLR}}, x7
4440x52 0x9 0x11 0xd5
445# CHECK: msr      {{trcvdsacctlr|TRCVDSACCTLR}}, x18
4460x58 0xa 0x11 0xd5
447# CHECK: msr      {{trcvdarcctlr|TRCVDARCCTLR}}, x24
4480x9c 0x0 0x11 0xd5
449# CHECK: msr      {{trcseqevr0|TRCSEQEVR0}}, x28
4500x95 0x1 0x11 0xd5
451# CHECK: msr      {{trcseqevr1|TRCSEQEVR1}}, x21
4520x90 0x2 0x11 0xd5
453# CHECK: msr      {{trcseqevr2|TRCSEQEVR2}}, x16
4540x90 0x6 0x11 0xd5
455# CHECK: msr      {{trcseqrstevr|TRCSEQRSTEVR}}, x16
4560x99 0x7 0x11 0xd5
457# CHECK: msr      {{trcseqstr|TRCSEQSTR}}, x25
4580x9d 0x8 0x11 0xd5
459# CHECK: msr      {{trcextinselr|TRCEXTINSELR}}, x29
4600xb4 0x0 0x11 0xd5
461# CHECK: msr      {{trccntrldvr0|TRCCNTRLDVR0}}, x20
4620xb4 0x1 0x11 0xd5
463# CHECK: msr      {{trccntrldvr1|TRCCNTRLDVR1}}, x20
4640xb6 0x2 0x11 0xd5
465# CHECK: msr      {{trccntrldvr2|TRCCNTRLDVR2}}, x22
4660xac 0x3 0x11 0xd5
467# CHECK: msr      {{trccntrldvr3|TRCCNTRLDVR3}}, x12
4680xb4 0x4 0x11 0xd5
469# CHECK: msr      {{trccntctlr0|TRCCNTCTLR0}}, x20
4700xa4 0x5 0x11 0xd5
471# CHECK: msr      {{trccntctlr1|TRCCNTCTLR1}}, x4
4720xa8 0x6 0x11 0xd5
473# CHECK: msr      {{trccntctlr2|TRCCNTCTLR2}}, x8
4740xb0 0x7 0x11 0xd5
475# CHECK: msr      {{trccntctlr3|TRCCNTCTLR3}}, x16
4760xa5 0x8 0x11 0xd5
477# CHECK: msr      {{trccntvr0|TRCCNTVR0}}, x5
4780xbb 0x9 0x11 0xd5
479# CHECK: msr      {{trccntvr1|TRCCNTVR1}}, x27
4800xb5 0xa 0x11 0xd5
481# CHECK: msr      {{trccntvr2|TRCCNTVR2}}, x21
4820xa8 0xb 0x11 0xd5
483# CHECK: msr      {{trccntvr3|TRCCNTVR3}}, x8
4840xe6 0x0 0x11 0xd5
485# CHECK: msr      {{trcimspec0|TRCIMSPEC0}}, x6
4860xfb 0x1 0x11 0xd5
487# CHECK: msr      {{trcimspec1|TRCIMSPEC1}}, x27
4880xf7 0x2 0x11 0xd5
489# CHECK: msr      {{trcimspec2|TRCIMSPEC2}}, x23
4900xef 0x3 0x11 0xd5
491# CHECK: msr      {{trcimspec3|TRCIMSPEC3}}, x15
4920xed 0x4 0x11 0xd5
493# CHECK: msr      {{trcimspec4|TRCIMSPEC4}}, x13
4940xf9 0x5 0x11 0xd5
495# CHECK: msr      {{trcimspec5|TRCIMSPEC5}}, x25
4960xf3 0x6 0x11 0xd5
497# CHECK: msr      {{trcimspec6|TRCIMSPEC6}}, x19
4980xfb 0x7 0x11 0xd5
499# CHECK: msr      {{trcimspec7|TRCIMSPEC7}}, x27
5000x4 0x12 0x11 0xd5
501# CHECK: msr      {{trcrsctlr2|TRCRSCTLR2}}, x4
5020x0 0x13 0x11 0xd5
503# CHECK: msr      {{trcrsctlr3|TRCRSCTLR3}}, x0
5040x15 0x14 0x11 0xd5
505# CHECK: msr      {{trcrsctlr4|TRCRSCTLR4}}, x21
5060x8 0x15 0x11 0xd5
507# CHECK: msr      {{trcrsctlr5|TRCRSCTLR5}}, x8
5080x14 0x16 0x11 0xd5
509# CHECK: msr      {{trcrsctlr6|TRCRSCTLR6}}, x20
5100xb 0x17 0x11 0xd5
511# CHECK: msr      {{trcrsctlr7|TRCRSCTLR7}}, x11
5120x12 0x18 0x11 0xd5
513# CHECK: msr      {{trcrsctlr8|TRCRSCTLR8}}, x18
5140x18 0x19 0x11 0xd5
515# CHECK: msr      {{trcrsctlr9|TRCRSCTLR9}}, x24
5160xf 0x1a 0x11 0xd5
517# CHECK: msr      {{trcrsctlr10|TRCRSCTLR10}}, x15
5180x15 0x1b 0x11 0xd5
519# CHECK: msr      {{trcrsctlr11|TRCRSCTLR11}}, x21
5200x4 0x1c 0x11 0xd5
521# CHECK: msr      {{trcrsctlr12|TRCRSCTLR12}}, x4
5220x1c 0x1d 0x11 0xd5
523# CHECK: msr      {{trcrsctlr13|TRCRSCTLR13}}, x28
5240x3 0x1e 0x11 0xd5
525# CHECK: msr      {{trcrsctlr14|TRCRSCTLR14}}, x3
5260x14 0x1f 0x11 0xd5
527# CHECK: msr      {{trcrsctlr15|TRCRSCTLR15}}, x20
5280x2c 0x10 0x11 0xd5
529# CHECK: msr      {{trcrsctlr16|TRCRSCTLR16}}, x12
5300x31 0x11 0x11 0xd5
531# CHECK: msr      {{trcrsctlr17|TRCRSCTLR17}}, x17
5320x2a 0x12 0x11 0xd5
533# CHECK: msr      {{trcrsctlr18|TRCRSCTLR18}}, x10
5340x2b 0x13 0x11 0xd5
535# CHECK: msr      {{trcrsctlr19|TRCRSCTLR19}}, x11
5360x23 0x14 0x11 0xd5
537# CHECK: msr      {{trcrsctlr20|TRCRSCTLR20}}, x3
5380x32 0x15 0x11 0xd5
539# CHECK: msr      {{trcrsctlr21|TRCRSCTLR21}}, x18
5400x3a 0x16 0x11 0xd5
541# CHECK: msr      {{trcrsctlr22|TRCRSCTLR22}}, x26
5420x25 0x17 0x11 0xd5
543# CHECK: msr      {{trcrsctlr23|TRCRSCTLR23}}, x5
5440x39 0x18 0x11 0xd5
545# CHECK: msr      {{trcrsctlr24|TRCRSCTLR24}}, x25
5460x25 0x19 0x11 0xd5
547# CHECK: msr      {{trcrsctlr25|TRCRSCTLR25}}, x5
5480x24 0x1a 0x11 0xd5
549# CHECK: msr      {{trcrsctlr26|TRCRSCTLR26}}, x4
5500x34 0x1b 0x11 0xd5
551# CHECK: msr      {{trcrsctlr27|TRCRSCTLR27}}, x20
5520x25 0x1c 0x11 0xd5
553# CHECK: msr      {{trcrsctlr28|TRCRSCTLR28}}, x5
5540x2a 0x1d 0x11 0xd5
555# CHECK: msr      {{trcrsctlr29|TRCRSCTLR29}}, x10
5560x38 0x1e 0x11 0xd5
557# CHECK: msr      {{trcrsctlr30|TRCRSCTLR30}}, x24
5580x34 0x1f 0x11 0xd5
559# CHECK: msr      {{trcrsctlr31|TRCRSCTLR31}}, x20
5600x57 0x10 0x11 0xd5
561# CHECK: msr      {{trcssccr0|TRCSSCCR0}}, x23
5620x5b 0x11 0x11 0xd5
563# CHECK: msr      {{trcssccr1|TRCSSCCR1}}, x27
5640x5b 0x12 0x11 0xd5
565# CHECK: msr      {{trcssccr2|TRCSSCCR2}}, x27
5660x46 0x13 0x11 0xd5
567# CHECK: msr      {{trcssccr3|TRCSSCCR3}}, x6
5680x43 0x14 0x11 0xd5
569# CHECK: msr      {{trcssccr4|TRCSSCCR4}}, x3
5700x4c 0x15 0x11 0xd5
571# CHECK: msr      {{trcssccr5|TRCSSCCR5}}, x12
5720x47 0x16 0x11 0xd5
573# CHECK: msr      {{trcssccr6|TRCSSCCR6}}, x7
5740x46 0x17 0x11 0xd5
575# CHECK: msr      {{trcssccr7|TRCSSCCR7}}, x6
5760x54 0x18 0x11 0xd5
577# CHECK: msr      {{trcsscsr0|TRCSSCSR0}}, x20
5780x51 0x19 0x11 0xd5
579# CHECK: msr      {{trcsscsr1|TRCSSCSR1}}, x17
5800x4b 0x1a 0x11 0xd5
581# CHECK: msr      {{trcsscsr2|TRCSSCSR2}}, x11
5820x44 0x1b 0x11 0xd5
583# CHECK: msr      {{trcsscsr3|TRCSSCSR3}}, x4
5840x4e 0x1c 0x11 0xd5
585# CHECK: msr      {{trcsscsr4|TRCSSCSR4}}, x14
5860x56 0x1d 0x11 0xd5
587# CHECK: msr      {{trcsscsr5|TRCSSCSR5}}, x22
5880x43 0x1e 0x11 0xd5
589# CHECK: msr      {{trcsscsr6|TRCSSCSR6}}, x3
5900x4b 0x1f 0x11 0xd5
591# CHECK: msr      {{trcsscsr7|TRCSSCSR7}}, x11
5920x83 0x14 0x11 0xd5
593# CHECK: msr      {{trcpdcr|TRCPDCR}}, x3
5940x6 0x20 0x11 0xd5
595# CHECK: msr      {{trcacvr0|TRCACVR0}}, x6
5960x14 0x22 0x11 0xd5
597# CHECK: msr      {{trcacvr1|TRCACVR1}}, x20
5980x19 0x24 0x11 0xd5
599# CHECK: msr      {{trcacvr2|TRCACVR2}}, x25
6000x1 0x26 0x11 0xd5
601# CHECK: msr      {{trcacvr3|TRCACVR3}}, x1
6020x1c 0x28 0x11 0xd5
603# CHECK: msr      {{trcacvr4|TRCACVR4}}, x28
6040xf 0x2a 0x11 0xd5
605# CHECK: msr      {{trcacvr5|TRCACVR5}}, x15
6060x19 0x2c 0x11 0xd5
607# CHECK: msr      {{trcacvr6|TRCACVR6}}, x25
6080xc 0x2e 0x11 0xd5
609# CHECK: msr      {{trcacvr7|TRCACVR7}}, x12
6100x25 0x20 0x11 0xd5
611# CHECK: msr      {{trcacvr8|TRCACVR8}}, x5
6120x39 0x22 0x11 0xd5
613# CHECK: msr      {{trcacvr9|TRCACVR9}}, x25
6140x2d 0x24 0x11 0xd5
615# CHECK: msr      {{trcacvr10|TRCACVR10}}, x13
6160x2a 0x26 0x11 0xd5
617# CHECK: msr      {{trcacvr11|TRCACVR11}}, x10
6180x33 0x28 0x11 0xd5
619# CHECK: msr      {{trcacvr12|TRCACVR12}}, x19
6200x2a 0x2a 0x11 0xd5
621# CHECK: msr      {{trcacvr13|TRCACVR13}}, x10
6220x33 0x2c 0x11 0xd5
623# CHECK: msr      {{trcacvr14|TRCACVR14}}, x19
6240x22 0x2e 0x11 0xd5
625# CHECK: msr      {{trcacvr15|TRCACVR15}}, x2
6260x4f 0x20 0x11 0xd5
627# CHECK: msr      {{trcacatr0|TRCACATR0}}, x15
6280x4d 0x22 0x11 0xd5
629# CHECK: msr      {{trcacatr1|TRCACATR1}}, x13
6300x48 0x24 0x11 0xd5
631# CHECK: msr      {{trcacatr2|TRCACATR2}}, x8
6320x41 0x26 0x11 0xd5
633# CHECK: msr      {{trcacatr3|TRCACATR3}}, x1
6340x4b 0x28 0x11 0xd5
635# CHECK: msr      {{trcacatr4|TRCACATR4}}, x11
6360x48 0x2a 0x11 0xd5
637# CHECK: msr      {{trcacatr5|TRCACATR5}}, x8
6380x58 0x2c 0x11 0xd5
639# CHECK: msr      {{trcacatr6|TRCACATR6}}, x24
6400x46 0x2e 0x11 0xd5
641# CHECK: msr      {{trcacatr7|TRCACATR7}}, x6
6420x77 0x20 0x11 0xd5
643# CHECK: msr      {{trcacatr8|TRCACATR8}}, x23
6440x65 0x22 0x11 0xd5
645# CHECK: msr      {{trcacatr9|TRCACATR9}}, x5
6460x6b 0x24 0x11 0xd5
647# CHECK: msr      {{trcacatr10|TRCACATR10}}, x11
6480x6b 0x26 0x11 0xd5
649# CHECK: msr      {{trcacatr11|TRCACATR11}}, x11
6500x63 0x28 0x11 0xd5
651# CHECK: msr      {{trcacatr12|TRCACATR12}}, x3
6520x7c 0x2a 0x11 0xd5
653# CHECK: msr      {{trcacatr13|TRCACATR13}}, x28
6540x79 0x2c 0x11 0xd5
655# CHECK: msr      {{trcacatr14|TRCACATR14}}, x25
6560x64 0x2e 0x11 0xd5
657# CHECK: msr      {{trcacatr15|TRCACATR15}}, x4
6580x86 0x20 0x11 0xd5
659# CHECK: msr      {{trcdvcvr0|TRCDVCVR0}}, x6
6600x83 0x24 0x11 0xd5
661# CHECK: msr      {{trcdvcvr1|TRCDVCVR1}}, x3
6620x85 0x28 0x11 0xd5
663# CHECK: msr      {{trcdvcvr2|TRCDVCVR2}}, x5
6640x8b 0x2c 0x11 0xd5
665# CHECK: msr      {{trcdvcvr3|TRCDVCVR3}}, x11
6660xa9 0x20 0x11 0xd5
667# CHECK: msr      {{trcdvcvr4|TRCDVCVR4}}, x9
6680xae 0x24 0x11 0xd5
669# CHECK: msr      {{trcdvcvr5|TRCDVCVR5}}, x14
6700xaa 0x28 0x11 0xd5
671# CHECK: msr      {{trcdvcvr6|TRCDVCVR6}}, x10
6720xac 0x2c 0x11 0xd5
673# CHECK: msr      {{trcdvcvr7|TRCDVCVR7}}, x12
6740xc8 0x20 0x11 0xd5
675# CHECK: msr      {{trcdvcmr0|TRCDVCMR0}}, x8
6760xc8 0x24 0x11 0xd5
677# CHECK: msr      {{trcdvcmr1|TRCDVCMR1}}, x8
6780xd6 0x28 0x11 0xd5
679# CHECK: msr      {{trcdvcmr2|TRCDVCMR2}}, x22
6800xd6 0x2c 0x11 0xd5
681# CHECK: msr      {{trcdvcmr3|TRCDVCMR3}}, x22
6820xe5 0x20 0x11 0xd5
683# CHECK: msr      {{trcdvcmr4|TRCDVCMR4}}, x5
6840xf0 0x24 0x11 0xd5
685# CHECK: msr      {{trcdvcmr5|TRCDVCMR5}}, x16
6860xfb 0x28 0x11 0xd5
687# CHECK: msr      {{trcdvcmr6|TRCDVCMR6}}, x27
6880xf5 0x2c 0x11 0xd5
689# CHECK: msr      {{trcdvcmr7|TRCDVCMR7}}, x21
6900x8 0x30 0x11 0xd5
691# CHECK: msr      {{trccidcvr0|TRCCIDCVR0}}, x8
6920x6 0x32 0x11 0xd5
693# CHECK: msr      {{trccidcvr1|TRCCIDCVR1}}, x6
6940x9 0x34 0x11 0xd5
695# CHECK: msr      {{trccidcvr2|TRCCIDCVR2}}, x9
6960x8 0x36 0x11 0xd5
697# CHECK: msr      {{trccidcvr3|TRCCIDCVR3}}, x8
6980x3 0x38 0x11 0xd5
699# CHECK: msr      {{trccidcvr4|TRCCIDCVR4}}, x3
7000x15 0x3a 0x11 0xd5
701# CHECK: msr      {{trccidcvr5|TRCCIDCVR5}}, x21
7020xc 0x3c 0x11 0xd5
703# CHECK: msr      {{trccidcvr6|TRCCIDCVR6}}, x12
7040x7 0x3e 0x11 0xd5
705# CHECK: msr      {{trccidcvr7|TRCCIDCVR7}}, x7
7060x24 0x30 0x11 0xd5
707# CHECK: msr      {{trcvmidcvr0|TRCVMIDCVR0}}, x4
7080x23 0x32 0x11 0xd5
709# CHECK: msr      {{trcvmidcvr1|TRCVMIDCVR1}}, x3
7100x29 0x34 0x11 0xd5
711# CHECK: msr      {{trcvmidcvr2|TRCVMIDCVR2}}, x9
7120x31 0x36 0x11 0xd5
713# CHECK: msr      {{trcvmidcvr3|TRCVMIDCVR3}}, x17
7140x2e 0x38 0x11 0xd5
715# CHECK: msr      {{trcvmidcvr4|TRCVMIDCVR4}}, x14
7160x2c 0x3a 0x11 0xd5
717# CHECK: msr      {{trcvmidcvr5|TRCVMIDCVR5}}, x12
7180x2a 0x3c 0x11 0xd5
719# CHECK: msr      {{trcvmidcvr6|TRCVMIDCVR6}}, x10
7200x23 0x3e 0x11 0xd5
721# CHECK: msr      {{trcvmidcvr7|TRCVMIDCVR7}}, x3
7220x4e 0x30 0x11 0xd5
723# CHECK: msr      {{trccidcctlr0|TRCCIDCCTLR0}}, x14
7240x56 0x31 0x11 0xd5
725# CHECK: msr      {{trccidcctlr1|TRCCIDCCTLR1}}, x22
7260x48 0x32 0x11 0xd5
727# CHECK: msr      {{trcvmidcctlr0|TRCVMIDCCTLR0}}, x8
7280x4f 0x33 0x11 0xd5
729# CHECK: msr      {{trcvmidcctlr1|TRCVMIDCCTLR1}}, x15
7300x81 0x70 0x11 0xd5
731# CHECK: msr      {{trcitctrl|TRCITCTRL}}, x1
7320xc7 0x78 0x11 0xd5
733# CHECK: msr      {{trcclaimset|TRCCLAIMSET}}, x7
7340xdd 0x79 0x11 0xd5
735# CHECK: msr      {{trcclaimclr|TRCCLAIMCLR}}, x29
736
737
738