1// RUN: llvm-tblgen -gen-dag-isel -I %p/../../include %s | FileCheck %s
2
3include "llvm/Target/Target.td"
4
5def TestTargetInstrInfo : InstrInfo;
6
7def TestTarget : Target {
8  let InstructionSet = TestTargetInstrInfo;
9}
10
11let Namespace = "TestNamespace" in {
12
13def R0 : Register<"r0">;
14
15foreach i = 0...127 in {
16def GPR#i : RegisterClass<"TestTarget", [i32], 32,
17                          (add R0)>;
18}
19
20def GPRAbove127 : RegisterClass<"TestTarget", [i32], 32,
21                                (add R0)>;
22} // end Namespace TestNamespace
23
24// CHECK:      OPC_CheckOpcode, TARGET_VAL(ISD::ADD),
25// CHECK-NEXT: OPC_RecordChild0, // #0 = $src
26// CHECK-NEXT: OPC_Scope, 14, /*->20*/ // 2 children in Scope
27// CHECK-NEXT: OPC_CheckChild1Integer, 0,
28// CHECK-NEXT: OPC_EmitInteger, MVT::i32, 0|128,1/*128*/,
29// CHECK-NEXT: OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::COPY_TO_REGCLASS), 0,
30// CHECK-NEXT:     MVT::i32, 2/*#Ops*/, 1, 0,
31def : Pat<(i32 (add i32:$src, (i32 0))),
32          (COPY_TO_REGCLASS GPRAbove127, GPR0:$src)>;
33
34// CHECK:      OPC_CheckChild1Integer, 1,
35// CHECK-NEXT: OPC_EmitInteger, MVT::i32, TestNamespace::GPR127RegClassID,
36// CHECK-NEXT: OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::COPY_TO_REGCLASS), 0,
37// CHECK-NEXT:     MVT::i32, 2/*#Ops*/, 1, 0,
38def : Pat<(i32 (add i32:$src, (i32 1))),
39          (COPY_TO_REGCLASS GPR127, GPR0:$src)>;
40