1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=arm64-unknown-unknown -O3 < %s | FileCheck %s
3; This test should show that @f and @f_without_freeze generate equivalent
4; assembly
5; REQUIRES: aarch64-registered-target
6
7define void @f(i8* %p, i32 %n, i32 %m) {
8; CHECK-LABEL: f:
9; CHECK:       // %bb.0: // %entry
10; CHECK-NEXT:    add w8, w2, #1 // =1
11; CHECK-NEXT:  .LBB0_1: // %loop
12; CHECK-NEXT:    // =>This Inner Loop Header: Depth=1
13; CHECK-NEXT:    strb wzr, [x0, w8, sxtw]
14; CHECK-NEXT:    subs w1, w1, #1 // =1
15; CHECK-NEXT:    add w8, w8, #1 // =1
16; CHECK-NEXT:    b.ne .LBB0_1
17; CHECK-NEXT:  // %bb.2: // %exit
18; CHECK-NEXT:    ret
19entry:
20  br label %loop
21loop:
22  %i = phi i32 [0, %entry], [%i.next, %loop]
23  %i.next = add i32 %i, 1
24  %i.next.fr = freeze i32 %i.next
25  %j = add i32 %m, %i.next.fr
26  %q = getelementptr i8, i8* %p, i32 %j
27  store i8 0, i8* %q
28  %cond = icmp eq i32 %i.next.fr, %n
29  br i1 %cond, label %exit, label %loop
30exit:
31  ret void
32}
33
34define void @f_without_freeze(i8* %p, i32 %n, i32 %m) {
35; CHECK-LABEL: f_without_freeze:
36; CHECK:       // %bb.0: // %entry
37; CHECK-NEXT:    add w8, w2, #1 // =1
38; CHECK-NEXT:  .LBB1_1: // %loop
39; CHECK-NEXT:    // =>This Inner Loop Header: Depth=1
40; CHECK-NEXT:    strb wzr, [x0, w8, sxtw]
41; CHECK-NEXT:    subs w1, w1, #1 // =1
42; CHECK-NEXT:    add w8, w8, #1 // =1
43; CHECK-NEXT:    b.ne .LBB1_1
44; CHECK-NEXT:  // %bb.2: // %exit
45; CHECK-NEXT:    ret
46entry:
47  br label %loop
48loop:
49  %i = phi i32 [0, %entry], [%i.next, %loop]
50  %i.next = add i32 %i, 1
51  %j = add i32 %m, %i.next
52  %q = getelementptr i8, i8* %p, i32 %j
53  store i8 0, i8* %q
54  %cond = icmp eq i32 %i.next, %n
55  br i1 %cond, label %exit, label %loop
56exit:
57  ret void
58}
59