1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -consthoist -S < %s | FileCheck %s
3target triple = "x86_64--"
4
5; We don't want to convert constant divides because the benefit from converting
6; them to a mul in the backend is larget than constant materialization savings.
7define void @signed_const_division(i64 %in1, i64 %in2, i64* %addr) {
8; CHECK-LABEL: @signed_const_division(
9; CHECK-NEXT:  entry:
10; CHECK-NEXT:    br label [[LOOP:%.*]]
11; CHECK:       loop:
12; CHECK-NEXT:    [[L1:%.*]] = phi i64 [ [[RES1:%.*]], [[LOOP]] ], [ [[IN1:%.*]], [[ENTRY:%.*]] ]
13; CHECK-NEXT:    [[L2:%.*]] = phi i64 [ [[RES2:%.*]], [[LOOP]] ], [ [[IN2:%.*]], [[ENTRY]] ]
14; CHECK-NEXT:    [[RES1]] = sdiv i64 [[L1]], 4294967296
15; CHECK-NEXT:    store volatile i64 [[RES1]], i64* [[ADDR:%.*]]
16; CHECK-NEXT:    [[RES2]] = srem i64 [[L2]], 4294967296
17; CHECK-NEXT:    store volatile i64 [[RES2]], i64* [[ADDR]]
18; CHECK-NEXT:    [[AGAIN:%.*]] = icmp eq i64 [[RES1]], [[RES2]]
19; CHECK-NEXT:    br i1 [[AGAIN]], label [[LOOP]], label [[END:%.*]]
20; CHECK:       end:
21; CHECK-NEXT:    ret void
22;
23entry:
24  br label %loop
25
26loop:
27  %l1 = phi i64 [%res1, %loop], [%in1, %entry]
28  %l2 = phi i64 [%res2, %loop], [%in2, %entry]
29  %res1 = sdiv i64 %l1, 4294967296
30  store volatile i64 %res1, i64* %addr
31  %res2 = srem i64 %l2, 4294967296
32  store volatile i64 %res2, i64* %addr
33  %again = icmp eq i64 %res1, %res2
34  br i1 %again, label %loop, label %end
35
36end:
37  ret void
38}
39
40define void @unsigned_const_division(i64 %in1, i64 %in2, i64* %addr) {
41; CHECK-LABEL: @unsigned_const_division(
42; CHECK-NEXT:  entry:
43; CHECK-NEXT:    br label [[LOOP:%.*]]
44; CHECK:       loop:
45; CHECK-NEXT:    [[L1:%.*]] = phi i64 [ [[RES1:%.*]], [[LOOP]] ], [ [[IN1:%.*]], [[ENTRY:%.*]] ]
46; CHECK-NEXT:    [[L2:%.*]] = phi i64 [ [[RES2:%.*]], [[LOOP]] ], [ [[IN2:%.*]], [[ENTRY]] ]
47; CHECK-NEXT:    [[RES1]] = udiv i64 [[L1]], 4294967296
48; CHECK-NEXT:    store volatile i64 [[RES1]], i64* [[ADDR:%.*]]
49; CHECK-NEXT:    [[RES2]] = urem i64 [[L2]], 4294967296
50; CHECK-NEXT:    store volatile i64 [[RES2]], i64* [[ADDR]]
51; CHECK-NEXT:    [[AGAIN:%.*]] = icmp eq i64 [[RES1]], [[RES2]]
52; CHECK-NEXT:    br i1 [[AGAIN]], label [[LOOP]], label [[END:%.*]]
53; CHECK:       end:
54; CHECK-NEXT:    ret void
55;
56
57entry:
58  br label %loop
59
60loop:
61  %l1 = phi i64 [%res1, %loop], [%in1, %entry]
62  %l2 = phi i64 [%res2, %loop], [%in2, %entry]
63  %res1 = udiv i64 %l1, 4294967296
64  store volatile i64 %res1, i64* %addr
65  %res2 = urem i64 %l2, 4294967296
66  store volatile i64 %res2, i64* %addr
67  %again = icmp eq i64 %res1, %res2
68  br i1 %again, label %loop, label %end
69
70end:
71  ret void
72}
73
74define i32 @PR40934() {
75; CHECK-LABEL: @PR40934(
76; CHECK-NEXT:    ret i32 undef
77; CHECK:       bb:
78; CHECK-NEXT:    [[T2:%.*]] = call i32 (i64, ...) bitcast (i32 (...)* @d to i32 (i64, ...)*)(i64 7788015061)
79; CHECK-NEXT:    [[T3:%.*]] = and i64 [[T3]], 7788015061
80; CHECK-NEXT:    br label [[BB:%.*]]
81;
82  ret i32 undef
83
84bb:
85  %t2 = call i32 (i64, ...) bitcast (i32 (...)* @d to i32 (i64, ...)*)(i64 7788015061)
86  %t3 = and i64 %t3, 7788015061
87  br label %bb
88}
89
90declare i32 @d(...)
91
92define i32 @PR40930() {
93; CHECK-LABEL: @PR40930(
94; CHECK-NEXT:  bb:
95; CHECK-NEXT:    [[TMP:%.*]] = alloca i32, align 4
96; CHECK-NEXT:    br label [[BB1:%.*]]
97; CHECK:       bb1:
98; CHECK-NEXT:    br label [[BB2:%.*]]
99; CHECK:       bb2:
100; CHECK-NEXT:    br label [[BB2]]
101; CHECK:       bb3:
102; CHECK-NEXT:    [[TMP4:%.*]] = call i32 (i64, i64, ...) bitcast (i32 (...)* @c to i32 (i64, i64, ...)*)(i64 4208870971, i64 4208870971)
103; CHECK-NEXT:    br label [[BB1]]
104; CHECK:       bb5:
105; CHECK-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP]], align 4
106; CHECK-NEXT:    ret i32 [[TMP6]]
107;
108bb:
109  %tmp = alloca i32, align 4
110  br label %bb1
111
112bb1:                                              ; preds = %bb3, %bb
113  br label %bb2
114
115bb2:                                              ; preds = %bb2, %bb1
116  br label %bb2
117
118bb3:                                              ; No predecessors!
119  %tmp4 = call i32 (i64, i64, ...) bitcast (i32 (...)* @c to i32 (i64, i64, ...)*)(i64 4208870971, i64 4208870971)
120  br label %bb1
121
122bb5:                                              ; No predecessors!
123  %tmp6 = load i32, i32* %tmp, align 4
124  ret i32 %tmp6
125}
126
127declare i32 @c(...)
128