1; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+lob,+mve.fp -disable-arm-loloops=true %s -o - | FileCheck %s --check-prefix=DISABLED
2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+lob,+mve.fp %s -o - | FileCheck %s
3
4; DISABLED-NOT: dls lr,
5
6; CHECK-LABEL: test_target_specific:
7; CHECK:        mov.w lr, #50
8; CHECK:        dls lr, lr
9; CHECK-NOT:    mov lr,
10; CHECK:      [[LOOP_HEADER:\.LBB[0-9_]+]]:
11; CHECK:        le lr, [[LOOP_HEADER]]
12; CHECK-NOT:    b .
13; CHECK:      @ %exit
14
15define i32 @test_target_specific(i32* %a, i32* %b) {
16entry:
17  br label %loop
18loop:
19  %acc = phi i32 [ 0, %entry ], [ %res, %loop ]
20  %count = phi i32 [ 0, %entry ], [ %count.next, %loop ]
21  %addr.a = getelementptr i32, i32* %a, i32 %count
22  %addr.b = getelementptr i32, i32* %b, i32 %count
23  %load.a = load i32, i32* %addr.a
24  %load.b = load i32, i32* %addr.b
25  %res = call i32 @llvm.arm.smlad(i32 %load.a, i32 %load.b, i32 %acc)
26  %count.next = add nuw i32 %count, 2
27  %cmp = icmp ne i32 %count.next, 100
28  br i1 %cmp, label %loop, label %exit
29exit:
30  ret i32 %res
31}
32
33; CHECK-LABEL: test_fabs:
34; CHECK:        mov.w lr, #100
35; CHECK:        dls lr, lr
36; CHECK-NOT:    mov lr,
37; CHECK:      [[LOOP_HEADER:\.LBB[0-9_]+]]:
38; CHECK-NOT:    bl
39; CHECK:        le lr, [[LOOP_HEADER]]
40; CHECK-NOT:    b .
41; CHECK:      @ %exit
42
43define float @test_fabs(float* %a) {
44entry:
45  br label %loop
46loop:
47  %acc = phi float [ 0.0, %entry ], [ %res, %loop ]
48  %count = phi i32 [ 0, %entry ], [ %count.next, %loop ]
49  %addr.a = getelementptr float, float* %a, i32 %count
50  %load.a = load float, float* %addr.a
51  %abs = call float @llvm.fabs.f32(float %load.a)
52  %res = fadd float %abs, %acc
53  %count.next = add nuw i32 %count, 1
54  %cmp = icmp ne i32 %count.next, 100
55  br i1 %cmp, label %loop, label %exit
56exit:
57  ret float %res
58}
59
60declare i32 @llvm.arm.smlad(i32, i32, i32)
61declare float @llvm.fabs.f32(float)
62