1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -indvars %s | FileCheck %s
3target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1"
4target triple = "x86_64-unknown-linux-gnu"
5
6define i32 @testDiv(i8* %p, i64* %p1) {
7; CHECK-LABEL: @testDiv(
8; CHECK-NEXT:  entry:
9; CHECK-NEXT:    br label [[LOOP1:%.*]]
10; CHECK:       loop1:
11; CHECK-NEXT:    [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[LOOP2_EXIT:%.*]] ], [ 8, [[ENTRY:%.*]] ]
12; CHECK-NEXT:    [[EXITCOND3:%.*]] = icmp eq i64 [[INDVARS_IV]], 15
13; CHECK-NEXT:    br i1 [[EXITCOND3]], label [[EXIT:%.*]], label [[GENERAL_CASE24:%.*]]
14; CHECK:       general_case24:
15; CHECK-NEXT:    br i1 false, label [[LOOP2_PREHEADER:%.*]], label [[LOOP2_EXIT]]
16; CHECK:       loop2.preheader:
17; CHECK-NEXT:    [[TMP0:%.*]] = udiv i64 14, [[INDVARS_IV]]
18; CHECK-NEXT:    [[TMP1:%.*]] = udiv i64 60392, [[TMP0]]
19; CHECK-NEXT:    br label [[LOOP2:%.*]]
20; CHECK:       loop2:
21; CHECK-NEXT:    [[INDVARS_IV1:%.*]] = phi i64 [ [[TMP1]], [[LOOP2_PREHEADER]] ], [ [[INDVARS_IV_NEXT2:%.*]], [[LOOP2]] ]
22; CHECK-NEXT:    [[LOCAL_2_57:%.*]] = phi i32 [ [[I7:%.*]], [[LOOP2]] ], [ 1, [[LOOP2_PREHEADER]] ]
23; CHECK-NEXT:    [[INDVARS_IV_NEXT2]] = add nsw i64 [[INDVARS_IV1]], -1
24; CHECK-NEXT:    [[I4:%.*]] = load atomic i64, i64* [[P1:%.*]] unordered, align 8
25; CHECK-NEXT:    [[I6:%.*]] = sub i64 [[I4]], [[INDVARS_IV_NEXT2]]
26; CHECK-NEXT:    store atomic i64 [[I6]], i64* [[P1]] unordered, align 8
27; CHECK-NEXT:    [[I7]] = add nuw nsw i32 [[LOCAL_2_57]], 1
28; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp eq i32 [[I7]], 9
29; CHECK-NEXT:    br i1 [[EXITCOND]], label [[LOOP2_EXIT_LOOPEXIT:%.*]], label [[LOOP2]]
30; CHECK:       loop2.exit.loopexit:
31; CHECK-NEXT:    br label [[LOOP2_EXIT]]
32; CHECK:       loop2.exit:
33; CHECK-NEXT:    [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
34; CHECK-NEXT:    br i1 false, label [[EXIT]], label [[LOOP1]]
35; CHECK:       exit:
36; CHECK-NEXT:    ret i32 0
37;
38entry:
39  br label %loop1
40
41loop1:                                            ; preds = %loop2.exit, %entry
42  %local_0_ = phi i32 [ 8, %entry ], [ %i9, %loop2.exit ]
43  %local_2_ = phi i32 [ 63864, %entry ], [ %local_2_43, %loop2.exit ]
44  %local_3_ = phi i32 [ 51, %entry ], [ %local_3_44, %loop2.exit ]
45  %i = udiv i32 14, %local_0_
46  %i1 = icmp ugt i32 %local_0_, 14
47  br i1 %i1, label %exit, label %general_case24
48
49general_case24:                                   ; preds = %loop1
50  %i2 = udiv i32 60392, %i
51  br i1 false, label %loop2, label %loop2.exit
52
53loop2:                                            ; preds = %loop2, %general_case24
54  %local_1_56 = phi i32 [ %i2, %general_case24 ], [ %i3, %loop2 ]
55  %local_2_57 = phi i32 [ 1, %general_case24 ], [ %i7, %loop2 ]
56  %i3 = add i32 %local_1_56, -1
57  %i4 = load atomic i64, i64* %p1 unordered, align 8
58  %i5 = sext i32 %i3 to i64
59  %i6 = sub i64 %i4, %i5
60  store atomic i64 %i6, i64* %p1 unordered, align 8
61  %i7 = add nuw nsw i32 %local_2_57, 1
62  %i8 = icmp ugt i32 %local_2_57, 7
63  br i1 %i8, label %loop2.exit, label %loop2
64
65loop2.exit:                                       ; preds = %loop2, %general_case24
66  %local_2_43 = phi i32 [ %local_2_, %general_case24 ], [ 9, %loop2 ]
67  %local_3_44 = phi i32 [ %local_3_, %general_case24 ], [ %local_1_56, %loop2 ]
68  %i9 = add nuw nsw i32 %local_0_, 1
69  %i10 = icmp ugt i32 %local_0_, 129
70  br i1 %i10, label %exit, label %loop1
71
72exit:                                             ; preds = %loop2.exit, %loop1
73  ret i32 0
74}
75
76define i32 @testRem(i8* %p, i64* %p1) {
77; CHECK-LABEL: @testRem(
78; CHECK-NEXT:  entry:
79; CHECK-NEXT:    br label [[LOOP1:%.*]]
80; CHECK:       loop1:
81; CHECK-NEXT:    [[LOCAL_0_:%.*]] = phi i32 [ 8, [[ENTRY:%.*]] ], [ [[I9:%.*]], [[LOOP2_EXIT:%.*]] ]
82; CHECK-NEXT:    [[EXITCOND1:%.*]] = icmp eq i32 [[LOCAL_0_]], 15
83; CHECK-NEXT:    br i1 [[EXITCOND1]], label [[EXIT:%.*]], label [[GENERAL_CASE24:%.*]]
84; CHECK:       general_case24:
85; CHECK-NEXT:    br i1 false, label [[LOOP2_PREHEADER:%.*]], label [[LOOP2_EXIT]]
86; CHECK:       loop2.preheader:
87; CHECK-NEXT:    [[TMP0:%.*]] = udiv i32 14, [[LOCAL_0_]]
88; CHECK-NEXT:    [[TMP1:%.*]] = udiv i32 60392, [[TMP0]]
89; CHECK-NEXT:    [[TMP2:%.*]] = mul i32 [[TMP1]], -1
90; CHECK-NEXT:    [[TMP3:%.*]] = mul i32 [[TMP2]], [[TMP0]]
91; CHECK-NEXT:    [[TMP4:%.*]] = sext i32 [[TMP3]] to i64
92; CHECK-NEXT:    [[TMP5:%.*]] = add nsw i64 [[TMP4]], 60392
93; CHECK-NEXT:    br label [[LOOP2:%.*]]
94; CHECK:       loop2:
95; CHECK-NEXT:    [[INDVARS_IV:%.*]] = phi i64 [ [[TMP5]], [[LOOP2_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP2]] ]
96; CHECK-NEXT:    [[LOCAL_2_57:%.*]] = phi i32 [ [[I7:%.*]], [[LOOP2]] ], [ 1, [[LOOP2_PREHEADER]] ]
97; CHECK-NEXT:    [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
98; CHECK-NEXT:    [[I4:%.*]] = load atomic i64, i64* [[P1:%.*]] unordered, align 8
99; CHECK-NEXT:    [[I6:%.*]] = sub i64 [[I4]], [[INDVARS_IV_NEXT]]
100; CHECK-NEXT:    store atomic i64 [[I6]], i64* [[P1]] unordered, align 8
101; CHECK-NEXT:    [[I7]] = add nuw nsw i32 [[LOCAL_2_57]], 1
102; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp eq i32 [[I7]], 9
103; CHECK-NEXT:    br i1 [[EXITCOND]], label [[LOOP2_EXIT_LOOPEXIT:%.*]], label [[LOOP2]]
104; CHECK:       loop2.exit.loopexit:
105; CHECK-NEXT:    br label [[LOOP2_EXIT]]
106; CHECK:       loop2.exit:
107; CHECK-NEXT:    [[I9]] = add nuw nsw i32 [[LOCAL_0_]], 1
108; CHECK-NEXT:    br i1 false, label [[EXIT]], label [[LOOP1]]
109; CHECK:       exit:
110; CHECK-NEXT:    ret i32 0
111;
112entry:
113  br label %loop1
114
115loop1:                                            ; preds = %loop2.exit, %entry
116  %local_0_ = phi i32 [ 8, %entry ], [ %i9, %loop2.exit ]
117  %local_2_ = phi i32 [ 63864, %entry ], [ %local_2_43, %loop2.exit ]
118  %local_3_ = phi i32 [ 51, %entry ], [ %local_3_44, %loop2.exit ]
119  %i = udiv i32 14, %local_0_
120  %i1 = icmp ugt i32 %local_0_, 14
121  br i1 %i1, label %exit, label %general_case24
122
123general_case24:                                   ; preds = %loop1
124  %i2 = urem i32 60392, %i
125  br i1 false, label %loop2, label %loop2.exit
126
127loop2:                                            ; preds = %loop2, %general_case24
128  %local_1_56 = phi i32 [ %i2, %general_case24 ], [ %i3, %loop2 ]
129  %local_2_57 = phi i32 [ 1, %general_case24 ], [ %i7, %loop2 ]
130  %i3 = add i32 %local_1_56, -1
131  %i4 = load atomic i64, i64* %p1 unordered, align 8
132  %i5 = sext i32 %i3 to i64
133  %i6 = sub i64 %i4, %i5
134  store atomic i64 %i6, i64* %p1 unordered, align 8
135  %i7 = add nuw nsw i32 %local_2_57, 1
136  %i8 = icmp ugt i32 %local_2_57, 7
137  br i1 %i8, label %loop2.exit, label %loop2
138
139loop2.exit:                                       ; preds = %loop2, %general_case24
140  %local_2_43 = phi i32 [ %local_2_, %general_case24 ], [ 9, %loop2 ]
141  %local_3_44 = phi i32 [ %local_3_, %general_case24 ], [ %local_1_56, %loop2 ]
142  %i9 = add nuw nsw i32 %local_0_, 1
143  %i10 = icmp ugt i32 %local_0_, 129
144  br i1 %i10, label %exit, label %loop1
145
146exit:                                             ; preds = %loop2.exit, %loop1
147  ret i32 0
148}
149