1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -S -indvars < %s | FileCheck %s 3 4; Check that we replace signed comparisons between non-negative values with 5; unsigned comparisons if we can. 6 7target datalayout = "n8:16:32:64" 8 9define i32 @test_01(i32 %a, i32 %b, i32* %p) { 10; CHECK-LABEL: @test_01( 11; CHECK-NEXT: entry: 12; CHECK-NEXT: br label [[LOOP_ENTRY:%.*]] 13; CHECK: loop.entry: 14; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_BE:%.*]] ] 15; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[IV]], 100 16; CHECK-NEXT: br i1 [[CMP1]], label [[B1:%.*]], label [[B2:%.*]] 17; CHECK: b1: 18; CHECK-NEXT: store i32 [[IV]], i32* [[P:%.*]], align 4 19; CHECK-NEXT: br label [[MERGE:%.*]] 20; CHECK: b2: 21; CHECK-NEXT: store i32 [[A:%.*]], i32* [[P]], align 4 22; CHECK-NEXT: br label [[MERGE]] 23; CHECK: merge: 24; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[IV]], 100 25; CHECK-NEXT: br i1 [[CMP2]], label [[B3:%.*]], label [[B4:%.*]] 26; CHECK: b3: 27; CHECK-NEXT: store i32 [[IV]], i32* [[P]], align 4 28; CHECK-NEXT: br label [[LOOP_BE]] 29; CHECK: b4: 30; CHECK-NEXT: store i32 [[B:%.*]], i32* [[P]], align 4 31; CHECK-NEXT: br label [[LOOP_BE]] 32; CHECK: loop.be: 33; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1 34; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[IV_NEXT]], 1000 35; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP_ENTRY]], label [[EXIT:%.*]] 36; CHECK: exit: 37; CHECK-NEXT: ret i32 999 38; 39 40entry: 41 br label %loop.entry 42 43loop.entry: 44 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.be ] 45 %cmp1 = icmp slt i32 %iv, 100 46 br i1 %cmp1, label %b1, label %b2 47 48b1: 49 store i32 %iv, i32* %p 50 br label %merge 51 52b2: 53 store i32 %a, i32* %p 54 br label %merge 55 56merge: 57 %cmp2 = icmp ult i32 %iv, 100 58 br i1 %cmp2, label %b3, label %b4 59 60b3: 61 store i32 %iv, i32* %p 62 br label %loop.be 63 64b4: 65 store i32 %b, i32* %p 66 br label %loop.be 67 68loop.be: 69 %iv.next = add i32 %iv, 1 70 %cmp3 = icmp slt i32 %iv.next, 1000 71 br i1 %cmp3, label %loop.entry, label %exit 72 73exit: 74 ret i32 %iv 75} 76 77define i32 @test_02(i32 %a, i32 %b, i32* %p) { 78; CHECK-LABEL: @test_02( 79; CHECK-NEXT: entry: 80; CHECK-NEXT: br label [[LOOP_ENTRY:%.*]] 81; CHECK: loop.entry: 82; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_BE:%.*]] ] 83; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i32 100, [[IV]] 84; CHECK-NEXT: br i1 [[CMP1]], label [[B1:%.*]], label [[B2:%.*]] 85; CHECK: b1: 86; CHECK-NEXT: store i32 [[IV]], i32* [[P:%.*]], align 4 87; CHECK-NEXT: br label [[MERGE:%.*]] 88; CHECK: b2: 89; CHECK-NEXT: store i32 [[A:%.*]], i32* [[P]], align 4 90; CHECK-NEXT: br label [[MERGE]] 91; CHECK: merge: 92; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 100, [[IV]] 93; CHECK-NEXT: br i1 [[CMP2]], label [[B3:%.*]], label [[B4:%.*]] 94; CHECK: b3: 95; CHECK-NEXT: store i32 [[IV]], i32* [[P]], align 4 96; CHECK-NEXT: br label [[LOOP_BE]] 97; CHECK: b4: 98; CHECK-NEXT: store i32 [[B:%.*]], i32* [[P]], align 4 99; CHECK-NEXT: br label [[LOOP_BE]] 100; CHECK: loop.be: 101; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1 102; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[IV_NEXT]], 1000 103; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP_ENTRY]], label [[EXIT:%.*]] 104; CHECK: exit: 105; CHECK-NEXT: ret i32 999 106; 107 108entry: 109 br label %loop.entry 110 111loop.entry: 112 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.be ] 113 %cmp1 = icmp sgt i32 100, %iv 114 br i1 %cmp1, label %b1, label %b2 115 116b1: 117 store i32 %iv, i32* %p 118 br label %merge 119 120b2: 121 store i32 %a, i32* %p 122 br label %merge 123 124merge: 125 %cmp2 = icmp ugt i32 100, %iv 126 br i1 %cmp2, label %b3, label %b4 127 128b3: 129 store i32 %iv, i32* %p 130 br label %loop.be 131 132b4: 133 store i32 %b, i32* %p 134 br label %loop.be 135 136loop.be: 137 %iv.next = add i32 %iv, 1 138 %cmp3 = icmp sgt i32 1000, %iv.next 139 br i1 %cmp3, label %loop.entry, label %exit 140 141exit: 142 ret i32 %iv 143} 144