1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -instcombine -S | FileCheck %s
3
4define i64 @match_unsigned(i64 %x) {
5; CHECK-LABEL: @match_unsigned(
6; CHECK-NEXT:    [[UREM:%.*]] = urem i64 [[X:%.*]], 19136
7; CHECK-NEXT:    ret i64 [[UREM]]
8;
9  %t = urem i64 %x, 299
10  %t1 = udiv i64 %x, 299
11  %t2 = urem i64 %t1, 64
12  %t3 = mul i64 %t2, 299
13  %t4 = add i64 %t, %t3
14  ret i64 %t4
15}
16
17define <2 x i64> @match_unsigned_vector(<2 x i64> %x) {
18; CHECK-LABEL: @match_unsigned_vector(
19; CHECK-NEXT:  bb:
20; CHECK-NEXT:    [[UREM:%.*]] = urem <2 x i64> [[X:%.*]], <i64 19136, i64 19136>
21; CHECK-NEXT:    ret <2 x i64> [[UREM]]
22;
23bb:
24  %tmp = urem <2 x i64> %x, <i64 299, i64 299>
25  %tmp1 = udiv <2 x i64> %x, <i64 299, i64 299>
26  %tmp2 = urem <2 x i64> %tmp1, <i64 64, i64 64>
27  %tmp3 = mul <2 x i64> %tmp2, <i64 299, i64 299>
28  %tmp4 = add <2 x i64> %tmp, %tmp3
29  ret <2 x i64> %tmp4
30}
31define i64 @match_andAsRem_lshrAsDiv_shlAsMul(i64 %x) {
32; CHECK-LABEL: @match_andAsRem_lshrAsDiv_shlAsMul(
33; CHECK-NEXT:    [[UREM:%.*]] = urem i64 [[X:%.*]], 576
34; CHECK-NEXT:    ret i64 [[UREM]]
35;
36  %t = and i64 %x, 63
37  %t1 = lshr i64 %x, 6
38  %t2 = urem i64 %t1, 9
39  %t3 = shl i64 %t2, 6
40  %t4 = add i64 %t, %t3
41  ret i64 %t4
42}
43
44define i64 @match_signed(i64 %x) {
45; CHECK-LABEL: @match_signed(
46; CHECK-NEXT:    [[SREM1:%.*]] = srem i64 [[X:%.*]], 172224
47; CHECK-NEXT:    ret i64 [[SREM1]]
48;
49  %t = srem i64 %x, 299
50  %t1 = sdiv i64 %x, 299
51  %t2 = srem i64 %t1, 64
52  %t3 = sdiv i64 %x, 19136
53  %t4 = srem i64 %t3, 9
54  %t5 = mul i64 %t2, 299
55  %t6 = add i64 %t, %t5
56  %t7 = mul i64 %t4, 19136
57  %t8 = add i64 %t6, %t7
58  ret i64 %t8
59}
60
61define <2 x i64> @match_signed_vector(<2 x i64> %x) {
62; CHECK-LABEL: @match_signed_vector(
63; CHECK-NEXT:  bb:
64; CHECK-NEXT:    [[SREM1:%.*]] = srem <2 x i64> [[X:%.*]], <i64 172224, i64 172224>
65; CHECK-NEXT:    ret <2 x i64> [[SREM1]]
66;
67bb:
68  %tmp = srem <2 x i64> %x, <i64 299, i64 299>
69  %tmp1 = sdiv <2 x i64> %x, <i64 299, i64 299>
70  %tmp2 = srem <2 x i64> %tmp1, <i64 64, i64 64>
71  %tmp3 = sdiv <2 x i64> %x, <i64 19136, i64 19136>
72  %tmp4 = srem <2 x i64> %tmp3, <i64 9, i64 9>
73  %tmp5 = mul <2 x i64> %tmp2, <i64 299, i64 299>
74  %tmp6 = add <2 x i64> %tmp, %tmp5
75  %tmp7 = mul <2 x i64> %tmp4, <i64 19136, i64 19136>
76  %tmp8 = add <2 x i64> %tmp6, %tmp7
77  ret <2 x i64> %tmp8
78}
79
80define i64 @not_match_inconsistent_signs(i64 %x) {
81; CHECK-LABEL: @not_match_inconsistent_signs(
82; CHECK-NEXT:    [[T:%.*]] = urem i64 [[X:%.*]], 299
83; CHECK-NEXT:    [[T1:%.*]] = sdiv i64 [[X]], 299
84; CHECK-NEXT:    [[T2:%.*]] = and i64 [[T1]], 63
85; CHECK-NEXT:    [[T3:%.*]] = mul nuw nsw i64 [[T2]], 299
86; CHECK-NEXT:    [[T4:%.*]] = add nuw nsw i64 [[T]], [[T3]]
87; CHECK-NEXT:    ret i64 [[T4]]
88;
89  %t = urem i64 %x, 299
90  %t1 = sdiv i64 %x, 299
91  %t2 = urem i64 %t1, 64
92  %t3 = mul i64 %t2, 299
93  %t4 = add i64 %t, %t3
94  ret i64 %t4
95}
96
97define i64 @not_match_inconsistent_values(i64 %x) {
98; CHECK-LABEL: @not_match_inconsistent_values(
99; CHECK-NEXT:    [[T:%.*]] = urem i64 [[X:%.*]], 299
100; CHECK-NEXT:    [[T1:%.*]] = udiv i64 [[X]], 29
101; CHECK-NEXT:    [[T2:%.*]] = and i64 [[T1]], 63
102; CHECK-NEXT:    [[T3:%.*]] = mul nuw nsw i64 [[T2]], 299
103; CHECK-NEXT:    [[T4:%.*]] = add nuw nsw i64 [[T]], [[T3]]
104; CHECK-NEXT:    ret i64 [[T4]]
105;
106  %t = urem i64 %x, 299
107  %t1 = udiv i64 %x, 29
108  %t2 = urem i64 %t1, 64
109  %t3 = mul i64 %t2, 299
110  %t4 = add i64 %t, %t3
111  ret i64 %t4
112}
113
114define i32 @not_match_overflow(i32 %x) {
115; CHECK-LABEL: @not_match_overflow(
116; CHECK-NEXT:    [[T:%.*]] = urem i32 [[X:%.*]], 299
117; CHECK-NEXT:    [[TMP1:%.*]] = urem i32 [[X]], 299
118; CHECK-NEXT:    [[T3:%.*]] = sub i32 [[X]], [[TMP1]]
119; CHECK-NEXT:    [[T4:%.*]] = add i32 [[T]], [[T3]]
120; CHECK-NEXT:    ret i32 [[T4]]
121;
122  %t = urem i32 %x, 299
123  %t1 = udiv i32 %x, 299
124  %t2 = urem i32 %t1, 147483647
125  %t3 = mul i32 %t2, 299
126  %t4 = add i32 %t, %t3
127  ret i32 %t4
128}
129