1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -instcombine -S | FileCheck %s 3 4define i55 @test6(i55 %A) { 5; CHECK-LABEL: @test6( 6; CHECK-NEXT: [[C:%.*]] = mul i55 [[A:%.*]], 6 7; CHECK-NEXT: ret i55 [[C]] 8; 9 %B = shl i55 %A, 1 10 %C = mul i55 %B, 3 11 ret i55 %C 12} 13 14; (X * C2) << C1 --> X * (C2 << C1) 15 16define i55 @test6a(i55 %A) { 17; CHECK-LABEL: @test6a( 18; CHECK-NEXT: [[C:%.*]] = mul i55 [[A:%.*]], 6 19; CHECK-NEXT: ret i55 [[C]] 20; 21 %B = mul i55 %A, 3 22 %C = shl i55 %B, 1 23 ret i55 %C 24} 25 26; (X * C2) << C1 --> X * (C2 << C1) 27 28define <2 x i55> @test6a_vec(<2 x i55> %A) { 29; CHECK-LABEL: @test6a_vec( 30; CHECK-NEXT: [[C:%.*]] = mul <2 x i55> [[A:%.*]], <i55 6, i55 48> 31; CHECK-NEXT: ret <2 x i55> [[C]] 32; 33 %B = mul <2 x i55> %A, <i55 3, i55 12> 34 %C = shl <2 x i55> %B, <i55 1, i55 2> 35 ret <2 x i55> %C 36} 37 38define i29 @test7(i8 %X) { 39; CHECK-LABEL: @test7( 40; CHECK-NEXT: ret i29 -1 41; 42 %A = zext i8 %X to i29 43 %B = ashr i29 -1, %A 44 ret i29 %B 45} 46 47define i7 @test8(i7 %A) { 48; CHECK-LABEL: @test8( 49; CHECK-NEXT: ret i7 0 50; 51 %B = shl i7 %A, 4 52 %C = shl i7 %B, 3 53 ret i7 %C 54} 55 56define i17 @test9(i17 %A) { 57; CHECK-LABEL: @test9( 58; CHECK-NEXT: [[B:%.*]] = and i17 [[A:%.*]], 1 59; CHECK-NEXT: ret i17 [[B]] 60; 61 %B = shl i17 %A, 16 62 %C = lshr i17 %B, 16 63 ret i17 %C 64} 65 66; shl (lshr X, C), C --> and X, C' 67 68define i19 @test10(i19 %X) { 69; CHECK-LABEL: @test10( 70; CHECK-NEXT: [[SH1:%.*]] = and i19 [[X:%.*]], -262144 71; CHECK-NEXT: ret i19 [[SH1]] 72; 73 %sh1 = lshr i19 %X, 18 74 %sh2 = shl i19 %sh1, 18 75 ret i19 %sh2 76} 77 78; Two right shifts in the same direction: 79; lshr (lshr X, C1), C2 --> lshr X, C1 + C2 80 81define <2 x i19> @lshr_lshr_splat_vec(<2 x i19> %X) { 82; CHECK-LABEL: @lshr_lshr_splat_vec( 83; CHECK-NEXT: [[SH1:%.*]] = lshr <2 x i19> [[X:%.*]], <i19 5, i19 5> 84; CHECK-NEXT: ret <2 x i19> [[SH1]] 85; 86 %sh1 = lshr <2 x i19> %X, <i19 3, i19 3> 87 %sh2 = lshr <2 x i19> %sh1, <i19 2, i19 2> 88 ret <2 x i19> %sh2 89} 90 91define i9 @multiuse_lshr_lshr(i9 %x) { 92; CHECK-LABEL: @multiuse_lshr_lshr( 93; CHECK-NEXT: [[SH1:%.*]] = lshr i9 [[X:%.*]], 2 94; CHECK-NEXT: [[SH2:%.*]] = lshr i9 [[X]], 5 95; CHECK-NEXT: [[MUL:%.*]] = mul i9 [[SH1]], [[SH2]] 96; CHECK-NEXT: ret i9 [[MUL]] 97; 98 %sh1 = lshr i9 %x, 2 99 %sh2 = lshr i9 %sh1, 3 100 %mul = mul i9 %sh1, %sh2 101 ret i9 %mul 102} 103 104define <2 x i9> @multiuse_lshr_lshr_splat(<2 x i9> %x) { 105; CHECK-LABEL: @multiuse_lshr_lshr_splat( 106; CHECK-NEXT: [[SH1:%.*]] = lshr <2 x i9> [[X:%.*]], <i9 2, i9 2> 107; CHECK-NEXT: [[SH2:%.*]] = lshr <2 x i9> [[X]], <i9 5, i9 5> 108; CHECK-NEXT: [[MUL:%.*]] = mul <2 x i9> [[SH1]], [[SH2]] 109; CHECK-NEXT: ret <2 x i9> [[MUL]] 110; 111 %sh1 = lshr <2 x i9> %x, <i9 2, i9 2> 112 %sh2 = lshr <2 x i9> %sh1, <i9 3, i9 3> 113 %mul = mul <2 x i9> %sh1, %sh2 114 ret <2 x i9> %mul 115} 116 117; Two left shifts in the same direction: 118; shl (shl X, C1), C2 --> shl X, C1 + C2 119 120define <2 x i19> @shl_shl_splat_vec(<2 x i19> %X) { 121; CHECK-LABEL: @shl_shl_splat_vec( 122; CHECK-NEXT: [[SH1:%.*]] = shl <2 x i19> [[X:%.*]], <i19 5, i19 5> 123; CHECK-NEXT: ret <2 x i19> [[SH1]] 124; 125 %sh1 = shl <2 x i19> %X, <i19 3, i19 3> 126 %sh2 = shl <2 x i19> %sh1, <i19 2, i19 2> 127 ret <2 x i19> %sh2 128} 129 130define i42 @multiuse_shl_shl(i42 %x) { 131; CHECK-LABEL: @multiuse_shl_shl( 132; CHECK-NEXT: [[SH1:%.*]] = shl i42 [[X:%.*]], 8 133; CHECK-NEXT: [[SH2:%.*]] = shl i42 [[X]], 17 134; CHECK-NEXT: [[MUL:%.*]] = mul i42 [[SH1]], [[SH2]] 135; CHECK-NEXT: ret i42 [[MUL]] 136; 137 %sh1 = shl i42 %x, 8 138 %sh2 = shl i42 %sh1, 9 139 %mul = mul i42 %sh1, %sh2 140 ret i42 %mul 141} 142 143define <2 x i42> @multiuse_shl_shl_splat(<2 x i42> %x) { 144; CHECK-LABEL: @multiuse_shl_shl_splat( 145; CHECK-NEXT: [[SH1:%.*]] = shl <2 x i42> [[X:%.*]], <i42 8, i42 8> 146; CHECK-NEXT: [[SH2:%.*]] = shl <2 x i42> [[X]], <i42 17, i42 17> 147; CHECK-NEXT: [[MUL:%.*]] = mul <2 x i42> [[SH1]], [[SH2]] 148; CHECK-NEXT: ret <2 x i42> [[MUL]] 149; 150 %sh1 = shl <2 x i42> %x, <i42 8, i42 8> 151 %sh2 = shl <2 x i42> %sh1, <i42 9, i42 9> 152 %mul = mul <2 x i42> %sh1, %sh2 153 ret <2 x i42> %mul 154} 155 156; Equal shift amounts in opposite directions become bitwise 'and': 157; lshr (shl X, C), C --> and X, C' 158 159define <2 x i19> @eq_shl_lshr_splat_vec(<2 x i19> %X) { 160; CHECK-LABEL: @eq_shl_lshr_splat_vec( 161; CHECK-NEXT: [[SH1:%.*]] = and <2 x i19> [[X:%.*]], <i19 65535, i19 65535> 162; CHECK-NEXT: ret <2 x i19> [[SH1]] 163; 164 %sh1 = shl <2 x i19> %X, <i19 3, i19 3> 165 %sh2 = lshr <2 x i19> %sh1, <i19 3, i19 3> 166 ret <2 x i19> %sh2 167} 168 169; Equal shift amounts in opposite directions become bitwise 'and': 170; shl (lshr X, C), C --> and X, C' 171 172define <2 x i19> @eq_lshr_shl_splat_vec(<2 x i19> %X) { 173; CHECK-LABEL: @eq_lshr_shl_splat_vec( 174; CHECK-NEXT: [[SH1:%.*]] = and <2 x i19> [[X:%.*]], <i19 -8, i19 -8> 175; CHECK-NEXT: ret <2 x i19> [[SH1]] 176; 177 %sh1 = lshr <2 x i19> %X, <i19 3, i19 3> 178 %sh2 = shl <2 x i19> %sh1, <i19 3, i19 3> 179 ret <2 x i19> %sh2 180} 181 182; In general, we would need an 'and' for this transform, but the masked-off bits are known zero. 183; shl (lshr X, C1), C2 --> lshr X, C1 - C2 184 185define <2 x i7> @lshr_shl_splat_vec(<2 x i7> %X) { 186; CHECK-LABEL: @lshr_shl_splat_vec( 187; CHECK-NEXT: [[MUL:%.*]] = mul <2 x i7> [[X:%.*]], <i7 -8, i7 -8> 188; CHECK-NEXT: [[SH1:%.*]] = lshr exact <2 x i7> [[MUL]], <i7 1, i7 1> 189; CHECK-NEXT: ret <2 x i7> [[SH1]] 190; 191 %mul = mul <2 x i7> %X, <i7 -8, i7 -8> 192 %sh1 = lshr exact <2 x i7> %mul, <i7 3, i7 3> 193 %sh2 = shl nuw nsw <2 x i7> %sh1, <i7 2, i7 2> 194 ret <2 x i7> %sh2 195} 196 197; In general, we would need an 'and' for this transform, but the masked-off bits are known zero. 198; lshr (shl X, C1), C2 --> shl X, C1 - C2 199 200define <2 x i7> @shl_lshr_splat_vec(<2 x i7> %X) { 201; CHECK-LABEL: @shl_lshr_splat_vec( 202; CHECK-NEXT: [[DIV:%.*]] = udiv <2 x i7> [[X:%.*]], <i7 9, i7 9> 203; CHECK-NEXT: [[SH1:%.*]] = shl nuw nsw <2 x i7> [[DIV]], <i7 1, i7 1> 204; CHECK-NEXT: ret <2 x i7> [[SH1]] 205; 206 %div = udiv <2 x i7> %X, <i7 9, i7 9> 207 %sh1 = shl nuw <2 x i7> %div, <i7 3, i7 3> 208 %sh2 = lshr exact <2 x i7> %sh1, <i7 2, i7 2> 209 ret <2 x i7> %sh2 210} 211 212define i23 @test11(i23 %x) { 213; CHECK-LABEL: @test11( 214; CHECK-NEXT: [[TMP1:%.*]] = mul i23 [[X:%.*]], 6 215; CHECK-NEXT: [[C:%.*]] = and i23 [[TMP1]], -4096 216; CHECK-NEXT: ret i23 [[C]] 217; 218 %a = mul i23 %x, 3 219 %b = lshr i23 %a, 11 220 %c = shl i23 %b, 12 221 ret i23 %c 222} 223 224; shl (ashr X, C), C --> and X, C' 225 226define i47 @test12(i47 %X) { 227; CHECK-LABEL: @test12( 228; CHECK-NEXT: [[TMP1:%.*]] = and i47 [[X:%.*]], -256 229; CHECK-NEXT: ret i47 [[TMP1]] 230; 231 %sh1 = ashr i47 %X, 8 232 %sh2 = shl i47 %sh1, 8 233 ret i47 %sh2 234} 235 236define <2 x i47> @test12_splat_vec(<2 x i47> %X) { 237; CHECK-LABEL: @test12_splat_vec( 238; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i47> [[X:%.*]], <i47 -256, i47 -256> 239; CHECK-NEXT: ret <2 x i47> [[TMP1]] 240; 241 %sh1 = ashr <2 x i47> %X, <i47 8, i47 8> 242 %sh2 = shl <2 x i47> %sh1, <i47 8, i47 8> 243 ret <2 x i47> %sh2 244} 245 246define i18 @test13(i18 %x) { 247; CHECK-LABEL: @test13( 248; CHECK-NEXT: [[TMP1:%.*]] = mul i18 [[X:%.*]], 6 249; CHECK-NEXT: [[C:%.*]] = and i18 [[TMP1]], -512 250; CHECK-NEXT: ret i18 [[C]] 251; 252 %a = mul i18 %x, 3 253 %b = ashr i18 %a, 8 254 %c = shl i18 %b, 9 255 ret i18 %c 256} 257 258define i35 @test14(i35 %A) { 259; CHECK-LABEL: @test14( 260; CHECK-NEXT: [[B:%.*]] = and i35 [[A:%.*]], -19760 261; CHECK-NEXT: [[C:%.*]] = or i35 [[B]], 19744 262; CHECK-NEXT: ret i35 [[C]] 263; 264 %B = lshr i35 %A, 4 265 %C = or i35 %B, 1234 266 %D = shl i35 %C, 4 267 ret i35 %D 268} 269 270define i79 @test14a(i79 %A) { 271; CHECK-LABEL: @test14a( 272; CHECK-NEXT: [[C:%.*]] = and i79 [[A:%.*]], 77 273; CHECK-NEXT: ret i79 [[C]] 274; 275 %B = shl i79 %A, 4 276 %C = and i79 %B, 1234 277 %D = lshr i79 %C, 4 278 ret i79 %D 279} 280 281define i45 @test15(i1 %C) { 282; CHECK-LABEL: @test15( 283; CHECK-NEXT: [[A:%.*]] = select i1 [[C:%.*]], i45 12, i45 4 284; CHECK-NEXT: ret i45 [[A]] 285; 286 %A = select i1 %C, i45 3, i45 1 287 %V = shl i45 %A, 2 288 ret i45 %V 289} 290 291define i53 @test15a(i1 %X) { 292; CHECK-LABEL: @test15a( 293; CHECK-NEXT: [[V:%.*]] = select i1 [[X:%.*]], i53 512, i53 128 294; CHECK-NEXT: ret i53 [[V]] 295; 296 %A = select i1 %X, i8 3, i8 1 297 %B = zext i8 %A to i53 298 %V = shl i53 64, %B 299 ret i53 %V 300} 301 302define i1 @test16(i84 %X) { 303; CHECK-LABEL: @test16( 304; CHECK-NEXT: [[TMP1:%.*]] = and i84 [[X:%.*]], 16 305; CHECK-NEXT: [[CMP:%.*]] = icmp ne i84 [[TMP1]], 0 306; CHECK-NEXT: ret i1 [[CMP]] 307; 308 %shr = ashr i84 %X, 4 309 %and = and i84 %shr, 1 310 %cmp = icmp ne i84 %and, 0 311 ret i1 %cmp 312} 313 314define <2 x i1> @test16vec(<2 x i84> %X) { 315; CHECK-LABEL: @test16vec( 316; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i84> [[X:%.*]], <i84 16, i84 16> 317; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i84> [[TMP1]], zeroinitializer 318; CHECK-NEXT: ret <2 x i1> [[CMP]] 319; 320 %shr = ashr <2 x i84> %X, <i84 4, i84 4> 321 %and = and <2 x i84> %shr, <i84 1, i84 1> 322 %cmp = icmp ne <2 x i84> %and, zeroinitializer 323 ret <2 x i1> %cmp 324} 325 326define <2 x i1> @test16vec_nonuniform(<2 x i84> %X) { 327; CHECK-LABEL: @test16vec_nonuniform( 328; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i84> [[X:%.*]], <i84 16, i84 4> 329; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i84> [[TMP1]], zeroinitializer 330; CHECK-NEXT: ret <2 x i1> [[CMP]] 331; 332 %shr = ashr <2 x i84> %X, <i84 4, i84 2> 333 %and = and <2 x i84> %shr, <i84 1, i84 1> 334 %cmp = icmp ne <2 x i84> %and, zeroinitializer 335 ret <2 x i1> %cmp 336} 337 338define <2 x i1> @test16vec_undef(<2 x i84> %X) { 339; CHECK-LABEL: @test16vec_undef( 340; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i84> [[X:%.*]], <i84 16, i84 poison> 341; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i84> [[TMP1]], zeroinitializer 342; CHECK-NEXT: ret <2 x i1> [[CMP]] 343; 344 %shr = ashr <2 x i84> %X, <i84 4, i84 undef> 345 %and = and <2 x i84> %shr, <i84 1, i84 1> 346 %cmp = icmp ne <2 x i84> %and, zeroinitializer 347 ret <2 x i1> %cmp 348} 349 350define i1 @test17(i106 %A) { 351; CHECK-LABEL: @test17( 352; CHECK-NEXT: [[B_MASK:%.*]] = and i106 [[A:%.*]], -8 353; CHECK-NEXT: [[C:%.*]] = icmp eq i106 [[B_MASK]], 9872 354; CHECK-NEXT: ret i1 [[C]] 355; 356 %B = lshr i106 %A, 3 357 %C = icmp eq i106 %B, 1234 358 ret i1 %C 359} 360 361define <2 x i1> @test17vec(<2 x i106> %A) { 362; CHECK-LABEL: @test17vec( 363; CHECK-NEXT: [[B_MASK:%.*]] = and <2 x i106> [[A:%.*]], <i106 -8, i106 -8> 364; CHECK-NEXT: [[C:%.*]] = icmp eq <2 x i106> [[B_MASK]], <i106 9872, i106 9872> 365; CHECK-NEXT: ret <2 x i1> [[C]] 366; 367 %B = lshr <2 x i106> %A, <i106 3, i106 3> 368 %C = icmp eq <2 x i106> %B, <i106 1234, i106 1234> 369 ret <2 x i1> %C 370} 371 372define i1 @test18(i11 %A) { 373; CHECK-LABEL: @test18( 374; CHECK-NEXT: ret i1 false 375; 376 %B = lshr i11 %A, 10 377 %C = icmp eq i11 %B, 123 378 ret i1 %C 379} 380 381define i1 @test19(i37 %A) { 382; CHECK-LABEL: @test19( 383; CHECK-NEXT: [[C:%.*]] = icmp ult i37 [[A:%.*]], 4 384; CHECK-NEXT: ret i1 [[C]] 385; 386 %B = ashr i37 %A, 2 387 %C = icmp eq i37 %B, 0 388 ret i1 %C 389} 390 391define <2 x i1> @test19vec(<2 x i37> %A) { 392; CHECK-LABEL: @test19vec( 393; CHECK-NEXT: [[C:%.*]] = icmp ult <2 x i37> [[A:%.*]], <i37 4, i37 4> 394; CHECK-NEXT: ret <2 x i1> [[C]] 395; 396 %B = ashr <2 x i37> %A, <i37 2, i37 2> 397 %C = icmp eq <2 x i37> %B, zeroinitializer 398 ret <2 x i1> %C 399} 400 401define i1 @test19a(i39 %A) { 402; CHECK-LABEL: @test19a( 403; CHECK-NEXT: [[C:%.*]] = icmp ugt i39 [[A:%.*]], -5 404; CHECK-NEXT: ret i1 [[C]] 405; 406 %B = ashr i39 %A, 2 407 %C = icmp eq i39 %B, -1 408 ret i1 %C 409} 410 411define <2 x i1> @test19a_vec(<2 x i39> %A) { 412; CHECK-LABEL: @test19a_vec( 413; CHECK-NEXT: [[C:%.*]] = icmp ugt <2 x i39> [[A:%.*]], <i39 -5, i39 -5> 414; CHECK-NEXT: ret <2 x i1> [[C]] 415; 416 %B = ashr <2 x i39> %A, <i39 2, i39 2> 417 %C = icmp eq <2 x i39> %B, <i39 -1, i39 -1> 418 ret <2 x i1> %C 419} 420 421define i1 @test20(i13 %A) { 422; CHECK-LABEL: @test20( 423; CHECK-NEXT: ret i1 false 424; 425 %B = ashr i13 %A, 12 426 %C = icmp eq i13 %B, 123 427 ret i1 %C 428} 429 430define i1 @test21(i12 %A) { 431; CHECK-LABEL: @test21( 432; CHECK-NEXT: [[B_MASK:%.*]] = and i12 [[A:%.*]], 63 433; CHECK-NEXT: [[C:%.*]] = icmp eq i12 [[B_MASK]], 62 434; CHECK-NEXT: ret i1 [[C]] 435; 436 %B = shl i12 %A, 6 437 %C = icmp eq i12 %B, -128 438 ret i1 %C 439} 440 441define i1 @test22(i14 %A) { 442; CHECK-LABEL: @test22( 443; CHECK-NEXT: [[B_MASK:%.*]] = and i14 [[A:%.*]], 127 444; CHECK-NEXT: [[C:%.*]] = icmp eq i14 [[B_MASK]], 0 445; CHECK-NEXT: ret i1 [[C]] 446; 447 %B = shl i14 %A, 7 448 %C = icmp eq i14 %B, 0 449 ret i1 %C 450} 451 452define i11 @test23(i44 %A) { 453; CHECK-LABEL: @test23( 454; CHECK-NEXT: [[D:%.*]] = trunc i44 [[A:%.*]] to i11 455; CHECK-NEXT: ret i11 [[D]] 456; 457 %B = shl i44 %A, 33 458 %C = ashr i44 %B, 33 459 %D = trunc i44 %C to i11 460 ret i11 %D 461} 462 463; Fold lshr (shl X, C), C -> and X, C' regardless of the number of uses of the shl. 464 465define i44 @shl_lshr_eq_amt_multi_use(i44 %A) { 466; CHECK-LABEL: @shl_lshr_eq_amt_multi_use( 467; CHECK-NEXT: [[B:%.*]] = shl i44 [[A:%.*]], 33 468; CHECK-NEXT: [[C:%.*]] = and i44 [[A]], 2047 469; CHECK-NEXT: [[D:%.*]] = or i44 [[B]], [[C]] 470; CHECK-NEXT: ret i44 [[D]] 471; 472 %B = shl i44 %A, 33 473 %C = lshr i44 %B, 33 474 %D = add i44 %B, %C 475 ret i44 %D 476} 477 478; Fold vector lshr (shl X, C), C -> and X, C' regardless of the number of uses of the shl. 479 480define <2 x i44> @shl_lshr_eq_amt_multi_use_splat_vec(<2 x i44> %A) { 481; CHECK-LABEL: @shl_lshr_eq_amt_multi_use_splat_vec( 482; CHECK-NEXT: [[B:%.*]] = shl <2 x i44> [[A:%.*]], <i44 33, i44 33> 483; CHECK-NEXT: [[C:%.*]] = and <2 x i44> [[A]], <i44 2047, i44 2047> 484; CHECK-NEXT: [[D:%.*]] = or <2 x i44> [[B]], [[C]] 485; CHECK-NEXT: ret <2 x i44> [[D]] 486; 487 %B = shl <2 x i44> %A, <i44 33, i44 33> 488 %C = lshr <2 x i44> %B, <i44 33, i44 33> 489 %D = add <2 x i44> %B, %C 490 ret <2 x i44> %D 491} 492 493; Fold shl (lshr X, C), C -> and X, C' regardless of the number of uses of the lshr. 494 495define i43 @lshr_shl_eq_amt_multi_use(i43 %A) { 496; CHECK-LABEL: @lshr_shl_eq_amt_multi_use( 497; CHECK-NEXT: [[B:%.*]] = lshr i43 [[A:%.*]], 23 498; CHECK-NEXT: [[C:%.*]] = and i43 [[A]], -8388608 499; CHECK-NEXT: [[D:%.*]] = mul i43 [[B]], [[C]] 500; CHECK-NEXT: ret i43 [[D]] 501; 502 %B = lshr i43 %A, 23 503 %C = shl i43 %B, 23 504 %D = mul i43 %B, %C 505 ret i43 %D 506} 507 508; Fold vector shl (lshr X, C), C -> and X, C' regardless of the number of uses of the lshr. 509 510define <2 x i43> @lshr_shl_eq_amt_multi_use_splat_vec(<2 x i43> %A) { 511; CHECK-LABEL: @lshr_shl_eq_amt_multi_use_splat_vec( 512; CHECK-NEXT: [[B:%.*]] = lshr <2 x i43> [[A:%.*]], <i43 23, i43 23> 513; CHECK-NEXT: [[C:%.*]] = and <2 x i43> [[A]], <i43 -8388608, i43 -8388608> 514; CHECK-NEXT: [[D:%.*]] = mul <2 x i43> [[B]], [[C]] 515; CHECK-NEXT: ret <2 x i43> [[D]] 516; 517 %B = lshr <2 x i43> %A, <i43 23, i43 23> 518 %C = shl <2 x i43> %B, <i43 23, i43 23> 519 %D = mul <2 x i43> %B, %C 520 ret <2 x i43> %D 521} 522 523define i37 @test25(i37 %AA, i37 %BB) { 524; CHECK-LABEL: @test25( 525; CHECK-NEXT: [[D:%.*]] = and i37 [[AA:%.*]], -131072 526; CHECK-NEXT: [[C2:%.*]] = add i37 [[D]], [[BB:%.*]] 527; CHECK-NEXT: [[F:%.*]] = and i37 [[C2]], -131072 528; CHECK-NEXT: ret i37 [[F]] 529; 530 %C = lshr i37 %BB, 17 531 %D = lshr i37 %AA, 17 532 %E = add i37 %D, %C 533 %F = shl i37 %E, 17 534 ret i37 %F 535} 536 537define i40 @test26(i40 %A) { 538; CHECK-LABEL: @test26( 539; CHECK-NEXT: [[B:%.*]] = and i40 [[A:%.*]], -2 540; CHECK-NEXT: ret i40 [[B]] 541; 542 %B = lshr i40 %A, 1 543 %C = bitcast i40 %B to i40 544 %D = shl i40 %C, 1 545 ret i40 %D 546} 547 548; OSS-Fuzz #9880 549; https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=9880 550define i177 @ossfuzz_9880(i177 %X) { 551; CHECK-LABEL: @ossfuzz_9880( 552; CHECK-NEXT: [[A:%.*]] = alloca i177, align 8 553; CHECK-NEXT: [[L1:%.*]] = load i177, i177* [[A]], align 8 554; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i177 [[L1]], -1 555; CHECK-NEXT: [[B5_NEG:%.*]] = sext i1 [[TMP1]] to i177 556; CHECK-NEXT: [[B14:%.*]] = add i177 [[L1]], [[B5_NEG]] 557; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i177 [[B14]], -1 558; CHECK-NEXT: [[B1:%.*]] = zext i1 [[TMP2]] to i177 559; CHECK-NEXT: ret i177 [[B1]] 560; 561 %A = alloca i177 562 %L1 = load i177, i177* %A 563 %B = or i177 0, -1 564 %B5 = udiv i177 %L1, %B 565 %B4 = add i177 %B5, %B 566 %B2 = add i177 %B, %B4 567 %B6 = mul i177 %B5, %B2 568 %B20 = shl i177 %L1, %B6 569 %B14 = sub i177 %B20, %B5 570 %B1 = udiv i177 %B14, %B6 571 ret i177 %B1 572} 573