1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -instcombine -S | FileCheck %s 3 4declare i32 @llvm.abs.i32(i32, i1) 5 6define i32 @pow2_multiplier(i32 %A) { 7; CHECK-LABEL: @pow2_multiplier( 8; CHECK-NEXT: [[B:%.*]] = shl i32 [[A:%.*]], 1 9; CHECK-NEXT: ret i32 [[B]] 10; 11 %B = mul i32 %A, 2 12 ret i32 %B 13} 14 15define <2 x i32> @pow2_multiplier_vec(<2 x i32> %A) { 16; CHECK-LABEL: @pow2_multiplier_vec( 17; CHECK-NEXT: [[B:%.*]] = shl <2 x i32> [[A:%.*]], <i32 3, i32 3> 18; CHECK-NEXT: ret <2 x i32> [[B]] 19; 20 %B = mul <2 x i32> %A, <i32 8, i32 8> 21 ret <2 x i32> %B 22} 23 24define i8 @combine_shl(i8 %A) { 25; CHECK-LABEL: @combine_shl( 26; CHECK-NEXT: [[C:%.*]] = shl i8 [[A:%.*]], 6 27; CHECK-NEXT: ret i8 [[C]] 28; 29 %B = mul i8 %A, 8 30 %C = mul i8 %B, 8 31 ret i8 %C 32} 33 34define i32 @neg(i32 %i) { 35; CHECK-LABEL: @neg( 36; CHECK-NEXT: [[T:%.*]] = sub i32 0, [[I:%.*]] 37; CHECK-NEXT: ret i32 [[T]] 38; 39 %t = mul i32 %i, -1 40 ret i32 %t 41} 42 43; Use the sign-bit as a mask: 44; (zext (A < 0)) * B --> (A >> 31) & B 45 46define i32 @test10(i32 %a, i32 %b) { 47; CHECK-LABEL: @test10( 48; CHECK-NEXT: [[TMP1:%.*]] = ashr i32 [[A:%.*]], 31 49; CHECK-NEXT: [[E:%.*]] = and i32 [[TMP1]], [[B:%.*]] 50; CHECK-NEXT: ret i32 [[E]] 51; 52 %c = icmp slt i32 %a, 0 53 %d = zext i1 %c to i32 54 %e = mul i32 %d, %b 55 ret i32 %e 56} 57 58define i32 @test11(i32 %a, i32 %b) { 59; CHECK-LABEL: @test11( 60; CHECK-NEXT: [[TMP1:%.*]] = ashr i32 [[A:%.*]], 31 61; CHECK-NEXT: [[E:%.*]] = and i32 [[TMP1]], [[B:%.*]] 62; CHECK-NEXT: ret i32 [[E]] 63; 64 %c = icmp sle i32 %a, -1 65 %d = zext i1 %c to i32 66 %e = mul i32 %d, %b 67 ret i32 %e 68} 69 70declare void @use32(i32) 71 72define i32 @test12(i32 %a, i32 %b) { 73; CHECK-LABEL: @test12( 74; CHECK-NEXT: [[A_LOBIT:%.*]] = lshr i32 [[A:%.*]], 31 75; CHECK-NEXT: [[TMP1:%.*]] = ashr i32 [[A]], 31 76; CHECK-NEXT: [[E:%.*]] = and i32 [[TMP1]], [[B:%.*]] 77; CHECK-NEXT: call void @use32(i32 [[A_LOBIT]]) 78; CHECK-NEXT: ret i32 [[E]] 79; 80 %c = icmp ugt i32 %a, 2147483647 81 %d = zext i1 %c to i32 82 %e = mul i32 %d, %b 83 call void @use32(i32 %d) 84 ret i32 %e 85} 86 87; rdar://7293527 88define i32 @test15(i32 %A, i32 %B) { 89; CHECK-LABEL: @test15( 90; CHECK-NEXT: [[M:%.*]] = shl i32 [[A:%.*]], [[B:%.*]] 91; CHECK-NEXT: ret i32 [[M]] 92; 93 %shl = shl i32 1, %B 94 %m = mul i32 %shl, %A 95 ret i32 %m 96} 97 98; X * Y (when Y is a boolean) --> Y ? X : 0 99 100define i32 @mul_bool(i32 %x, i1 %y) { 101; CHECK-LABEL: @mul_bool( 102; CHECK-NEXT: [[M:%.*]] = select i1 [[Y:%.*]], i32 [[X:%.*]], i32 0 103; CHECK-NEXT: ret i32 [[M]] 104; 105 %z = zext i1 %y to i32 106 %m = mul i32 %x, %z 107 ret i32 %m 108} 109 110; Commute and test vector type. 111 112define <2 x i32> @mul_bool_vec(<2 x i32> %x, <2 x i1> %y) { 113; CHECK-LABEL: @mul_bool_vec( 114; CHECK-NEXT: [[M:%.*]] = select <2 x i1> [[Y:%.*]], <2 x i32> [[X:%.*]], <2 x i32> zeroinitializer 115; CHECK-NEXT: ret <2 x i32> [[M]] 116; 117 %z = zext <2 x i1> %y to <2 x i32> 118 %m = mul <2 x i32> %x, %z 119 ret <2 x i32> %m 120} 121 122define <2 x i32> @mul_bool_vec_commute(<2 x i32> %x, <2 x i1> %y) { 123; CHECK-LABEL: @mul_bool_vec_commute( 124; CHECK-NEXT: [[M:%.*]] = select <2 x i1> [[Y:%.*]], <2 x i32> [[X:%.*]], <2 x i32> zeroinitializer 125; CHECK-NEXT: ret <2 x i32> [[M]] 126; 127 %z = zext <2 x i1> %y to <2 x i32> 128 %m = mul <2 x i32> %z, %x 129 ret <2 x i32> %m 130} 131 132define <3 x i7> @mul_bools(<3 x i1> %x, <3 x i1> %y) { 133; CHECK-LABEL: @mul_bools( 134; CHECK-NEXT: [[MULBOOL:%.*]] = and <3 x i1> [[X:%.*]], [[Y:%.*]] 135; CHECK-NEXT: [[R:%.*]] = zext <3 x i1> [[MULBOOL]] to <3 x i7> 136; CHECK-NEXT: ret <3 x i7> [[R]] 137; 138 %zx = zext <3 x i1> %x to <3 x i7> 139 %zy = zext <3 x i1> %y to <3 x i7> 140 %r = mul <3 x i7> %zx, %zy 141 ret <3 x i7> %r 142} 143 144define i32 @mul_bools_use1(i1 %x, i1 %y) { 145; CHECK-LABEL: @mul_bools_use1( 146; CHECK-NEXT: [[ZY:%.*]] = zext i1 [[Y:%.*]] to i32 147; CHECK-NEXT: call void @use32(i32 [[ZY]]) 148; CHECK-NEXT: [[MULBOOL:%.*]] = and i1 [[X:%.*]], [[Y]] 149; CHECK-NEXT: [[R:%.*]] = zext i1 [[MULBOOL]] to i32 150; CHECK-NEXT: ret i32 [[R]] 151; 152 %zx = zext i1 %x to i32 153 %zy = zext i1 %y to i32 154 call void @use32(i32 %zy) 155 %r = mul i32 %zx, %zy 156 ret i32 %r 157} 158 159define i32 @mul_bools_use2(i1 %x, i1 %y) { 160; CHECK-LABEL: @mul_bools_use2( 161; CHECK-NEXT: [[ZY:%.*]] = zext i1 [[Y:%.*]] to i32 162; CHECK-NEXT: call void @use32(i32 [[ZY]]) 163; CHECK-NEXT: [[MULBOOL:%.*]] = and i1 [[Y]], [[X:%.*]] 164; CHECK-NEXT: [[R:%.*]] = zext i1 [[MULBOOL]] to i32 165; CHECK-NEXT: ret i32 [[R]] 166; 167 %zx = zext i1 %x to i32 168 %zy = zext i1 %y to i32 169 call void @use32(i32 %zy) 170 %r = mul i32 %zy, %zx 171 ret i32 %r 172} 173 174define i32 @mul_bools_use3(i1 %x, i1 %y) { 175; CHECK-LABEL: @mul_bools_use3( 176; CHECK-NEXT: [[ZX:%.*]] = zext i1 [[X:%.*]] to i32 177; CHECK-NEXT: call void @use32(i32 [[ZX]]) 178; CHECK-NEXT: [[ZY:%.*]] = zext i1 [[Y:%.*]] to i32 179; CHECK-NEXT: call void @use32(i32 [[ZY]]) 180; CHECK-NEXT: [[R:%.*]] = select i1 [[X]], i32 [[ZY]], i32 0 181; CHECK-NEXT: ret i32 [[R]] 182; 183 %zx = zext i1 %x to i32 184 call void @use32(i32 %zx) 185 %zy = zext i1 %y to i32 186 call void @use32(i32 %zy) 187 %r = mul i32 %zx, %zy 188 ret i32 %r 189} 190 191define <3 x i32> @mul_bools_sext(<3 x i1> %x, <3 x i1> %y) { 192; CHECK-LABEL: @mul_bools_sext( 193; CHECK-NEXT: [[MULBOOL:%.*]] = and <3 x i1> [[X:%.*]], [[Y:%.*]] 194; CHECK-NEXT: [[R:%.*]] = zext <3 x i1> [[MULBOOL]] to <3 x i32> 195; CHECK-NEXT: ret <3 x i32> [[R]] 196; 197 %sx = sext <3 x i1> %x to <3 x i32> 198 %sy = sext <3 x i1> %y to <3 x i32> 199 %r = mul <3 x i32> %sx, %sy 200 ret <3 x i32> %r 201} 202 203define i32 @mul_bools_sext_use1(i1 %x, i1 %y) { 204; CHECK-LABEL: @mul_bools_sext_use1( 205; CHECK-NEXT: [[SY:%.*]] = sext i1 [[Y:%.*]] to i32 206; CHECK-NEXT: call void @use32(i32 [[SY]]) 207; CHECK-NEXT: [[MULBOOL:%.*]] = and i1 [[X:%.*]], [[Y]] 208; CHECK-NEXT: [[R:%.*]] = zext i1 [[MULBOOL]] to i32 209; CHECK-NEXT: ret i32 [[R]] 210; 211 %sx = sext i1 %x to i32 212 %sy = sext i1 %y to i32 213 call void @use32(i32 %sy) 214 %r = mul i32 %sx, %sy 215 ret i32 %r 216} 217 218define i32 @mul_bools_sext_use2(i1 %x, i1 %y) { 219; CHECK-LABEL: @mul_bools_sext_use2( 220; CHECK-NEXT: [[SY:%.*]] = sext i1 [[Y:%.*]] to i32 221; CHECK-NEXT: call void @use32(i32 [[SY]]) 222; CHECK-NEXT: [[MULBOOL:%.*]] = and i1 [[Y]], [[X:%.*]] 223; CHECK-NEXT: [[R:%.*]] = zext i1 [[MULBOOL]] to i32 224; CHECK-NEXT: ret i32 [[R]] 225; 226 %sx = sext i1 %x to i32 227 %sy = sext i1 %y to i32 228 call void @use32(i32 %sy) 229 %r = mul i32 %sy, %sx 230 ret i32 %r 231} 232 233define i32 @mul_bools_sext_use3(i1 %x, i1 %y) { 234; CHECK-LABEL: @mul_bools_sext_use3( 235; CHECK-NEXT: [[SX:%.*]] = sext i1 [[X:%.*]] to i32 236; CHECK-NEXT: call void @use32(i32 [[SX]]) 237; CHECK-NEXT: [[SY:%.*]] = sext i1 [[Y:%.*]] to i32 238; CHECK-NEXT: call void @use32(i32 [[SY]]) 239; CHECK-NEXT: [[R:%.*]] = mul nsw i32 [[SY]], [[SX]] 240; CHECK-NEXT: ret i32 [[R]] 241; 242 %sx = sext i1 %x to i32 243 call void @use32(i32 %sx) 244 %sy = sext i1 %y to i32 245 call void @use32(i32 %sy) 246 %r = mul i32 %sy, %sx 247 ret i32 %r 248} 249 250define <3 x i32> @mul_bools_mixed_ext(<3 x i1> %x, <3 x i1> %y) { 251; CHECK-LABEL: @mul_bools_mixed_ext( 252; CHECK-NEXT: [[MULBOOL:%.*]] = and <3 x i1> [[X:%.*]], [[Y:%.*]] 253; CHECK-NEXT: [[R:%.*]] = sext <3 x i1> [[MULBOOL]] to <3 x i32> 254; CHECK-NEXT: ret <3 x i32> [[R]] 255; 256 %zx = zext <3 x i1> %x to <3 x i32> 257 %sy = sext <3 x i1> %y to <3 x i32> 258 %r = mul <3 x i32> %zx, %sy 259 ret <3 x i32> %r 260} 261 262define i32 @mul_bools_mixed_ext_use1(i1 %x, i1 %y) { 263; CHECK-LABEL: @mul_bools_mixed_ext_use1( 264; CHECK-NEXT: [[ZY:%.*]] = zext i1 [[Y:%.*]] to i32 265; CHECK-NEXT: call void @use32(i32 [[ZY]]) 266; CHECK-NEXT: [[MULBOOL:%.*]] = and i1 [[X:%.*]], [[Y]] 267; CHECK-NEXT: [[R:%.*]] = sext i1 [[MULBOOL]] to i32 268; CHECK-NEXT: ret i32 [[R]] 269; 270 %sx = sext i1 %x to i32 271 %zy = zext i1 %y to i32 272 call void @use32(i32 %zy) 273 %r = mul i32 %sx, %zy 274 ret i32 %r 275} 276 277define i32 @mul_bools_mixed_ext_use2(i1 %x, i1 %y) { 278; CHECK-LABEL: @mul_bools_mixed_ext_use2( 279; CHECK-NEXT: [[SY:%.*]] = sext i1 [[Y:%.*]] to i32 280; CHECK-NEXT: call void @use32(i32 [[SY]]) 281; CHECK-NEXT: [[MULBOOL:%.*]] = and i1 [[Y]], [[X:%.*]] 282; CHECK-NEXT: [[R:%.*]] = sext i1 [[MULBOOL]] to i32 283; CHECK-NEXT: ret i32 [[R]] 284; 285 %zx = zext i1 %x to i32 286 %sy = sext i1 %y to i32 287 call void @use32(i32 %sy) 288 %r = mul i32 %sy, %zx 289 ret i32 %r 290} 291 292define i32 @mul_bools_mixed_ext_use3(i1 %x, i1 %y) { 293; CHECK-LABEL: @mul_bools_mixed_ext_use3( 294; CHECK-NEXT: [[SX:%.*]] = sext i1 [[X:%.*]] to i32 295; CHECK-NEXT: call void @use32(i32 [[SX]]) 296; CHECK-NEXT: [[ZY:%.*]] = zext i1 [[Y:%.*]] to i32 297; CHECK-NEXT: call void @use32(i32 [[ZY]]) 298; CHECK-NEXT: [[R:%.*]] = select i1 [[Y]], i32 [[SX]], i32 0 299; CHECK-NEXT: ret i32 [[R]] 300; 301 %sx = sext i1 %x to i32 302 call void @use32(i32 %sx) 303 %zy = zext i1 %y to i32 304 call void @use32(i32 %zy) 305 %r = mul i32 %zy, %sx 306 ret i32 %r 307} 308 309; (A >>u 31) * B --> (A >>s 31) & B 310 311define i32 @signbit_mul(i32 %a, i32 %b) { 312; CHECK-LABEL: @signbit_mul( 313; CHECK-NEXT: [[TMP1:%.*]] = ashr i32 [[A:%.*]], 31 314; CHECK-NEXT: [[E:%.*]] = and i32 [[TMP1]], [[B:%.*]] 315; CHECK-NEXT: ret i32 [[E]] 316; 317 %d = lshr i32 %a, 31 318 %e = mul i32 %d, %b 319 ret i32 %e 320} 321 322define i32 @signbit_mul_commute_extra_use(i32 %a, i32 %b) { 323; CHECK-LABEL: @signbit_mul_commute_extra_use( 324; CHECK-NEXT: [[D:%.*]] = lshr i32 [[A:%.*]], 31 325; CHECK-NEXT: [[TMP1:%.*]] = ashr i32 [[A]], 31 326; CHECK-NEXT: [[E:%.*]] = and i32 [[TMP1]], [[B:%.*]] 327; CHECK-NEXT: call void @use32(i32 [[D]]) 328; CHECK-NEXT: ret i32 [[E]] 329; 330 %d = lshr i32 %a, 31 331 %e = mul i32 %b, %d 332 call void @use32(i32 %d) 333 ret i32 %e 334} 335 336; (A >>u 31)) * B --> (A >>s 31) & B 337 338define <2 x i32> @signbit_mul_vec(<2 x i32> %a, <2 x i32> %b) { 339; CHECK-LABEL: @signbit_mul_vec( 340; CHECK-NEXT: [[TMP1:%.*]] = ashr <2 x i32> [[A:%.*]], <i32 31, i32 31> 341; CHECK-NEXT: [[E:%.*]] = and <2 x i32> [[TMP1]], [[B:%.*]] 342; CHECK-NEXT: ret <2 x i32> [[E]] 343; 344 %d = lshr <2 x i32> %a, <i32 31, i32 31> 345 %e = mul <2 x i32> %d, %b 346 ret <2 x i32> %e 347} 348 349define <2 x i32> @signbit_mul_vec_commute(<2 x i32> %a, <2 x i32> %b) { 350; CHECK-LABEL: @signbit_mul_vec_commute( 351; CHECK-NEXT: [[TMP1:%.*]] = ashr <2 x i32> [[A:%.*]], <i32 31, i32 31> 352; CHECK-NEXT: [[E:%.*]] = and <2 x i32> [[TMP1]], [[B:%.*]] 353; CHECK-NEXT: ret <2 x i32> [[E]] 354; 355 %d = lshr <2 x i32> %a, <i32 31, i32 31> 356 %e = mul <2 x i32> %b, %d 357 ret <2 x i32> %e 358} 359 360define i32 @test18(i32 %A, i32 %B) { 361; CHECK-LABEL: @test18( 362; CHECK-NEXT: ret i32 0 363; 364 %C = and i32 %A, 1 365 %D = and i32 %B, 1 366 %E = mul i32 %C, %D 367 %F = and i32 %E, 16 368 ret i32 %F 369} 370 371declare {i32, i1} @llvm.smul.with.overflow.i32(i32, i32) 372declare void @use(i1) 373 374define i32 @test19(i32 %A, i32 %B) { 375; CHECK-LABEL: @test19( 376; CHECK-NEXT: call void @use(i1 false) 377; CHECK-NEXT: ret i32 0 378; 379 %C = and i32 %A, 1 380 %D = and i32 %B, 1 381 382; It would be nice if we also started proving that this doesn't overflow. 383 %E = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %C, i32 %D) 384 %F = extractvalue {i32, i1} %E, 0 385 %G = extractvalue {i32, i1} %E, 1 386 call void @use(i1 %G) 387 %H = and i32 %F, 16 388 ret i32 %H 389} 390 391define <2 x i64> @test20(<2 x i64> %A) { 392; CHECK-LABEL: @test20( 393; CHECK-NEXT: [[TMP1:%.*]] = mul <2 x i64> [[A:%.*]], <i64 3, i64 2> 394; CHECK-NEXT: [[C:%.*]] = add <2 x i64> [[TMP1]], <i64 36, i64 28> 395; CHECK-NEXT: ret <2 x i64> [[C]] 396; 397 %B = add <2 x i64> %A, <i64 12, i64 14> 398 %C = mul <2 x i64> %B, <i64 3, i64 2> 399 ret <2 x i64> %C 400} 401 402define <2 x i1> @test21(<2 x i1> %A, <2 x i1> %B) { 403; CHECK-LABEL: @test21( 404; CHECK-NEXT: [[C:%.*]] = and <2 x i1> [[A:%.*]], [[B:%.*]] 405; CHECK-NEXT: ret <2 x i1> [[C]] 406; 407 %C = mul <2 x i1> %A, %B 408 ret <2 x i1> %C 409} 410 411define i32 @test22(i32 %A) { 412; CHECK-LABEL: @test22( 413; CHECK-NEXT: [[B:%.*]] = sub nsw i32 0, [[A:%.*]] 414; CHECK-NEXT: ret i32 [[B]] 415; 416 %B = mul nsw i32 %A, -1 417 ret i32 %B 418} 419 420define i32 @test23(i32 %A) { 421; CHECK-LABEL: @test23( 422; CHECK-NEXT: [[C:%.*]] = mul nuw i32 [[A:%.*]], 6 423; CHECK-NEXT: ret i32 [[C]] 424; 425 %B = shl nuw i32 %A, 1 426 %C = mul nuw i32 %B, 3 427 ret i32 %C 428} 429 430define i32 @test24(i32 %A) { 431; CHECK-LABEL: @test24( 432; CHECK-NEXT: [[C:%.*]] = mul nsw i32 [[A:%.*]], 6 433; CHECK-NEXT: ret i32 [[C]] 434; 435 %B = shl nsw i32 %A, 1 436 %C = mul nsw i32 %B, 3 437 ret i32 %C 438} 439 440define i32 @neg_neg_mul(i32 %A, i32 %B) { 441; CHECK-LABEL: @neg_neg_mul( 442; CHECK-NEXT: [[E:%.*]] = mul i32 [[A:%.*]], [[B:%.*]] 443; CHECK-NEXT: ret i32 [[E]] 444; 445 %C = sub i32 0, %A 446 %D = sub i32 0, %B 447 %E = mul i32 %C, %D 448 ret i32 %E 449} 450 451define i32 @neg_neg_mul_nsw(i32 %A, i32 %B) { 452; CHECK-LABEL: @neg_neg_mul_nsw( 453; CHECK-NEXT: [[E:%.*]] = mul nsw i32 [[A:%.*]], [[B:%.*]] 454; CHECK-NEXT: ret i32 [[E]] 455; 456 %C = sub nsw i32 0, %A 457 %D = sub nsw i32 0, %B 458 %E = mul nsw i32 %C, %D 459 ret i32 %E 460} 461 462define i124 @neg_neg_mul_apint(i124 %A, i124 %B) { 463; CHECK-LABEL: @neg_neg_mul_apint( 464; CHECK-NEXT: [[E:%.*]] = mul i124 [[A:%.*]], [[B:%.*]] 465; CHECK-NEXT: ret i124 [[E]] 466; 467 %C = sub i124 0, %A 468 %D = sub i124 0, %B 469 %E = mul i124 %C, %D 470 ret i124 %E 471} 472 473define i32 @neg_mul_constant(i32 %A) { 474; CHECK-LABEL: @neg_mul_constant( 475; CHECK-NEXT: [[E:%.*]] = mul i32 [[A:%.*]], -7 476; CHECK-NEXT: ret i32 [[E]] 477; 478 %C = sub i32 0, %A 479 %E = mul i32 %C, 7 480 ret i32 %E 481} 482 483define i55 @neg_mul_constant_apint(i55 %A) { 484; CHECK-LABEL: @neg_mul_constant_apint( 485; CHECK-NEXT: [[E:%.*]] = mul i55 [[A:%.*]], -7 486; CHECK-NEXT: ret i55 [[E]] 487; 488 %C = sub i55 0, %A 489 %E = mul i55 %C, 7 490 ret i55 %E 491} 492 493define <3 x i8> @neg_mul_constant_vec(<3 x i8> %a) { 494; CHECK-LABEL: @neg_mul_constant_vec( 495; CHECK-NEXT: [[B:%.*]] = mul <3 x i8> [[A:%.*]], <i8 -5, i8 -5, i8 -5> 496; CHECK-NEXT: ret <3 x i8> [[B]] 497; 498 %A = sub <3 x i8> zeroinitializer, %a 499 %B = mul <3 x i8> %A, <i8 5, i8 5, i8 5> 500 ret <3 x i8> %B 501} 502 503define <3 x i4> @neg_mul_constant_vec_weird(<3 x i4> %a) { 504; CHECK-LABEL: @neg_mul_constant_vec_weird( 505; CHECK-NEXT: [[B:%.*]] = mul <3 x i4> [[A:%.*]], <i4 -5, i4 -5, i4 -5> 506; CHECK-NEXT: ret <3 x i4> [[B]] 507; 508 %A = sub <3 x i4> zeroinitializer, %a 509 %B = mul <3 x i4> %A, <i4 5, i4 5, i4 5> 510 ret <3 x i4> %B 511} 512 513define i32 @test26(i32 %A, i32 %B) { 514; CHECK-LABEL: @test26( 515; CHECK-NEXT: [[D:%.*]] = shl nsw i32 [[A:%.*]], [[B:%.*]] 516; CHECK-NEXT: ret i32 [[D]] 517; 518 %C = shl nsw i32 1, %B 519 %D = mul nsw i32 %A, %C 520 ret i32 %D 521} 522 523define i32 @test27(i32 %A, i32 %B) { 524; CHECK-LABEL: @test27( 525; CHECK-NEXT: [[D:%.*]] = shl nuw i32 [[A:%.*]], [[B:%.*]] 526; CHECK-NEXT: ret i32 [[D]] 527; 528 %C = shl i32 1, %B 529 %D = mul nuw i32 %A, %C 530 ret i32 %D 531} 532 533define i32 @test28(i32 %A) { 534; CHECK-LABEL: @test28( 535; CHECK-NEXT: [[B:%.*]] = shl i32 1, [[A:%.*]] 536; CHECK-NEXT: [[C:%.*]] = shl i32 [[B]], [[A]] 537; CHECK-NEXT: ret i32 [[C]] 538; 539 %B = shl i32 1, %A 540 %C = mul nsw i32 %B, %B 541 ret i32 %C 542} 543 544define i64 @test29(i31 %A, i31 %B) { 545; CHECK-LABEL: @test29( 546; CHECK-NEXT: [[C:%.*]] = sext i31 [[A:%.*]] to i64 547; CHECK-NEXT: [[D:%.*]] = sext i31 [[B:%.*]] to i64 548; CHECK-NEXT: [[E:%.*]] = mul nsw i64 [[C]], [[D]] 549; CHECK-NEXT: ret i64 [[E]] 550; 551 %C = sext i31 %A to i64 552 %D = sext i31 %B to i64 553 %E = mul i64 %C, %D 554 ret i64 %E 555} 556 557define i64 @test30(i32 %A, i32 %B) { 558; CHECK-LABEL: @test30( 559; CHECK-NEXT: [[C:%.*]] = zext i32 [[A:%.*]] to i64 560; CHECK-NEXT: [[D:%.*]] = zext i32 [[B:%.*]] to i64 561; CHECK-NEXT: [[E:%.*]] = mul nuw i64 [[C]], [[D]] 562; CHECK-NEXT: ret i64 [[E]] 563; 564 %C = zext i32 %A to i64 565 %D = zext i32 %B to i64 566 %E = mul i64 %C, %D 567 ret i64 %E 568} 569 570@PR22087 = external global i32 571define i32 @test31(i32 %V) { 572; CHECK-LABEL: @test31( 573; CHECK-NEXT: [[MUL:%.*]] = shl i32 [[V:%.*]], zext (i1 icmp ne (i32* inttoptr (i64 1 to i32*), i32* @PR22087) to i32) 574; CHECK-NEXT: ret i32 [[MUL]] 575; 576 %mul = mul i32 %V, shl (i32 1, i32 zext (i1 icmp ne (i32* inttoptr (i64 1 to i32*), i32* @PR22087) to i32)) 577 ret i32 %mul 578} 579 580define i32 @test32(i32 %X) { 581; CHECK-LABEL: @test32( 582; CHECK-NEXT: [[MUL:%.*]] = shl i32 [[X:%.*]], 31 583; CHECK-NEXT: ret i32 [[MUL]] 584; 585 %mul = mul nsw i32 %X, -2147483648 586 ret i32 %mul 587} 588 589define <2 x i32> @test32vec(<2 x i32> %X) { 590; CHECK-LABEL: @test32vec( 591; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[X:%.*]], <i32 31, i32 31> 592; CHECK-NEXT: ret <2 x i32> [[MUL]] 593; 594 %mul = mul nsw <2 x i32> %X, <i32 -2147483648, i32 -2147483648> 595 ret <2 x i32> %mul 596} 597 598define i32 @test33(i32 %X) { 599; CHECK-LABEL: @test33( 600; CHECK-NEXT: [[MUL:%.*]] = shl nsw i32 [[X:%.*]], 30 601; CHECK-NEXT: ret i32 [[MUL]] 602; 603 %mul = mul nsw i32 %X, 1073741824 604 ret i32 %mul 605} 606 607define <2 x i32> @test33vec(<2 x i32> %X) { 608; CHECK-LABEL: @test33vec( 609; CHECK-NEXT: [[MUL:%.*]] = shl nsw <2 x i32> [[X:%.*]], <i32 30, i32 30> 610; CHECK-NEXT: ret <2 x i32> [[MUL]] 611; 612 %mul = mul nsw <2 x i32> %X, <i32 1073741824, i32 1073741824> 613 ret <2 x i32> %mul 614} 615 616define i128 @test34(i128 %X) { 617; CHECK-LABEL: @test34( 618; CHECK-NEXT: [[MUL:%.*]] = shl nsw i128 [[X:%.*]], 1 619; CHECK-NEXT: ret i128 [[MUL]] 620; 621 %mul = mul nsw i128 %X, 2 622 ret i128 %mul 623} 624 625define i32 @test_mul_canonicalize_op0(i32 %x, i32 %y) { 626; CHECK-LABEL: @test_mul_canonicalize_op0( 627; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[X:%.*]], [[Y:%.*]] 628; CHECK-NEXT: [[MUL:%.*]] = sub i32 0, [[TMP1]] 629; CHECK-NEXT: ret i32 [[MUL]] 630; 631 %neg = sub i32 0, %x 632 %mul = mul i32 %neg, %y 633 ret i32 %mul 634} 635 636define i32 @test_mul_canonicalize_op1(i32 %x, i32 %z) { 637; CHECK-LABEL: @test_mul_canonicalize_op1( 638; CHECK-NEXT: [[Y_NEG:%.*]] = mul i32 [[Z:%.*]], -3 639; CHECK-NEXT: [[DOTNEG:%.*]] = mul i32 [[Y_NEG]], [[X:%.*]] 640; CHECK-NEXT: ret i32 [[DOTNEG]] 641; 642 %y = mul i32 %z, 3 643 %neg = sub i32 0, %x 644 %mul = mul i32 %y, %neg 645 ret i32 %mul 646} 647 648define i32 @test_mul_canonicalize_nsw(i32 %x, i32 %y) { 649; CHECK-LABEL: @test_mul_canonicalize_nsw( 650; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[X:%.*]], [[Y:%.*]] 651; CHECK-NEXT: [[MUL:%.*]] = sub i32 0, [[TMP1]] 652; CHECK-NEXT: ret i32 [[MUL]] 653; 654 %neg = sub nsw i32 0, %x 655 %mul = mul nsw i32 %neg, %y 656 ret i32 %mul 657} 658 659define <2 x i32> @test_mul_canonicalize_vec(<2 x i32> %x, <2 x i32> %y) { 660; CHECK-LABEL: @test_mul_canonicalize_vec( 661; CHECK-NEXT: [[TMP1:%.*]] = mul <2 x i32> [[X:%.*]], [[Y:%.*]] 662; CHECK-NEXT: [[MUL:%.*]] = sub <2 x i32> zeroinitializer, [[TMP1]] 663; CHECK-NEXT: ret <2 x i32> [[MUL]] 664; 665 %neg = sub <2 x i32> <i32 0, i32 0>, %x 666 %mul = mul <2 x i32> %neg, %y 667 ret <2 x i32> %mul 668} 669 670define i32 @test_mul_canonicalize_multiple_uses(i32 %x, i32 %y) { 671; CHECK-LABEL: @test_mul_canonicalize_multiple_uses( 672; CHECK-NEXT: [[NEG:%.*]] = sub i32 0, [[X:%.*]] 673; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[NEG]], [[Y:%.*]] 674; CHECK-NEXT: [[MUL2:%.*]] = mul i32 [[MUL]], [[NEG]] 675; CHECK-NEXT: ret i32 [[MUL2]] 676; 677 %neg = sub i32 0, %x 678 %mul = mul i32 %neg, %y 679 %mul2 = mul i32 %mul, %neg 680 ret i32 %mul2 681} 682 683@X = global i32 5 684 685define i64 @test_mul_canonicalize_neg_is_not_undone(i64 %L1) { 686; Check we do not undo the canonicalization of 0 - (X * Y), if Y is a constant 687; expr. 688; CHECK-LABEL: @test_mul_canonicalize_neg_is_not_undone( 689; CHECK-NEXT: [[TMP1:%.*]] = mul i64 [[L1:%.*]], ptrtoint (i32* @X to i64) 690; CHECK-NEXT: [[B4:%.*]] = sub i64 0, [[TMP1]] 691; CHECK-NEXT: ret i64 [[B4]] 692; 693 %v1 = ptrtoint i32* @X to i64 694 %B8 = sub i64 0, %v1 695 %B4 = mul i64 %B8, %L1 696 ret i64 %B4 697} 698 699define i32 @negate_if_true(i32 %x, i1 %cond) { 700; CHECK-LABEL: @negate_if_true( 701; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[X:%.*]] 702; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[COND:%.*]], i32 [[TMP1]], i32 [[X]] 703; CHECK-NEXT: ret i32 [[TMP2]] 704; 705 %sel = select i1 %cond, i32 -1, i32 1 706 %r = mul i32 %sel, %x 707 ret i32 %r 708} 709 710define i32 @negate_if_false(i32 %x, i1 %cond) { 711; CHECK-LABEL: @negate_if_false( 712; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[X:%.*]] 713; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[COND:%.*]], i32 [[X]], i32 [[TMP1]] 714; CHECK-NEXT: ret i32 [[TMP2]] 715; 716 %sel = select i1 %cond, i32 1, i32 -1 717 %r = mul i32 %sel, %x 718 ret i32 %r 719} 720 721define <2 x i8> @negate_if_true_commute(<2 x i8> %px, i1 %cond) { 722; CHECK-LABEL: @negate_if_true_commute( 723; CHECK-NEXT: [[X:%.*]] = sdiv <2 x i8> <i8 42, i8 42>, [[PX:%.*]] 724; CHECK-NEXT: [[TMP1:%.*]] = sub nsw <2 x i8> zeroinitializer, [[X]] 725; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[COND:%.*]], <2 x i8> [[TMP1]], <2 x i8> [[X]] 726; CHECK-NEXT: ret <2 x i8> [[TMP2]] 727; 728 %x = sdiv <2 x i8> <i8 42, i8 42>, %px ; thwart complexity-based canonicalization 729 %sel = select i1 %cond, <2 x i8> <i8 -1, i8 -1>, <2 x i8> <i8 1, i8 1> 730 %r = mul <2 x i8> %x, %sel 731 ret <2 x i8> %r 732} 733 734define <2 x i8> @negate_if_false_commute(<2 x i8> %px, <2 x i1> %cond) { 735; CHECK-LABEL: @negate_if_false_commute( 736; CHECK-NEXT: [[X:%.*]] = sdiv <2 x i8> <i8 42, i8 5>, [[PX:%.*]] 737; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i8> zeroinitializer, [[X]] 738; CHECK-NEXT: [[TMP2:%.*]] = select <2 x i1> [[COND:%.*]], <2 x i8> [[X]], <2 x i8> [[TMP1]] 739; CHECK-NEXT: ret <2 x i8> [[TMP2]] 740; 741 %x = sdiv <2 x i8> <i8 42, i8 5>, %px ; thwart complexity-based canonicalization 742 %sel = select <2 x i1> %cond, <2 x i8> <i8 1, i8 undef>, <2 x i8> <i8 -1, i8 -1> 743 %r = mul <2 x i8> %x, %sel 744 ret <2 x i8> %r 745} 746 747; Negative test 748 749define i32 @negate_if_true_extra_use(i32 %x, i1 %cond) { 750; CHECK-LABEL: @negate_if_true_extra_use( 751; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], i32 -1, i32 1 752; CHECK-NEXT: call void @use32(i32 [[SEL]]) 753; CHECK-NEXT: [[R:%.*]] = mul i32 [[SEL]], [[X:%.*]] 754; CHECK-NEXT: ret i32 [[R]] 755; 756 %sel = select i1 %cond, i32 -1, i32 1 757 call void @use32(i32 %sel) 758 %r = mul i32 %sel, %x 759 ret i32 %r 760} 761 762; Negative test 763 764define <2 x i8> @negate_if_true_wrong_constant(<2 x i8> %px, i1 %cond) { 765; CHECK-LABEL: @negate_if_true_wrong_constant( 766; CHECK-NEXT: [[X:%.*]] = sdiv <2 x i8> <i8 42, i8 42>, [[PX:%.*]] 767; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], <2 x i8> <i8 -1, i8 0>, <2 x i8> <i8 1, i8 1> 768; CHECK-NEXT: [[R:%.*]] = mul <2 x i8> [[X]], [[SEL]] 769; CHECK-NEXT: ret <2 x i8> [[R]] 770; 771 %x = sdiv <2 x i8> <i8 42, i8 42>, %px ; thwart complexity-based canonicalization 772 %sel = select i1 %cond, <2 x i8> <i8 -1, i8 0>, <2 x i8> <i8 1, i8 1> 773 %r = mul <2 x i8> %x, %sel 774 ret <2 x i8> %r 775} 776 777; (C ? (X /exact Y) : 1) * Y -> C ? X : Y 778define i32 @mul_div_select(i32 %x, i32 %y, i1 %c) { 779; CHECK-LABEL: @mul_div_select( 780; CHECK-NEXT: [[MUL:%.*]] = select i1 [[C:%.*]], i32 [[X:%.*]], i32 [[Y:%.*]] 781; CHECK-NEXT: ret i32 [[MUL]] 782; 783 %div = udiv exact i32 %x, %y 784 %sel = select i1 %c, i32 %div, i32 1 785 %mul = mul i32 %sel, %y 786 ret i32 %mul 787} 788 789; fold mul(abs(x),abs(x)) -> mul(x,x) 790define i31 @combine_mul_abs_i31(i31 %0) { 791; CHECK-LABEL: @combine_mul_abs_i31( 792; CHECK-NEXT: [[M:%.*]] = mul i31 [[TMP0:%.*]], [[TMP0]] 793; CHECK-NEXT: ret i31 [[M]] 794; 795 %c = icmp slt i31 %0, 0 796 %s = sub nsw i31 0, %0 797 %r = select i1 %c, i31 %s, i31 %0 798 %m = mul i31 %r, %r 799 ret i31 %m 800} 801 802define i32 @combine_mul_abs_i32(i32 %0) { 803; CHECK-LABEL: @combine_mul_abs_i32( 804; CHECK-NEXT: [[M:%.*]] = mul i32 [[TMP0:%.*]], [[TMP0]] 805; CHECK-NEXT: ret i32 [[M]] 806; 807 %c = icmp slt i32 %0, 0 808 %s = sub nsw i32 0, %0 809 %r = select i1 %c, i32 %s, i32 %0 810 %m = mul i32 %r, %r 811 ret i32 %m 812} 813 814define <4 x i32> @combine_mul_abs_v4i32(<4 x i32> %0) { 815; CHECK-LABEL: @combine_mul_abs_v4i32( 816; CHECK-NEXT: [[M:%.*]] = mul <4 x i32> [[TMP0:%.*]], [[TMP0]] 817; CHECK-NEXT: ret <4 x i32> [[M]] 818; 819 %c = icmp slt <4 x i32> %0, zeroinitializer 820 %s = sub nsw <4 x i32> zeroinitializer, %0 821 %r = select <4 x i1> %c, <4 x i32> %s, <4 x i32> %0 822 %m = mul <4 x i32> %r, %r 823 ret <4 x i32> %m 824} 825 826; fold mul(nabs(x),nabs(x)) -> mul(x,x) 827define i31 @combine_mul_nabs_i31(i31 %0) { 828; CHECK-LABEL: @combine_mul_nabs_i31( 829; CHECK-NEXT: [[M:%.*]] = mul i31 [[TMP0:%.*]], [[TMP0]] 830; CHECK-NEXT: ret i31 [[M]] 831; 832 %c = icmp slt i31 %0, 0 833 %s = sub nsw i31 0, %0 834 %r = select i1 %c, i31 %0, i31 %s 835 %m = mul i31 %r, %r 836 ret i31 %m 837} 838 839define i32 @combine_mul_nabs_i32(i32 %0) { 840; CHECK-LABEL: @combine_mul_nabs_i32( 841; CHECK-NEXT: [[M:%.*]] = mul i32 [[TMP0:%.*]], [[TMP0]] 842; CHECK-NEXT: ret i32 [[M]] 843; 844 %c = icmp slt i32 %0, 0 845 %s = sub nsw i32 0, %0 846 %r = select i1 %c, i32 %0, i32 %s 847 %m = mul i32 %r, %r 848 ret i32 %m 849} 850 851define <4 x i32> @combine_mul_nabs_v4i32(<4 x i32> %0) { 852; CHECK-LABEL: @combine_mul_nabs_v4i32( 853; CHECK-NEXT: [[M:%.*]] = mul <4 x i32> [[TMP0:%.*]], [[TMP0]] 854; CHECK-NEXT: ret <4 x i32> [[M]] 855; 856 %c = icmp slt <4 x i32> %0, zeroinitializer 857 %s = sub nsw <4 x i32> zeroinitializer, %0 858 %r = select <4 x i1> %c, <4 x i32> %0, <4 x i32> %s 859 %m = mul <4 x i32> %r, %r 860 ret <4 x i32> %m 861} 862 863define i32 @combine_mul_abs_intrin(i32 %x) { 864; CHECK-LABEL: @combine_mul_abs_intrin( 865; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[X:%.*]], [[X]] 866; CHECK-NEXT: ret i32 [[MUL]] 867; 868 %abs = call i32 @llvm.abs.i32(i32 %x, i1 false) 869 %mul = mul i32 %abs, %abs 870 ret i32 %mul 871} 872 873define i32 @combine_mul_nabs_intrin(i32 %x) { 874; CHECK-LABEL: @combine_mul_nabs_intrin( 875; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[X:%.*]], [[X]] 876; CHECK-NEXT: ret i32 [[MUL]] 877; 878 %abs = call i32 @llvm.abs.i32(i32 %x, i1 false) 879 %neg = sub i32 0, %abs 880 %mul = mul i32 %neg, %neg 881 ret i32 %mul 882} 883 884; z * splat(0) = splat(0), even for scalable vectors 885define <vscale x 2 x i64> @mul_scalable_splat_zero(<vscale x 2 x i64> %z) { 886; CHECK-LABEL: @mul_scalable_splat_zero( 887; CHECK-NEXT: ret <vscale x 2 x i64> zeroinitializer 888; 889 %shuf = shufflevector <vscale x 2 x i64> insertelement (<vscale x 2 x i64> undef, i64 0, i32 0), <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer 890 %t3 = mul <vscale x 2 x i64> %shuf, %z 891 ret <vscale x 2 x i64> %t3 892} 893 894; 895; fold mul(sub(x,y),negpow2) -> shl(sub(y,x),log2(pow2)) 896; 897 898define i32 @mulsub1(i32 %a0, i32 %a1) { 899; CHECK-LABEL: @mulsub1( 900; CHECK-NEXT: [[SUB_NEG:%.*]] = sub i32 [[A0:%.*]], [[A1:%.*]] 901; CHECK-NEXT: [[MUL:%.*]] = shl i32 [[SUB_NEG]], 2 902; CHECK-NEXT: ret i32 [[MUL]] 903; 904 %sub = sub i32 %a1, %a0 905 %mul = mul i32 %sub, -4 906 ret i32 %mul 907} 908 909define <2 x i32> @mulsub1_vec(<2 x i32> %a0, <2 x i32> %a1) { 910; CHECK-LABEL: @mulsub1_vec( 911; CHECK-NEXT: [[SUB_NEG:%.*]] = sub <2 x i32> [[A0:%.*]], [[A1:%.*]] 912; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 2> 913; CHECK-NEXT: ret <2 x i32> [[MUL]] 914; 915 %sub = sub <2 x i32> %a1, %a0 916 %mul = mul <2 x i32> %sub, <i32 -4, i32 -4> 917 ret <2 x i32> %mul 918} 919 920define <2 x i32> @mulsub1_vec_nonuniform(<2 x i32> %a0, <2 x i32> %a1) { 921; CHECK-LABEL: @mulsub1_vec_nonuniform( 922; CHECK-NEXT: [[SUB_NEG:%.*]] = sub <2 x i32> [[A0:%.*]], [[A1:%.*]] 923; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 3> 924; CHECK-NEXT: ret <2 x i32> [[MUL]] 925; 926 %sub = sub <2 x i32> %a1, %a0 927 %mul = mul <2 x i32> %sub, <i32 -4, i32 -8> 928 ret <2 x i32> %mul 929} 930 931define <2 x i32> @mulsub1_vec_nonuniform_undef(<2 x i32> %a0, <2 x i32> %a1) { 932; CHECK-LABEL: @mulsub1_vec_nonuniform_undef( 933; CHECK-NEXT: [[SUB_NEG:%.*]] = sub <2 x i32> [[A0:%.*]], [[A1:%.*]] 934; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 0> 935; CHECK-NEXT: ret <2 x i32> [[MUL]] 936; 937 %sub = sub <2 x i32> %a1, %a0 938 %mul = mul <2 x i32> %sub, <i32 -4, i32 undef> 939 ret <2 x i32> %mul 940} 941 942define i32 @mulsub2(i32 %a0) { 943; CHECK-LABEL: @mulsub2( 944; CHECK-NEXT: [[SUB_NEG:%.*]] = shl i32 [[A0:%.*]], 2 945; CHECK-NEXT: [[MUL:%.*]] = add i32 [[SUB_NEG]], -64 946; CHECK-NEXT: ret i32 [[MUL]] 947; 948 %sub = sub i32 16, %a0 949 %mul = mul i32 %sub, -4 950 ret i32 %mul 951} 952 953define <2 x i32> @mulsub2_vec(<2 x i32> %a0) { 954; CHECK-LABEL: @mulsub2_vec( 955; CHECK-NEXT: [[SUB_NEG:%.*]] = shl <2 x i32> [[A0:%.*]], <i32 2, i32 2> 956; CHECK-NEXT: [[MUL:%.*]] = add <2 x i32> [[SUB_NEG]], <i32 -64, i32 -64> 957; CHECK-NEXT: ret <2 x i32> [[MUL]] 958; 959 %sub = sub <2 x i32> <i32 16, i32 16>, %a0 960 %mul = mul <2 x i32> %sub, <i32 -4, i32 -4> 961 ret <2 x i32> %mul 962} 963 964define <2 x i32> @mulsub2_vec_nonuniform(<2 x i32> %a0) { 965; CHECK-LABEL: @mulsub2_vec_nonuniform( 966; CHECK-NEXT: [[SUB_NEG:%.*]] = add <2 x i32> [[A0:%.*]], <i32 -16, i32 -32> 967; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 3> 968; CHECK-NEXT: ret <2 x i32> [[MUL]] 969; 970 %sub = sub <2 x i32> <i32 16, i32 32>, %a0 971 %mul = mul <2 x i32> %sub, <i32 -4, i32 -8> 972 ret <2 x i32> %mul 973} 974 975define <2 x i32> @mulsub2_vec_nonuniform_undef(<2 x i32> %a0) { 976; CHECK-LABEL: @mulsub2_vec_nonuniform_undef( 977; CHECK-NEXT: [[SUB_NEG:%.*]] = add <2 x i32> [[A0:%.*]], <i32 -16, i32 -32> 978; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 0> 979; CHECK-NEXT: ret <2 x i32> [[MUL]] 980; 981 %sub = sub <2 x i32> <i32 16, i32 32>, %a0 982 %mul = mul <2 x i32> %sub, <i32 -4, i32 undef> 983 ret <2 x i32> %mul 984} 985 986define i32 @muladd2(i32 %a0) { 987; CHECK-LABEL: @muladd2( 988; CHECK-NEXT: [[ADD_NEG_NEG:%.*]] = mul i32 [[A0:%.*]], -4 989; CHECK-NEXT: [[MUL:%.*]] = add i32 [[ADD_NEG_NEG]], -64 990; CHECK-NEXT: ret i32 [[MUL]] 991; 992 %add = add i32 %a0, 16 993 %mul = mul i32 %add, -4 994 ret i32 %mul 995} 996 997define <2 x i32> @muladd2_vec(<2 x i32> %a0) { 998; CHECK-LABEL: @muladd2_vec( 999; CHECK-NEXT: [[ADD_NEG_NEG:%.*]] = mul <2 x i32> [[A0:%.*]], <i32 -4, i32 -4> 1000; CHECK-NEXT: [[MUL:%.*]] = add <2 x i32> [[ADD_NEG_NEG]], <i32 -64, i32 -64> 1001; CHECK-NEXT: ret <2 x i32> [[MUL]] 1002; 1003 %add = add <2 x i32> %a0, <i32 16, i32 16> 1004 %mul = mul <2 x i32> %add, <i32 -4, i32 -4> 1005 ret <2 x i32> %mul 1006} 1007 1008define <2 x i32> @muladd2_vec_nonuniform(<2 x i32> %a0) { 1009; CHECK-LABEL: @muladd2_vec_nonuniform( 1010; CHECK-NEXT: [[ADD_NEG:%.*]] = sub <2 x i32> <i32 -16, i32 -32>, [[A0:%.*]] 1011; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[ADD_NEG]], <i32 2, i32 3> 1012; CHECK-NEXT: ret <2 x i32> [[MUL]] 1013; 1014 %add = add <2 x i32> %a0, <i32 16, i32 32> 1015 %mul = mul <2 x i32> %add, <i32 -4, i32 -8> 1016 ret <2 x i32> %mul 1017} 1018 1019define <2 x i32> @muladd2_vec_nonuniform_undef(<2 x i32> %a0) { 1020; CHECK-LABEL: @muladd2_vec_nonuniform_undef( 1021; CHECK-NEXT: [[ADD_NEG:%.*]] = sub <2 x i32> <i32 -16, i32 -32>, [[A0:%.*]] 1022; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[ADD_NEG]], <i32 2, i32 0> 1023; CHECK-NEXT: ret <2 x i32> [[MUL]] 1024; 1025 %add = add <2 x i32> %a0, <i32 16, i32 32> 1026 %mul = mul <2 x i32> %add, <i32 -4, i32 undef> 1027 ret <2 x i32> %mul 1028} 1029 1030define i32 @mulmuladd2(i32 %a0, i32 %a1) { 1031; CHECK-LABEL: @mulmuladd2( 1032; CHECK-NEXT: [[ADD_NEG:%.*]] = sub i32 -16, [[A0:%.*]] 1033; CHECK-NEXT: [[MUL1_NEG:%.*]] = mul i32 [[ADD_NEG]], [[A1:%.*]] 1034; CHECK-NEXT: [[MUL2:%.*]] = shl i32 [[MUL1_NEG]], 2 1035; CHECK-NEXT: ret i32 [[MUL2]] 1036; 1037 %add = add i32 %a0, 16 1038 %mul1 = mul i32 %add, %a1 1039 %mul2 = mul i32 %mul1, -4 1040 ret i32 %mul2 1041} 1042define i32 @mulmuladd2_extrause0(i32 %a0, i32 %a1) { 1043; CHECK-LABEL: @mulmuladd2_extrause0( 1044; CHECK-NEXT: [[ADD:%.*]] = add i32 [[A0:%.*]], 16 1045; CHECK-NEXT: [[MUL1:%.*]] = mul i32 [[ADD]], [[A1:%.*]] 1046; CHECK-NEXT: call void @use32(i32 [[MUL1]]) 1047; CHECK-NEXT: [[MUL2:%.*]] = mul i32 [[MUL1]], -4 1048; CHECK-NEXT: ret i32 [[MUL2]] 1049; 1050 %add = add i32 %a0, 16 1051 %mul1 = mul i32 %add, %a1 1052 call void @use32(i32 %mul1) 1053 %mul2 = mul i32 %mul1, -4 1054 ret i32 %mul2 1055} 1056define i32 @mulmuladd2_extrause1(i32 %a0, i32 %a1) { 1057; CHECK-LABEL: @mulmuladd2_extrause1( 1058; CHECK-NEXT: [[ADD:%.*]] = add i32 [[A0:%.*]], 16 1059; CHECK-NEXT: call void @use32(i32 [[ADD]]) 1060; CHECK-NEXT: [[MUL1:%.*]] = mul i32 [[ADD]], [[A1:%.*]] 1061; CHECK-NEXT: [[MUL2:%.*]] = mul i32 [[MUL1]], -4 1062; CHECK-NEXT: ret i32 [[MUL2]] 1063; 1064 %add = add i32 %a0, 16 1065 call void @use32(i32 %add) 1066 %mul1 = mul i32 %add, %a1 1067 %mul2 = mul i32 %mul1, -4 1068 ret i32 %mul2 1069} 1070define i32 @mulmuladd2_extrause2(i32 %a0, i32 %a1) { 1071; CHECK-LABEL: @mulmuladd2_extrause2( 1072; CHECK-NEXT: [[ADD:%.*]] = add i32 [[A0:%.*]], 16 1073; CHECK-NEXT: call void @use32(i32 [[ADD]]) 1074; CHECK-NEXT: [[MUL1:%.*]] = mul i32 [[ADD]], [[A1:%.*]] 1075; CHECK-NEXT: call void @use32(i32 [[MUL1]]) 1076; CHECK-NEXT: [[MUL2:%.*]] = mul i32 [[MUL1]], -4 1077; CHECK-NEXT: ret i32 [[MUL2]] 1078; 1079 %add = add i32 %a0, 16 1080 call void @use32(i32 %add) 1081 %mul1 = mul i32 %add, %a1 1082 call void @use32(i32 %mul1) 1083 %mul2 = mul i32 %mul1, -4 1084 ret i32 %mul2 1085} 1086 1087define i32 @mulnot(i32 %a0) { 1088; CHECK-LABEL: @mulnot( 1089; CHECK-NEXT: [[ADD_NEG:%.*]] = shl i32 [[A0:%.*]], 2 1090; CHECK-NEXT: [[MUL:%.*]] = add i32 [[ADD_NEG]], 4 1091; CHECK-NEXT: ret i32 [[MUL]] 1092; 1093 %add = xor i32 %a0, -1 1094 %mul = mul i32 %add, -4 1095 ret i32 %mul 1096} 1097define i32 @mulnot_extrause(i32 %a0) { 1098; CHECK-LABEL: @mulnot_extrause( 1099; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[A0:%.*]], -1 1100; CHECK-NEXT: call void @use32(i32 [[NOT]]) 1101; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[NOT]], -4 1102; CHECK-NEXT: ret i32 [[MUL]] 1103; 1104 %not = xor i32 %a0, -1 1105 call void @use32(i32 %not) 1106 %mul = mul i32 %not, -4 1107 ret i32 %mul 1108} 1109