1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -instcombine -S | FileCheck %s 3 4target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n32:64" 5 6define i32 @test12(i32 %A) { 7 ; Should be eliminated 8; CHECK-LABEL: @test12( 9; CHECK-NEXT: [[C:%.*]] = and i32 [[A:%.*]], 8 10; CHECK-NEXT: ret i32 [[C]] 11; 12 %B = or i32 %A, 4 13 %C = and i32 %B, 8 14 ret i32 %C 15} 16 17define i32 @test13(i32 %A) { 18; CHECK-LABEL: @test13( 19; CHECK-NEXT: ret i32 8 20; 21 %B = or i32 %A, 12 22 ; Always equal to 8 23 %C = and i32 %B, 8 24 ret i32 %C 25} 26 27define i1 @test14(i32 %A, i32 %B) { 28; CHECK-LABEL: @test14( 29; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[A:%.*]], [[B:%.*]] 30; CHECK-NEXT: ret i1 [[TMP1]] 31; 32 %C1 = icmp ult i32 %A, %B 33 %C2 = icmp ugt i32 %A, %B 34 ; (A < B) | (A > B) === A != B 35 %D = or i1 %C1, %C2 36 ret i1 %D 37} 38 39define i1 @test15(i32 %A, i32 %B) { 40; CHECK-LABEL: @test15( 41; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i32 [[A:%.*]], [[B:%.*]] 42; CHECK-NEXT: ret i1 [[TMP1]] 43; 44 %C1 = icmp ult i32 %A, %B 45 %C2 = icmp eq i32 %A, %B 46 ; (A < B) | (A == B) === A <= B 47 %D = or i1 %C1, %C2 48 ret i1 %D 49} 50 51define i32 @test16(i32 %A) { 52; CHECK-LABEL: @test16( 53; CHECK-NEXT: ret i32 [[A:%.*]] 54; 55 %B = and i32 %A, 1 56 ; -2 = ~1 57 %C = and i32 %A, -2 58 ; %D = and int %B, -1 == %B 59 %D = or i32 %B, %C 60 ret i32 %D 61} 62 63define i32 @test17(i32 %A) { 64; CHECK-LABEL: @test17( 65; CHECK-NEXT: [[D:%.*]] = and i32 [[A:%.*]], 5 66; CHECK-NEXT: ret i32 [[D]] 67; 68 %B = and i32 %A, 1 69 %C = and i32 %A, 4 70 ; %D = and int %B, 5 71 %D = or i32 %B, %C 72 ret i32 %D 73} 74 75define i1 @test18(i32 %A) { 76; CHECK-LABEL: @test18( 77; CHECK-NEXT: [[A_OFF:%.*]] = add i32 [[A:%.*]], -50 78; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[A_OFF]], 49 79; CHECK-NEXT: ret i1 [[TMP1]] 80; 81 %B = icmp sge i32 %A, 100 82 %C = icmp slt i32 %A, 50 83 %D = or i1 %B, %C 84 ret i1 %D 85} 86 87; FIXME: Vectors should fold too. 88define <2 x i1> @test18vec(<2 x i32> %A) { 89; CHECK-LABEL: @test18vec( 90; CHECK-NEXT: [[B:%.*]] = icmp sgt <2 x i32> [[A:%.*]], <i32 99, i32 99> 91; CHECK-NEXT: [[C:%.*]] = icmp slt <2 x i32> [[A]], <i32 50, i32 50> 92; CHECK-NEXT: [[D:%.*]] = or <2 x i1> [[B]], [[C]] 93; CHECK-NEXT: ret <2 x i1> [[D]] 94; 95 %B = icmp sge <2 x i32> %A, <i32 100, i32 100> 96 %C = icmp slt <2 x i32> %A, <i32 50, i32 50> 97 %D = or <2 x i1> %B, %C 98 ret <2 x i1> %D 99} 100 101define i32 @test20(i32 %x) { 102; CHECK-LABEL: @test20( 103; CHECK-NEXT: ret i32 [[X:%.*]] 104; 105 %y = and i32 %x, 123 106 %z = or i32 %y, %x 107 ret i32 %z 108} 109 110define i32 @test21(i32 %t1) { 111; CHECK-LABEL: @test21( 112; CHECK-NEXT: [[T1_MASK1:%.*]] = add i32 [[T1:%.*]], 2 113; CHECK-NEXT: ret i32 [[T1_MASK1]] 114; 115 %t1.mask1 = add i32 %t1, 2 116 %t3 = and i32 %t1.mask1, -2 117 %t5 = and i32 %t1, 1 118 ;; add tmp.1, 2 119 %t6 = or i32 %t5, %t3 120 ret i32 %t6 121} 122 123define i32 @test22(i32 %B) { 124; CHECK-LABEL: @test22( 125; CHECK-NEXT: ret i32 [[B:%.*]] 126; 127 %ELIM41 = and i32 %B, 1 128 %ELIM7 = and i32 %B, -2 129 %ELIM5 = or i32 %ELIM41, %ELIM7 130 ret i32 %ELIM5 131} 132 133define i16 @test23(i16 %A) { 134; CHECK-LABEL: @test23( 135; CHECK-NEXT: [[B:%.*]] = lshr i16 [[A:%.*]], 1 136; CHECK-NEXT: [[D:%.*]] = xor i16 [[B]], -24575 137; CHECK-NEXT: ret i16 [[D]] 138; 139 %B = lshr i16 %A, 1 140 ;; fold or into xor 141 %C = or i16 %B, -32768 142 %D = xor i16 %C, 8193 143 ret i16 %D 144} 145 146define <2 x i16> @test23vec(<2 x i16> %A) { 147; CHECK-LABEL: @test23vec( 148; CHECK-NEXT: [[B:%.*]] = lshr <2 x i16> [[A:%.*]], <i16 1, i16 1> 149; CHECK-NEXT: [[D:%.*]] = xor <2 x i16> [[B]], <i16 -24575, i16 -24575> 150; CHECK-NEXT: ret <2 x i16> [[D]] 151; 152 %B = lshr <2 x i16> %A, <i16 1, i16 1> 153 ;; fold or into xor 154 %C = or <2 x i16> %B, <i16 -32768, i16 -32768> 155 %D = xor <2 x i16> %C, <i16 8193, i16 8193> 156 ret <2 x i16> %D 157} 158 159; PR3266 & PR5276 160define i1 @test25(i32 %A, i32 %B) { 161; CHECK-LABEL: @test25( 162; CHECK-NEXT: [[C:%.*]] = icmp ne i32 [[A:%.*]], 0 163; CHECK-NEXT: [[D:%.*]] = icmp ne i32 [[B:%.*]], 57 164; CHECK-NEXT: [[F:%.*]] = and i1 [[C]], [[D]] 165; CHECK-NEXT: ret i1 [[F]] 166; 167 %C = icmp eq i32 %A, 0 168 %D = icmp eq i32 %B, 57 169 %E = or i1 %C, %D 170 %F = xor i1 %E, -1 171 ret i1 %F 172} 173 174; PR5634 175define i1 @test26(i32 %A, i32 %B) { 176; CHECK-LABEL: @test26( 177; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[A:%.*]], [[B:%.*]] 178; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0 179; CHECK-NEXT: ret i1 [[TMP2]] 180; 181 %C1 = icmp eq i32 %A, 0 182 %C2 = icmp eq i32 %B, 0 183 ; (A == 0) & (A == 0) --> (A|B) == 0 184 %D = and i1 %C1, %C2 185 ret i1 %D 186} 187 188define i1 @test27(i32* %A, i32* %B) { 189; CHECK-LABEL: @test27( 190; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32* [[A:%.*]], null 191; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32* [[B:%.*]], null 192; CHECK-NEXT: [[E:%.*]] = and i1 [[TMP1]], [[TMP2]] 193; CHECK-NEXT: ret i1 [[E]] 194; 195 %C1 = ptrtoint i32* %A to i32 196 %C2 = ptrtoint i32* %B to i32 197 %D = or i32 %C1, %C2 198 %E = icmp eq i32 %D, 0 199 ret i1 %E 200} 201 202define <2 x i1> @test27vec(<2 x i32*> %A, <2 x i32*> %B) { 203; CHECK-LABEL: @test27vec( 204; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i32*> [[A:%.*]], zeroinitializer 205; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <2 x i32*> [[B:%.*]], zeroinitializer 206; CHECK-NEXT: [[E:%.*]] = and <2 x i1> [[TMP1]], [[TMP2]] 207; CHECK-NEXT: ret <2 x i1> [[E]] 208; 209 %C1 = ptrtoint <2 x i32*> %A to <2 x i32> 210 %C2 = ptrtoint <2 x i32*> %B to <2 x i32> 211 %D = or <2 x i32> %C1, %C2 212 %E = icmp eq <2 x i32> %D, zeroinitializer 213 ret <2 x i1> %E 214} 215 216; PR5634 217define i1 @test28(i32 %A, i32 %B) { 218; CHECK-LABEL: @test28( 219; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[A:%.*]], [[B:%.*]] 220; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 221; CHECK-NEXT: ret i1 [[TMP2]] 222; 223 %C1 = icmp ne i32 %A, 0 224 %C2 = icmp ne i32 %B, 0 225 ; (A != 0) | (A != 0) --> (A|B) != 0 226 %D = or i1 %C1, %C2 227 ret i1 %D 228} 229 230define i1 @test29(i32* %A, i32* %B) { 231; CHECK-LABEL: @test29( 232; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32* [[A:%.*]], null 233; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32* [[B:%.*]], null 234; CHECK-NEXT: [[E:%.*]] = or i1 [[TMP1]], [[TMP2]] 235; CHECK-NEXT: ret i1 [[E]] 236; 237 %C1 = ptrtoint i32* %A to i32 238 %C2 = ptrtoint i32* %B to i32 239 %D = or i32 %C1, %C2 240 %E = icmp ne i32 %D, 0 241 ret i1 %E 242} 243 244define <2 x i1> @test29vec(<2 x i32*> %A, <2 x i32*> %B) { 245; CHECK-LABEL: @test29vec( 246; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <2 x i32*> [[A:%.*]], zeroinitializer 247; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <2 x i32*> [[B:%.*]], zeroinitializer 248; CHECK-NEXT: [[E:%.*]] = or <2 x i1> [[TMP1]], [[TMP2]] 249; CHECK-NEXT: ret <2 x i1> [[E]] 250; 251 %C1 = ptrtoint <2 x i32*> %A to <2 x i32> 252 %C2 = ptrtoint <2 x i32*> %B to <2 x i32> 253 %D = or <2 x i32> %C1, %C2 254 %E = icmp ne <2 x i32> %D, zeroinitializer 255 ret <2 x i1> %E 256} 257 258; PR4216 259define i32 @test30(i32 %A) { 260; CHECK-LABEL: @test30( 261; CHECK-NEXT: [[D:%.*]] = and i32 [[A:%.*]], -58312 262; CHECK-NEXT: [[E:%.*]] = or i32 [[D]], 32962 263; CHECK-NEXT: ret i32 [[E]] 264; 265 %B = or i32 %A, 32962 266 %C = and i32 %A, -65536 267 %D = and i32 %B, 40186 268 %E = or i32 %D, %C 269 ret i32 %E 270} 271 272define <2 x i32> @test30vec(<2 x i32> %A) { 273; CHECK-LABEL: @test30vec( 274; CHECK-NEXT: [[C:%.*]] = and <2 x i32> [[A:%.*]], <i32 -65536, i32 -65536> 275; CHECK-NEXT: [[B:%.*]] = and <2 x i32> [[A]], <i32 7224, i32 7224> 276; CHECK-NEXT: [[D:%.*]] = or <2 x i32> [[B]], <i32 32962, i32 32962> 277; CHECK-NEXT: [[E:%.*]] = or <2 x i32> [[D]], [[C]] 278; CHECK-NEXT: ret <2 x i32> [[E]] 279; 280 %B = or <2 x i32> %A, <i32 32962, i32 32962> 281 %C = and <2 x i32> %A, <i32 -65536, i32 -65536> 282 %D = and <2 x i32> %B, <i32 40186, i32 40186> 283 %E = or <2 x i32> %D, %C 284 ret <2 x i32> %E 285} 286 287; PR4216 288define i64 @test31(i64 %A) { 289; CHECK-LABEL: @test31( 290; CHECK-NEXT: [[E:%.*]] = and i64 [[A:%.*]], 4294908984 291; CHECK-NEXT: [[F:%.*]] = or i64 [[E]], 32962 292; CHECK-NEXT: ret i64 [[F]] 293; 294 %B = or i64 %A, 194 295 %D = and i64 %B, 250 296 297 %C = or i64 %A, 32768 298 %E = and i64 %C, 4294941696 299 300 %F = or i64 %D, %E 301 ret i64 %F 302} 303 304define <2 x i64> @test31vec(<2 x i64> %A) { 305; CHECK-LABEL: @test31vec( 306; CHECK-NEXT: [[E:%.*]] = and <2 x i64> [[A:%.*]], <i64 4294908984, i64 4294908984> 307; CHECK-NEXT: [[F:%.*]] = or <2 x i64> [[E]], <i64 32962, i64 32962> 308; CHECK-NEXT: ret <2 x i64> [[F]] 309; 310 %B = or <2 x i64> %A, <i64 194, i64 194> 311 %D = and <2 x i64> %B, <i64 250, i64 250> 312 313 %C = or <2 x i64> %A, <i64 32768, i64 32768> 314 %E = and <2 x i64> %C, <i64 4294941696, i64 4294941696> 315 316 %F = or <2 x i64> %D, %E 317 ret <2 x i64> %F 318} 319 320; codegen is mature enough to handle vector selects. 321define <4 x i32> @test32(<4 x i1> %and.i1352, <4 x i32> %vecinit6.i176, <4 x i32> %vecinit6.i191) { 322; CHECK-LABEL: @test32( 323; CHECK-NEXT: [[TMP1:%.*]] = select <4 x i1> [[AND_I1352:%.*]], <4 x i32> [[VECINIT6_I176:%.*]], <4 x i32> [[VECINIT6_I191:%.*]] 324; CHECK-NEXT: ret <4 x i32> [[TMP1]] 325; 326 %and.i135 = sext <4 x i1> %and.i1352 to <4 x i32> 327 %and.i129 = and <4 x i32> %vecinit6.i176, %and.i135 328 %neg.i = xor <4 x i32> %and.i135, <i32 -1, i32 -1, i32 -1, i32 -1> 329 %and.i = and <4 x i32> %vecinit6.i191, %neg.i 330 %or.i = or <4 x i32> %and.i, %and.i129 331 ret <4 x i32> %or.i 332} 333 334define i1 @test33(i1 %X, i1 %Y) { 335; CHECK-LABEL: @test33( 336; CHECK-NEXT: [[A:%.*]] = or i1 [[X:%.*]], [[Y:%.*]] 337; CHECK-NEXT: ret i1 [[A]] 338; 339 %a = or i1 %X, %Y 340 %b = or i1 %a, %X 341 ret i1 %b 342} 343 344define i32 @test34(i32 %X, i32 %Y) { 345; CHECK-LABEL: @test34( 346; CHECK-NEXT: [[A:%.*]] = or i32 [[X:%.*]], [[Y:%.*]] 347; CHECK-NEXT: ret i32 [[A]] 348; 349 %a = or i32 %X, %Y 350 %b = or i32 %Y, %a 351 ret i32 %b 352} 353 354define i32 @test35(i32 %a, i32 %b) { 355; CHECK-LABEL: @test35( 356; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[A:%.*]], [[B:%.*]] 357; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], 1135 358; CHECK-NEXT: ret i32 [[TMP2]] 359; 360 %1 = or i32 %a, 1135 361 %2 = or i32 %1, %b 362 ret i32 %2 363} 364 365define i1 @test36(i32 %x) { 366; CHECK-LABEL: @test36( 367; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -23 368; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP1]], 3 369; CHECK-NEXT: ret i1 [[TMP2]] 370; 371 %cmp1 = icmp eq i32 %x, 23 372 %cmp2 = icmp eq i32 %x, 24 373 %ret1 = or i1 %cmp1, %cmp2 374 %cmp3 = icmp eq i32 %x, 25 375 %ret2 = or i1 %ret1, %cmp3 376 ret i1 %ret2 377} 378 379define i1 @test37(i32 %x) { 380; CHECK-LABEL: @test37( 381; CHECK-NEXT: [[ADD1:%.*]] = add i32 [[X:%.*]], 7 382; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[ADD1]], 31 383; CHECK-NEXT: ret i1 [[TMP1]] 384; 385 %add1 = add i32 %x, 7 386 %cmp1 = icmp ult i32 %add1, 30 387 %cmp2 = icmp eq i32 %x, 23 388 %ret1 = or i1 %cmp1, %cmp2 389 ret i1 %ret1 390} 391 392define <2 x i1> @test37_uniform(<2 x i32> %x) { 393; CHECK-LABEL: @test37_uniform( 394; CHECK-NEXT: [[ADD1:%.*]] = add <2 x i32> [[X:%.*]], <i32 7, i32 7> 395; CHECK-NEXT: [[CMP1:%.*]] = icmp ult <2 x i32> [[ADD1]], <i32 30, i32 30> 396; CHECK-NEXT: [[CMP2:%.*]] = icmp eq <2 x i32> [[X]], <i32 23, i32 23> 397; CHECK-NEXT: [[RET1:%.*]] = or <2 x i1> [[CMP1]], [[CMP2]] 398; CHECK-NEXT: ret <2 x i1> [[RET1]] 399; 400 %add1 = add <2 x i32> %x, <i32 7, i32 7> 401 %cmp1 = icmp ult <2 x i32> %add1, <i32 30, i32 30> 402 %cmp2 = icmp eq <2 x i32> %x, <i32 23, i32 23> 403 %ret1 = or <2 x i1> %cmp1, %cmp2 404 ret <2 x i1> %ret1 405} 406 407define <2 x i1> @test37_undef(<2 x i32> %x) { 408; CHECK-LABEL: @test37_undef( 409; CHECK-NEXT: [[ADD1:%.*]] = add <2 x i32> [[X:%.*]], <i32 7, i32 undef> 410; CHECK-NEXT: [[CMP1:%.*]] = icmp ult <2 x i32> [[ADD1]], <i32 30, i32 undef> 411; CHECK-NEXT: [[CMP2:%.*]] = icmp eq <2 x i32> [[X]], <i32 23, i32 undef> 412; CHECK-NEXT: [[RET1:%.*]] = or <2 x i1> [[CMP1]], [[CMP2]] 413; CHECK-NEXT: ret <2 x i1> [[RET1]] 414; 415 %add1 = add <2 x i32> %x, <i32 7, i32 undef> 416 %cmp1 = icmp ult <2 x i32> %add1, <i32 30, i32 undef> 417 %cmp2 = icmp eq <2 x i32> %x, <i32 23, i32 undef> 418 %ret1 = or <2 x i1> %cmp1, %cmp2 419 ret <2 x i1> %ret1 420} 421 422define i1 @test38(i32 %x) { 423; CHECK-LABEL: @test38( 424; CHECK-NEXT: [[ADD1:%.*]] = add i32 [[X:%.*]], 7 425; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[X]], 23 426; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[ADD1]], 30 427; CHECK-NEXT: [[RET1:%.*]] = or i1 [[CMP1]], [[CMP2]] 428; CHECK-NEXT: ret i1 [[RET1]] 429; 430 %add1 = add i32 %x, 7 431 %cmp1 = icmp eq i32 %x, 23 432 %cmp2 = icmp ult i32 %add1, 30 433 %ret1 = or i1 %cmp1, %cmp2 434 ret i1 %ret1 435} 436 437define <2 x i1> @test38_nonuniform(<2 x i32> %x) { 438; CHECK-LABEL: @test38_nonuniform( 439; CHECK-NEXT: [[ADD1:%.*]] = add <2 x i32> [[X:%.*]], <i32 7, i32 24> 440; CHECK-NEXT: [[CMP1:%.*]] = icmp eq <2 x i32> [[X]], <i32 23, i32 8> 441; CHECK-NEXT: [[CMP2:%.*]] = icmp ult <2 x i32> [[ADD1]], <i32 30, i32 32> 442; CHECK-NEXT: [[RET1:%.*]] = or <2 x i1> [[CMP1]], [[CMP2]] 443; CHECK-NEXT: ret <2 x i1> [[RET1]] 444; 445 %add1 = add <2 x i32> %x, <i32 7, i32 24> 446 %cmp1 = icmp eq <2 x i32> %x, <i32 23, i32 8> 447 %cmp2 = icmp ult <2 x i32> %add1, <i32 30, i32 32> 448 %ret1 = or <2 x i1> %cmp1, %cmp2 449 ret <2 x i1> %ret1 450} 451 452define i32 @orsext_to_sel(i32 %x, i1 %y) { 453; CHECK-LABEL: @orsext_to_sel( 454; CHECK-NEXT: [[OR:%.*]] = select i1 [[Y:%.*]], i32 -1, i32 [[X:%.*]] 455; CHECK-NEXT: ret i32 [[OR]] 456; 457 %sext = sext i1 %y to i32 458 %or = or i32 %sext, %x 459 ret i32 %or 460} 461 462define i32 @orsext_to_sel_swap(i32 %x, i1 %y) { 463; CHECK-LABEL: @orsext_to_sel_swap( 464; CHECK-NEXT: [[OR:%.*]] = select i1 [[Y:%.*]], i32 -1, i32 [[X:%.*]] 465; CHECK-NEXT: ret i32 [[OR]] 466; 467 %sext = sext i1 %y to i32 468 %or = or i32 %x, %sext 469 ret i32 %or 470} 471 472define i32 @orsext_to_sel_multi_use(i32 %x, i1 %y) { 473; CHECK-LABEL: @orsext_to_sel_multi_use( 474; CHECK-NEXT: [[SEXT:%.*]] = sext i1 [[Y:%.*]] to i32 475; CHECK-NEXT: [[OR:%.*]] = or i32 [[SEXT]], [[X:%.*]] 476; CHECK-NEXT: [[ADD:%.*]] = add i32 [[OR]], [[SEXT]] 477; CHECK-NEXT: ret i32 [[ADD]] 478; 479 %sext = sext i1 %y to i32 480 %or = or i32 %sext, %x 481 %add = add i32 %sext, %or 482 ret i32 %add 483} 484 485define <2 x i32> @orsext_to_sel_vec(<2 x i32> %x, <2 x i1> %y) { 486; CHECK-LABEL: @orsext_to_sel_vec( 487; CHECK-NEXT: [[OR:%.*]] = select <2 x i1> [[Y:%.*]], <2 x i32> <i32 -1, i32 -1>, <2 x i32> [[X:%.*]] 488; CHECK-NEXT: ret <2 x i32> [[OR]] 489; 490 %sext = sext <2 x i1> %y to <2 x i32> 491 %or = or <2 x i32> %sext, %x 492 ret <2 x i32> %or 493} 494 495define <2 x i132> @orsext_to_sel_vec_swap(<2 x i132> %x, <2 x i1> %y) { 496; CHECK-LABEL: @orsext_to_sel_vec_swap( 497; CHECK-NEXT: [[OR:%.*]] = select <2 x i1> [[Y:%.*]], <2 x i132> <i132 -1, i132 -1>, <2 x i132> [[X:%.*]] 498; CHECK-NEXT: ret <2 x i132> [[OR]] 499; 500 %sext = sext <2 x i1> %y to <2 x i132> 501 %or = or <2 x i132> %x, %sext 502 ret <2 x i132> %or 503} 504 505; (~A & B) | A --> A | B 506 507define i32 @test39a(i32 %a, float %b) { 508; CHECK-LABEL: @test39a( 509; CHECK-NEXT: [[A1:%.*]] = mul i32 [[A:%.*]], 42 510; CHECK-NEXT: [[B1:%.*]] = bitcast float [[B:%.*]] to i32 511; CHECK-NEXT: [[OR:%.*]] = or i32 [[A1]], [[B1]] 512; CHECK-NEXT: ret i32 [[OR]] 513; 514 %a1 = mul i32 %a, 42 ; thwart complexity-based ordering 515 %b1 = bitcast float %b to i32 ; thwart complexity-based ordering 516 %nota = xor i32 %a1, -1 517 %and = and i32 %nota, %b1 518 %or = or i32 %and, %a1 519 ret i32 %or 520} 521 522; Commute 'and' operands: 523; (B & ~A) | A --> A | B 524 525define i32 @test39b(i32 %a, float %b) { 526; CHECK-LABEL: @test39b( 527; CHECK-NEXT: [[A1:%.*]] = mul i32 [[A:%.*]], 42 528; CHECK-NEXT: [[B1:%.*]] = bitcast float [[B:%.*]] to i32 529; CHECK-NEXT: [[OR:%.*]] = or i32 [[A1]], [[B1]] 530; CHECK-NEXT: ret i32 [[OR]] 531; 532 %a1 = mul i32 %a, 42 ; thwart complexity-based ordering 533 %b1 = bitcast float %b to i32 ; thwart complexity-based ordering 534 %nota = xor i32 %a1, -1 535 %and = and i32 %b1, %nota 536 %or = or i32 %and, %a1 537 ret i32 %or 538} 539 540; Commute 'or' operands: 541; A | (~A & B) --> A | B 542 543define i32 @test39c(i32 %a, float %b) { 544; CHECK-LABEL: @test39c( 545; CHECK-NEXT: [[A1:%.*]] = mul i32 [[A:%.*]], 42 546; CHECK-NEXT: [[B1:%.*]] = bitcast float [[B:%.*]] to i32 547; CHECK-NEXT: [[OR:%.*]] = or i32 [[A1]], [[B1]] 548; CHECK-NEXT: ret i32 [[OR]] 549; 550 %a1 = mul i32 %a, 42 ; thwart complexity-based ordering 551 %b1 = bitcast float %b to i32 ; thwart complexity-based ordering 552 %nota = xor i32 %a1, -1 553 %and = and i32 %nota, %b1 554 %or = or i32 %a1, %and 555 ret i32 %or 556} 557 558; Commute 'and' operands: 559; A | (B & ~A) --> A | B 560 561define i32 @test39d(i32 %a, float %b) { 562; CHECK-LABEL: @test39d( 563; CHECK-NEXT: [[A1:%.*]] = mul i32 [[A:%.*]], 42 564; CHECK-NEXT: [[B1:%.*]] = bitcast float [[B:%.*]] to i32 565; CHECK-NEXT: [[OR:%.*]] = or i32 [[A1]], [[B1]] 566; CHECK-NEXT: ret i32 [[OR]] 567; 568 %a1 = mul i32 %a, 42 ; thwart complexity-based ordering 569 %b1 = bitcast float %b to i32 ; thwart complexity-based ordering 570 %nota = xor i32 %a1, -1 571 %and = and i32 %b1, %nota 572 %or = or i32 %a1, %and 573 ret i32 %or 574} 575 576define i32 @test40(i32 %a, i32 %b) { 577; CHECK-LABEL: @test40( 578; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[A:%.*]], -1 579; CHECK-NEXT: [[OR:%.*]] = or i32 [[XOR]], [[B:%.*]] 580; CHECK-NEXT: ret i32 [[OR]] 581; 582 %and = and i32 %a, %b 583 %xor = xor i32 %a, -1 584 %or = or i32 %and, %xor 585 ret i32 %or 586} 587 588define i32 @test40b(i32 %a, i32 %b) { 589; CHECK-LABEL: @test40b( 590; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[A:%.*]], -1 591; CHECK-NEXT: [[OR:%.*]] = or i32 [[XOR]], [[B:%.*]] 592; CHECK-NEXT: ret i32 [[OR]] 593; 594 %and = and i32 %b, %a 595 %xor = xor i32 %a, -1 596 %or = or i32 %and, %xor 597 ret i32 %or 598} 599 600define i32 @test40c(i32 %a, i32 %b) { 601; CHECK-LABEL: @test40c( 602; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[A:%.*]], -1 603; CHECK-NEXT: [[OR:%.*]] = or i32 [[XOR]], [[B:%.*]] 604; CHECK-NEXT: ret i32 [[OR]] 605; 606 %and = and i32 %b, %a 607 %xor = xor i32 %a, -1 608 %or = or i32 %xor, %and 609 ret i32 %or 610} 611 612define i32 @test40d(i32 %a, i32 %b) { 613; CHECK-LABEL: @test40d( 614; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[A:%.*]], -1 615; CHECK-NEXT: [[OR:%.*]] = or i32 [[XOR]], [[B:%.*]] 616; CHECK-NEXT: ret i32 [[OR]] 617; 618 %and = and i32 %a, %b 619 %xor = xor i32 %a, -1 620 %or = or i32 %xor, %and 621 ret i32 %or 622} 623 624define i32 @test45(i32 %x, i32 %y, i32 %z) { 625; CHECK-LABEL: @test45( 626; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], [[Z:%.*]] 627; CHECK-NEXT: [[OR1:%.*]] = or i32 [[TMP1]], [[Y:%.*]] 628; CHECK-NEXT: ret i32 [[OR1]] 629; 630 %or = or i32 %y, %z 631 %and = and i32 %x, %or 632 %or1 = or i32 %and, %y 633 ret i32 %or1 634} 635 636define i1 @test46(i8 signext %c) { 637; CHECK-LABEL: @test46( 638; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[C:%.*]], -33 639; CHECK-NEXT: [[TMP2:%.*]] = add i8 [[TMP1]], -65 640; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i8 [[TMP2]], 26 641; CHECK-NEXT: ret i1 [[TMP3]] 642; 643 %c.off = add i8 %c, -97 644 %cmp1 = icmp ult i8 %c.off, 26 645 %c.off17 = add i8 %c, -65 646 %cmp2 = icmp ult i8 %c.off17, 26 647 %or = or i1 %cmp1, %cmp2 648 ret i1 %or 649} 650 651define <2 x i1> @test46_uniform(<2 x i8> %c) { 652; CHECK-LABEL: @test46_uniform( 653; CHECK-NEXT: [[C_OFF:%.*]] = add <2 x i8> [[C:%.*]], <i8 -97, i8 -97> 654; CHECK-NEXT: [[CMP1:%.*]] = icmp ult <2 x i8> [[C_OFF]], <i8 26, i8 26> 655; CHECK-NEXT: [[C_OFF17:%.*]] = add <2 x i8> [[C]], <i8 -65, i8 -65> 656; CHECK-NEXT: [[CMP2:%.*]] = icmp ult <2 x i8> [[C_OFF17]], <i8 26, i8 26> 657; CHECK-NEXT: [[OR:%.*]] = or <2 x i1> [[CMP1]], [[CMP2]] 658; CHECK-NEXT: ret <2 x i1> [[OR]] 659; 660 %c.off = add <2 x i8> %c, <i8 -97, i8 -97> 661 %cmp1 = icmp ult <2 x i8> %c.off, <i8 26, i8 26> 662 %c.off17 = add <2 x i8> %c, <i8 -65, i8 -65> 663 %cmp2 = icmp ult <2 x i8> %c.off17, <i8 26, i8 26> 664 %or = or <2 x i1> %cmp1, %cmp2 665 ret <2 x i1> %or 666} 667 668define <2 x i1> @test46_undef(<2 x i8> %c) { 669; CHECK-LABEL: @test46_undef( 670; CHECK-NEXT: [[C_OFF:%.*]] = add <2 x i8> [[C:%.*]], <i8 -97, i8 undef> 671; CHECK-NEXT: [[CMP1:%.*]] = icmp ult <2 x i8> [[C_OFF]], <i8 26, i8 undef> 672; CHECK-NEXT: [[C_OFF17:%.*]] = add <2 x i8> [[C]], <i8 -65, i8 undef> 673; CHECK-NEXT: [[CMP2:%.*]] = icmp ult <2 x i8> [[C_OFF17]], <i8 26, i8 undef> 674; CHECK-NEXT: [[OR:%.*]] = or <2 x i1> [[CMP1]], [[CMP2]] 675; CHECK-NEXT: ret <2 x i1> [[OR]] 676; 677 %c.off = add <2 x i8> %c, <i8 -97, i8 undef> 678 %cmp1 = icmp ult <2 x i8> %c.off, <i8 26, i8 undef> 679 %c.off17 = add <2 x i8> %c, <i8 -65, i8 undef> 680 %cmp2 = icmp ult <2 x i8> %c.off17, <i8 26, i8 undef> 681 %or = or <2 x i1> %cmp1, %cmp2 682 ret <2 x i1> %or 683} 684 685define i1 @test47(i8 signext %c) { 686; CHECK-LABEL: @test47( 687; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[C:%.*]], -33 688; CHECK-NEXT: [[TMP2:%.*]] = add i8 [[TMP1]], -65 689; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i8 [[TMP2]], 27 690; CHECK-NEXT: ret i1 [[TMP3]] 691; 692 %c.off = add i8 %c, -65 693 %cmp1 = icmp ule i8 %c.off, 26 694 %c.off17 = add i8 %c, -97 695 %cmp2 = icmp ule i8 %c.off17, 26 696 %or = or i1 %cmp1, %cmp2 697 ret i1 %or 698} 699 700define <2 x i1> @test47_nonuniform(<2 x i8> %c) { 701; CHECK-LABEL: @test47_nonuniform( 702; CHECK-NEXT: [[C_OFF:%.*]] = add <2 x i8> [[C:%.*]], <i8 -65, i8 -97> 703; CHECK-NEXT: [[CMP1:%.*]] = icmp ult <2 x i8> [[C_OFF]], <i8 27, i8 27> 704; CHECK-NEXT: [[C_OFF17:%.*]] = add <2 x i8> [[C]], <i8 -97, i8 -65> 705; CHECK-NEXT: [[CMP2:%.*]] = icmp ult <2 x i8> [[C_OFF17]], <i8 27, i8 27> 706; CHECK-NEXT: [[OR:%.*]] = or <2 x i1> [[CMP1]], [[CMP2]] 707; CHECK-NEXT: ret <2 x i1> [[OR]] 708; 709 %c.off = add <2 x i8> %c, <i8 -65, i8 -97> 710 %cmp1 = icmp ule <2 x i8> %c.off, <i8 26, i8 26> 711 %c.off17 = add <2 x i8> %c, <i8 -97, i8 -65> 712 %cmp2 = icmp ule <2 x i8> %c.off17, <i8 26, i8 26> 713 %or = or <2 x i1> %cmp1, %cmp2 714 ret <2 x i1> %or 715} 716 717define i32 @test49(i1 %C) { 718; CHECK-LABEL: @test49( 719; CHECK-NEXT: [[V:%.*]] = select i1 [[C:%.*]], i32 1019, i32 123 720; CHECK-NEXT: ret i32 [[V]] 721; 722 %A = select i1 %C, i32 1000, i32 10 723 %V = or i32 %A, 123 724 ret i32 %V 725} 726 727define <2 x i32> @test49vec(i1 %C) { 728; CHECK-LABEL: @test49vec( 729; CHECK-NEXT: [[V:%.*]] = select i1 [[C:%.*]], <2 x i32> <i32 1019, i32 1019>, <2 x i32> <i32 123, i32 123> 730; CHECK-NEXT: ret <2 x i32> [[V]] 731; 732 %A = select i1 %C, <2 x i32> <i32 1000, i32 1000>, <2 x i32> <i32 10, i32 10> 733 %V = or <2 x i32> %A, <i32 123, i32 123> 734 ret <2 x i32> %V 735} 736 737define <2 x i32> @test49vec2(i1 %C) { 738; CHECK-LABEL: @test49vec2( 739; CHECK-NEXT: [[V:%.*]] = select i1 [[C:%.*]], <2 x i32> <i32 1019, i32 2509>, <2 x i32> <i32 123, i32 351> 740; CHECK-NEXT: ret <2 x i32> [[V]] 741; 742 %A = select i1 %C, <2 x i32> <i32 1000, i32 2500>, <2 x i32> <i32 10, i32 30> 743 %V = or <2 x i32> %A, <i32 123, i32 333> 744 ret <2 x i32> %V 745} 746 747define i32 @test50(i1 %which) { 748; CHECK-LABEL: @test50( 749; CHECK-NEXT: entry: 750; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]] 751; CHECK: delay: 752; CHECK-NEXT: br label [[FINAL]] 753; CHECK: final: 754; CHECK-NEXT: [[A:%.*]] = phi i32 [ 1019, [[ENTRY:%.*]] ], [ 123, [[DELAY]] ] 755; CHECK-NEXT: ret i32 [[A]] 756; 757entry: 758 br i1 %which, label %final, label %delay 759 760delay: 761 br label %final 762 763final: 764 %A = phi i32 [ 1000, %entry ], [ 10, %delay ] 765 %value = or i32 %A, 123 766 ret i32 %value 767} 768 769define <2 x i32> @test50vec(i1 %which) { 770; CHECK-LABEL: @test50vec( 771; CHECK-NEXT: entry: 772; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]] 773; CHECK: delay: 774; CHECK-NEXT: br label [[FINAL]] 775; CHECK: final: 776; CHECK-NEXT: [[A:%.*]] = phi <2 x i32> [ <i32 1019, i32 1019>, [[ENTRY:%.*]] ], [ <i32 123, i32 123>, [[DELAY]] ] 777; CHECK-NEXT: ret <2 x i32> [[A]] 778; 779entry: 780 br i1 %which, label %final, label %delay 781 782delay: 783 br label %final 784 785final: 786 %A = phi <2 x i32> [ <i32 1000, i32 1000>, %entry ], [ <i32 10, i32 10>, %delay ] 787 %value = or <2 x i32> %A, <i32 123, i32 123> 788 ret <2 x i32> %value 789} 790 791define <2 x i32> @test50vec2(i1 %which) { 792; CHECK-LABEL: @test50vec2( 793; CHECK-NEXT: entry: 794; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]] 795; CHECK: delay: 796; CHECK-NEXT: br label [[FINAL]] 797; CHECK: final: 798; CHECK-NEXT: [[A:%.*]] = phi <2 x i32> [ <i32 1019, i32 2509>, [[ENTRY:%.*]] ], [ <i32 123, i32 351>, [[DELAY]] ] 799; CHECK-NEXT: ret <2 x i32> [[A]] 800; 801entry: 802 br i1 %which, label %final, label %delay 803 804delay: 805 br label %final 806 807final: 808 %A = phi <2 x i32> [ <i32 1000, i32 2500>, %entry ], [ <i32 10, i32 30>, %delay ] 809 %value = or <2 x i32> %A, <i32 123, i32 333> 810 ret <2 x i32> %value 811} 812 813; In the next 4 tests, vary the types and predicates for extra coverage. 814; (X | (Y & ~X)) -> (X | Y), where 'not' is an inverted cmp 815 816define i1 @or_andn_cmp_1(i32 %a, i32 %b, i32 %c) { 817; CHECK-LABEL: @or_andn_cmp_1( 818; CHECK-NEXT: [[X:%.*]] = icmp sgt i32 [[A:%.*]], [[B:%.*]] 819; CHECK-NEXT: [[Y:%.*]] = icmp ugt i32 [[C:%.*]], 42 820; CHECK-NEXT: [[OR:%.*]] = or i1 [[X]], [[Y]] 821; CHECK-NEXT: ret i1 [[OR]] 822; 823 %x = icmp sgt i32 %a, %b 824 %x_inv = icmp sle i32 %a, %b 825 %y = icmp ugt i32 %c, 42 ; thwart complexity-based ordering 826 %and = and i1 %y, %x_inv 827 %or = or i1 %x, %and 828 ret i1 %or 829} 830 831; Commute the 'or': 832; ((Y & ~X) | X) -> (X | Y), where 'not' is an inverted cmp 833 834define <2 x i1> @or_andn_cmp_2(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c) { 835; CHECK-LABEL: @or_andn_cmp_2( 836; CHECK-NEXT: [[X:%.*]] = icmp sge <2 x i32> [[A:%.*]], [[B:%.*]] 837; CHECK-NEXT: [[Y:%.*]] = icmp ugt <2 x i32> [[C:%.*]], <i32 42, i32 47> 838; CHECK-NEXT: [[OR:%.*]] = or <2 x i1> [[Y]], [[X]] 839; CHECK-NEXT: ret <2 x i1> [[OR]] 840; 841 %x = icmp sge <2 x i32> %a, %b 842 %x_inv = icmp slt <2 x i32> %a, %b 843 %y = icmp ugt <2 x i32> %c, <i32 42, i32 47> ; thwart complexity-based ordering 844 %and = and <2 x i1> %y, %x_inv 845 %or = or <2 x i1> %and, %x 846 ret <2 x i1> %or 847} 848 849; Commute the 'and': 850; (X | (~X & Y)) -> (X | Y), where 'not' is an inverted cmp 851 852define i1 @or_andn_cmp_3(i72 %a, i72 %b, i72 %c) { 853; CHECK-LABEL: @or_andn_cmp_3( 854; CHECK-NEXT: [[X:%.*]] = icmp ugt i72 [[A:%.*]], [[B:%.*]] 855; CHECK-NEXT: [[Y:%.*]] = icmp ugt i72 [[C:%.*]], 42 856; CHECK-NEXT: [[OR:%.*]] = or i1 [[X]], [[Y]] 857; CHECK-NEXT: ret i1 [[OR]] 858; 859 %x = icmp ugt i72 %a, %b 860 %x_inv = icmp ule i72 %a, %b 861 %y = icmp ugt i72 %c, 42 ; thwart complexity-based ordering 862 %and = and i1 %x_inv, %y 863 %or = or i1 %x, %and 864 ret i1 %or 865} 866 867; Commute the 'or': 868; ((~X & Y) | X) -> (X | Y), where 'not' is an inverted cmp 869 870define <3 x i1> @or_andn_cmp_4(<3 x i32> %a, <3 x i32> %b, <3 x i32> %c) { 871; CHECK-LABEL: @or_andn_cmp_4( 872; CHECK-NEXT: [[X:%.*]] = icmp eq <3 x i32> [[A:%.*]], [[B:%.*]] 873; CHECK-NEXT: [[Y:%.*]] = icmp ugt <3 x i32> [[C:%.*]], <i32 42, i32 43, i32 -1> 874; CHECK-NEXT: [[OR:%.*]] = or <3 x i1> [[Y]], [[X]] 875; CHECK-NEXT: ret <3 x i1> [[OR]] 876; 877 %x = icmp eq <3 x i32> %a, %b 878 %x_inv = icmp ne <3 x i32> %a, %b 879 %y = icmp ugt <3 x i32> %c, <i32 42, i32 43, i32 -1> ; thwart complexity-based ordering 880 %and = and <3 x i1> %x_inv, %y 881 %or = or <3 x i1> %and, %x 882 ret <3 x i1> %or 883} 884 885; In the next 4 tests, vary the types and predicates for extra coverage. 886; (~X | (Y & X)) -> (~X | Y), where 'not' is an inverted cmp 887 888define i1 @orn_and_cmp_1(i37 %a, i37 %b, i37 %c) { 889; CHECK-LABEL: @orn_and_cmp_1( 890; CHECK-NEXT: [[X_INV:%.*]] = icmp sle i37 [[A:%.*]], [[B:%.*]] 891; CHECK-NEXT: [[Y:%.*]] = icmp ugt i37 [[C:%.*]], 42 892; CHECK-NEXT: [[OR:%.*]] = or i1 [[X_INV]], [[Y]] 893; CHECK-NEXT: ret i1 [[OR]] 894; 895 %x = icmp sgt i37 %a, %b 896 %x_inv = icmp sle i37 %a, %b 897 %y = icmp ugt i37 %c, 42 ; thwart complexity-based ordering 898 %and = and i1 %y, %x 899 %or = or i1 %x_inv, %and 900 ret i1 %or 901} 902 903; Commute the 'or': 904; ((Y & X) | ~X) -> (~X | Y), where 'not' is an inverted cmp 905 906define i1 @orn_and_cmp_2(i16 %a, i16 %b, i16 %c) { 907; CHECK-LABEL: @orn_and_cmp_2( 908; CHECK-NEXT: [[X_INV:%.*]] = icmp slt i16 [[A:%.*]], [[B:%.*]] 909; CHECK-NEXT: [[Y:%.*]] = icmp ugt i16 [[C:%.*]], 42 910; CHECK-NEXT: [[OR:%.*]] = or i1 [[Y]], [[X_INV]] 911; CHECK-NEXT: ret i1 [[OR]] 912; 913 %x = icmp sge i16 %a, %b 914 %x_inv = icmp slt i16 %a, %b 915 %y = icmp ugt i16 %c, 42 ; thwart complexity-based ordering 916 %and = and i1 %y, %x 917 %or = or i1 %and, %x_inv 918 ret i1 %or 919} 920 921; Commute the 'and': 922; (~X | (X & Y)) -> (~X | Y), where 'not' is an inverted cmp 923 924define <4 x i1> @orn_and_cmp_3(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) { 925; CHECK-LABEL: @orn_and_cmp_3( 926; CHECK-NEXT: [[X_INV:%.*]] = icmp ule <4 x i32> [[A:%.*]], [[B:%.*]] 927; CHECK-NEXT: [[Y:%.*]] = icmp ugt <4 x i32> [[C:%.*]], <i32 42, i32 0, i32 1, i32 -1> 928; CHECK-NEXT: [[OR:%.*]] = or <4 x i1> [[X_INV]], [[Y]] 929; CHECK-NEXT: ret <4 x i1> [[OR]] 930; 931 %x = icmp ugt <4 x i32> %a, %b 932 %x_inv = icmp ule <4 x i32> %a, %b 933 %y = icmp ugt <4 x i32> %c, <i32 42, i32 0, i32 1, i32 -1> ; thwart complexity-based ordering 934 %and = and <4 x i1> %x, %y 935 %or = or <4 x i1> %x_inv, %and 936 ret <4 x i1> %or 937} 938 939; Commute the 'or': 940; ((X & Y) | ~X) -> (~X | Y), where 'not' is an inverted cmp 941 942define i1 @orn_and_cmp_4(i32 %a, i32 %b, i32 %c) { 943; CHECK-LABEL: @orn_and_cmp_4( 944; CHECK-NEXT: [[X_INV:%.*]] = icmp ne i32 [[A:%.*]], [[B:%.*]] 945; CHECK-NEXT: [[Y:%.*]] = icmp ugt i32 [[C:%.*]], 42 946; CHECK-NEXT: [[OR:%.*]] = or i1 [[Y]], [[X_INV]] 947; CHECK-NEXT: ret i1 [[OR]] 948; 949 %x = icmp eq i32 %a, %b 950 %x_inv = icmp ne i32 %a, %b 951 %y = icmp ugt i32 %c, 42 ; thwart complexity-based ordering 952 %and = and i1 %x, %y 953 %or = or i1 %and, %x_inv 954 ret i1 %or 955} 956 957; The constant vectors are inverses. Make sure we can turn this into a select without crashing trying to truncate the constant to 16xi1. 958define <16 x i1> @test51(<16 x i1> %arg, <16 x i1> %arg1) { 959; CHECK-LABEL: @test51( 960; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i1> [[ARG:%.*]], <16 x i1> [[ARG1:%.*]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 20, i32 5, i32 6, i32 23, i32 24, i32 9, i32 10, i32 27, i32 28, i32 29, i32 30, i32 31> 961; CHECK-NEXT: ret <16 x i1> [[TMP1]] 962; 963 %tmp = and <16 x i1> %arg, <i1 true, i1 true, i1 true, i1 true, i1 false, i1 true, i1 true, i1 false, i1 false, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false, i1 false> 964 %tmp2 = and <16 x i1> %arg1, <i1 false, i1 false, i1 false, i1 false, i1 true, i1 false, i1 false, i1 true, i1 true, i1 false, i1 false, i1 true, i1 true, i1 true, i1 true, i1 true> 965 %tmp3 = or <16 x i1> %tmp, %tmp2 966 ret <16 x i1> %tmp3 967} 968 969; This would infinite loop because it reaches a transform 970; that was not expecting a constant-foldable value. 971 972define i32 @PR46712(i1 %x, i1 %y, i1 %b, i64 %z) { 973; CHECK-LABEL: @PR46712( 974; CHECK-NEXT: entry: 975; CHECK-NEXT: br i1 [[B:%.*]], label [[TRUE:%.*]], label [[END:%.*]] 976; CHECK: true: 977; CHECK-NEXT: [[BOOL5:%.*]] = icmp eq i64 [[Z:%.*]], 0 978; CHECK-NEXT: [[SEL:%.*]] = zext i1 [[BOOL5]] to i32 979; CHECK-NEXT: br label [[END]] 980; CHECK: end: 981; CHECK-NEXT: [[T5:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[SEL]], [[TRUE]] ] 982; CHECK-NEXT: ret i32 [[T5]] 983; 984entry: 985 %t2 = or i1 %x, %y 986 %conv = sext i1 %t2 to i32 987 %cmp = icmp sge i32 %conv, 1 988 %conv2 = zext i1 %cmp to i64 989 br i1 %b, label %true, label %end 990 991true: 992 %bool4 = icmp eq i64 %conv2, 0 993 %bool5 = icmp ne i64 %z, 0 994 %and = and i1 %bool4, %bool5 995 %sel = select i1 %and, i1 false, i1 true 996 br label %end 997 998end: 999 %t5 = phi i1 [ 0, %entry ], [ %sel, %true ] 1000 %conv8 = zext i1 %t5 to i32 1001 ret i32 %conv8 1002} 1003