1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -instcombine -S | FileCheck %s
3
4; shift left
5
6define i32 @and_signbit_shl(i32 %x) {
7; CHECK-LABEL: @and_signbit_shl(
8; CHECK-NEXT:    [[T0:%.*]] = shl i32 [[X:%.*]], 8
9; CHECK-NEXT:    [[R:%.*]] = and i32 [[T0]], -16777216
10; CHECK-NEXT:    ret i32 [[R]]
11;
12  %t0 = and i32 %x, 4294901760 ; 0xFFFF0000
13  %r = shl i32 %t0, 8
14  ret i32 %r
15}
16define i32 @and_nosignbit_shl(i32 %x) {
17; CHECK-LABEL: @and_nosignbit_shl(
18; CHECK-NEXT:    [[T0:%.*]] = shl i32 [[X:%.*]], 8
19; CHECK-NEXT:    [[R:%.*]] = and i32 [[T0]], -16777216
20; CHECK-NEXT:    ret i32 [[R]]
21;
22  %t0 = and i32 %x, 2147418112 ; 0x7FFF0000
23  %r = shl i32 %t0, 8
24  ret i32 %r
25}
26
27define i32 @or_signbit_shl(i32 %x) {
28; CHECK-LABEL: @or_signbit_shl(
29; CHECK-NEXT:    [[T0:%.*]] = shl i32 [[X:%.*]], 8
30; CHECK-NEXT:    [[R:%.*]] = or i32 [[T0]], -16777216
31; CHECK-NEXT:    ret i32 [[R]]
32;
33  %t0 = or i32 %x, 4294901760 ; 0xFFFF0000
34  %r = shl i32 %t0, 8
35  ret i32 %r
36}
37define i32 @or_nosignbit_shl(i32 %x) {
38; CHECK-LABEL: @or_nosignbit_shl(
39; CHECK-NEXT:    [[T0:%.*]] = shl i32 [[X:%.*]], 8
40; CHECK-NEXT:    [[R:%.*]] = or i32 [[T0]], -16777216
41; CHECK-NEXT:    ret i32 [[R]]
42;
43  %t0 = or i32 %x, 2147418112 ; 0x7FFF0000
44  %r = shl i32 %t0, 8
45  ret i32 %r
46}
47
48define i32 @xor_signbit_shl(i32 %x) {
49; CHECK-LABEL: @xor_signbit_shl(
50; CHECK-NEXT:    [[T0:%.*]] = shl i32 [[X:%.*]], 8
51; CHECK-NEXT:    [[R:%.*]] = xor i32 [[T0]], -16777216
52; CHECK-NEXT:    ret i32 [[R]]
53;
54  %t0 = xor i32 %x, 4294901760 ; 0xFFFF0000
55  %r = shl i32 %t0, 8
56  ret i32 %r
57}
58define i32 @xor_nosignbit_shl(i32 %x) {
59; CHECK-LABEL: @xor_nosignbit_shl(
60; CHECK-NEXT:    [[T0:%.*]] = shl i32 [[X:%.*]], 8
61; CHECK-NEXT:    [[R:%.*]] = xor i32 [[T0]], -16777216
62; CHECK-NEXT:    ret i32 [[R]]
63;
64  %t0 = xor i32 %x, 2147418112 ; 0x7FFF0000
65  %r = shl i32 %t0, 8
66  ret i32 %r
67}
68
69define i32 @add_signbit_shl(i32 %x) {
70; CHECK-LABEL: @add_signbit_shl(
71; CHECK-NEXT:    [[T0:%.*]] = shl i32 [[X:%.*]], 8
72; CHECK-NEXT:    [[R:%.*]] = add i32 [[T0]], -16777216
73; CHECK-NEXT:    ret i32 [[R]]
74;
75  %t0 = add i32 %x, 4294901760 ; 0xFFFF0000
76  %r = shl i32 %t0, 8
77  ret i32 %r
78}
79define i32 @add_nosignbit_shl(i32 %x) {
80; CHECK-LABEL: @add_nosignbit_shl(
81; CHECK-NEXT:    [[T0:%.*]] = shl i32 [[X:%.*]], 8
82; CHECK-NEXT:    [[R:%.*]] = add i32 [[T0]], -16777216
83; CHECK-NEXT:    ret i32 [[R]]
84;
85  %t0 = add i32 %x, 2147418112 ; 0x7FFF0000
86  %r = shl i32 %t0, 8
87  ret i32 %r
88}
89
90; logical shift right
91
92define i32 @and_signbit_lshr(i32 %x) {
93; CHECK-LABEL: @and_signbit_lshr(
94; CHECK-NEXT:    [[T0:%.*]] = lshr i32 [[X:%.*]], 8
95; CHECK-NEXT:    [[R:%.*]] = and i32 [[T0]], 16776960
96; CHECK-NEXT:    ret i32 [[R]]
97;
98  %t0 = and i32 %x, 4294901760 ; 0xFFFF0000
99  %r = lshr i32 %t0, 8
100  ret i32 %r
101}
102define i32 @and_nosignbit_lshr(i32 %x) {
103; CHECK-LABEL: @and_nosignbit_lshr(
104; CHECK-NEXT:    [[T0:%.*]] = lshr i32 [[X:%.*]], 8
105; CHECK-NEXT:    [[R:%.*]] = and i32 [[T0]], 8388352
106; CHECK-NEXT:    ret i32 [[R]]
107;
108  %t0 = and i32 %x, 2147418112 ; 0x7FFF0000
109  %r = lshr i32 %t0, 8
110  ret i32 %r
111}
112
113define i32 @or_signbit_lshr(i32 %x) {
114; CHECK-LABEL: @or_signbit_lshr(
115; CHECK-NEXT:    [[T0:%.*]] = lshr i32 [[X:%.*]], 8
116; CHECK-NEXT:    [[R:%.*]] = or i32 [[T0]], 16776960
117; CHECK-NEXT:    ret i32 [[R]]
118;
119  %t0 = or i32 %x, 4294901760 ; 0xFFFF0000
120  %r = lshr i32 %t0, 8
121  ret i32 %r
122}
123define i32 @or_nosignbit_lshr(i32 %x) {
124; CHECK-LABEL: @or_nosignbit_lshr(
125; CHECK-NEXT:    [[T0:%.*]] = lshr i32 [[X:%.*]], 8
126; CHECK-NEXT:    [[R:%.*]] = or i32 [[T0]], 8388352
127; CHECK-NEXT:    ret i32 [[R]]
128;
129  %t0 = or i32 %x, 2147418112 ; 0x7FFF0000
130  %r = lshr i32 %t0, 8
131  ret i32 %r
132}
133
134define i32 @xor_signbit_lshr(i32 %x) {
135; CHECK-LABEL: @xor_signbit_lshr(
136; CHECK-NEXT:    [[T0:%.*]] = lshr i32 [[X:%.*]], 8
137; CHECK-NEXT:    [[R:%.*]] = xor i32 [[T0]], 16776960
138; CHECK-NEXT:    ret i32 [[R]]
139;
140  %t0 = xor i32 %x, 4294901760 ; 0xFFFF0000
141  %r = lshr i32 %t0, 8
142  ret i32 %r
143}
144define i32 @xor_nosignbit_lshr(i32 %x) {
145; CHECK-LABEL: @xor_nosignbit_lshr(
146; CHECK-NEXT:    [[T0:%.*]] = lshr i32 [[X:%.*]], 8
147; CHECK-NEXT:    [[R:%.*]] = xor i32 [[T0]], 8388352
148; CHECK-NEXT:    ret i32 [[R]]
149;
150  %t0 = xor i32 %x, 2147418112 ; 0x7FFF0000
151  %r = lshr i32 %t0, 8
152  ret i32 %r
153}
154
155define i32 @add_signbit_lshr(i32 %x) {
156; CHECK-LABEL: @add_signbit_lshr(
157; CHECK-NEXT:    [[T0:%.*]] = add i32 [[X:%.*]], -65536
158; CHECK-NEXT:    [[R:%.*]] = lshr i32 [[T0]], 8
159; CHECK-NEXT:    ret i32 [[R]]
160;
161  %t0 = add i32 %x, 4294901760 ; 0xFFFF0000
162  %r = lshr i32 %t0, 8
163  ret i32 %r
164}
165define i32 @add_nosignbit_lshr(i32 %x) {
166; CHECK-LABEL: @add_nosignbit_lshr(
167; CHECK-NEXT:    [[T0:%.*]] = add i32 [[X:%.*]], 2147418112
168; CHECK-NEXT:    [[R:%.*]] = lshr i32 [[T0]], 8
169; CHECK-NEXT:    ret i32 [[R]]
170;
171  %t0 = add i32 %x, 2147418112 ; 0x7FFF0000
172  %r = lshr i32 %t0, 8
173  ret i32 %r
174}
175
176; arithmetic shift right
177
178define i32 @and_signbit_ashr(i32 %x) {
179; CHECK-LABEL: @and_signbit_ashr(
180; CHECK-NEXT:    [[T0:%.*]] = ashr i32 [[X:%.*]], 8
181; CHECK-NEXT:    [[R:%.*]] = and i32 [[T0]], -256
182; CHECK-NEXT:    ret i32 [[R]]
183;
184  %t0 = and i32 %x, 4294901760 ; 0xFFFF0000
185  %r = ashr i32 %t0, 8
186  ret i32 %r
187}
188define i32 @and_nosignbit_ashr(i32 %x) {
189; CHECK-LABEL: @and_nosignbit_ashr(
190; CHECK-NEXT:    [[T0:%.*]] = lshr i32 [[X:%.*]], 8
191; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[T0]], 8388352
192; CHECK-NEXT:    ret i32 [[TMP1]]
193;
194  %t0 = and i32 %x, 2147418112 ; 0x7FFF0000
195  %r = ashr i32 %t0, 8
196  ret i32 %r
197}
198
199define i32 @or_signbit_ashr(i32 %x) {
200; CHECK-LABEL: @or_signbit_ashr(
201; CHECK-NEXT:    [[TMP1:%.*]] = lshr i32 [[X:%.*]], 8
202; CHECK-NEXT:    [[R:%.*]] = or i32 [[TMP1]], -256
203; CHECK-NEXT:    ret i32 [[R]]
204;
205  %t0 = or i32 %x, 4294901760 ; 0xFFFF0000
206  %r = ashr i32 %t0, 8
207  ret i32 %r
208}
209define i32 @or_nosignbit_ashr(i32 %x) {
210; CHECK-LABEL: @or_nosignbit_ashr(
211; CHECK-NEXT:    [[T0:%.*]] = ashr i32 [[X:%.*]], 8
212; CHECK-NEXT:    [[R:%.*]] = or i32 [[T0]], 8388352
213; CHECK-NEXT:    ret i32 [[R]]
214;
215  %t0 = or i32 %x, 2147418112 ; 0x7FFF0000
216  %r = ashr i32 %t0, 8
217  ret i32 %r
218}
219
220define i32 @xor_signbit_ashr(i32 %x) {
221; CHECK-LABEL: @xor_signbit_ashr(
222; CHECK-NEXT:    [[T0:%.*]] = ashr i32 [[X:%.*]], 8
223; CHECK-NEXT:    [[R:%.*]] = xor i32 [[T0]], -256
224; CHECK-NEXT:    ret i32 [[R]]
225;
226  %t0 = xor i32 %x, 4294901760 ; 0xFFFF0000
227  %r = ashr i32 %t0, 8
228  ret i32 %r
229}
230define i32 @xor_nosignbit_ashr(i32 %x) {
231; CHECK-LABEL: @xor_nosignbit_ashr(
232; CHECK-NEXT:    [[T0:%.*]] = ashr i32 [[X:%.*]], 8
233; CHECK-NEXT:    [[R:%.*]] = xor i32 [[T0]], 8388352
234; CHECK-NEXT:    ret i32 [[R]]
235;
236  %t0 = xor i32 %x, 2147418112 ; 0x7FFF0000
237  %r = ashr i32 %t0, 8
238  ret i32 %r
239}
240
241define i32 @add_signbit_ashr(i32 %x) {
242; CHECK-LABEL: @add_signbit_ashr(
243; CHECK-NEXT:    [[T0:%.*]] = add i32 [[X:%.*]], -65536
244; CHECK-NEXT:    [[R:%.*]] = ashr i32 [[T0]], 8
245; CHECK-NEXT:    ret i32 [[R]]
246;
247  %t0 = add i32 %x, 4294901760 ; 0xFFFF0000
248  %r = ashr i32 %t0, 8
249  ret i32 %r
250}
251define i32 @add_nosignbit_ashr(i32 %x) {
252; CHECK-LABEL: @add_nosignbit_ashr(
253; CHECK-NEXT:    [[T0:%.*]] = add i32 [[X:%.*]], 2147418112
254; CHECK-NEXT:    [[R:%.*]] = ashr i32 [[T0]], 8
255; CHECK-NEXT:    ret i32 [[R]]
256;
257  %t0 = add i32 %x, 2147418112 ; 0x7FFF0000
258  %r = ashr i32 %t0, 8
259  ret i32 %r
260}
261