1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -instcombine -S | FileCheck %s
3
4; shift left
5
6define i32 @and_signbit_select_shl(i32 %x, i1 %cond) {
7; CHECK-LABEL: @and_signbit_select_shl(
8; CHECK-NEXT:    [[TMP1:%.*]] = shl i32 [[X:%.*]], 8
9; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[TMP1]], -16777216
10; CHECK-NEXT:    [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP2]], i32 [[TMP1]]
11; CHECK-NEXT:    ret i32 [[R]]
12;
13  %t0 = and i32 %x, 4294901760 ; 0xFFFF0000
14  %t1 = select i1 %cond, i32 %t0, i32 %x
15  %r = shl i32 %t1, 8
16  ret i32 %r
17}
18define i32 @and_nosignbit_select_shl(i32 %x, i1 %cond) {
19; CHECK-LABEL: @and_nosignbit_select_shl(
20; CHECK-NEXT:    [[TMP1:%.*]] = shl i32 [[X:%.*]], 8
21; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[TMP1]], -16777216
22; CHECK-NEXT:    [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP2]], i32 [[TMP1]]
23; CHECK-NEXT:    ret i32 [[R]]
24;
25  %t0 = and i32 %x, 2147418112 ; 0x7FFF0000
26  %t1 = select i1 %cond, i32 %t0, i32 %x
27  %r = shl i32 %t1, 8
28  ret i32 %r
29}
30
31define i32 @or_signbit_select_shl(i32 %x, i1 %cond) {
32; CHECK-LABEL: @or_signbit_select_shl(
33; CHECK-NEXT:    [[TMP1:%.*]] = shl i32 [[X:%.*]], 8
34; CHECK-NEXT:    [[TMP2:%.*]] = or i32 [[TMP1]], -16777216
35; CHECK-NEXT:    [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP2]], i32 [[TMP1]]
36; CHECK-NEXT:    ret i32 [[R]]
37;
38  %t0 = or i32 %x, 4294901760 ; 0xFFFF0000
39  %t1 = select i1 %cond, i32 %t0, i32 %x
40  %r = shl i32 %t1, 8
41  ret i32 %r
42}
43define i32 @or_nosignbit_select_shl(i32 %x, i1 %cond) {
44; CHECK-LABEL: @or_nosignbit_select_shl(
45; CHECK-NEXT:    [[TMP1:%.*]] = shl i32 [[X:%.*]], 8
46; CHECK-NEXT:    [[TMP2:%.*]] = or i32 [[TMP1]], -16777216
47; CHECK-NEXT:    [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP2]], i32 [[TMP1]]
48; CHECK-NEXT:    ret i32 [[R]]
49;
50  %t0 = or i32 %x, 2147418112 ; 0x7FFF0000
51  %t1 = select i1 %cond, i32 %t0, i32 %x
52  %r = shl i32 %t1, 8
53  ret i32 %r
54}
55
56define i32 @xor_signbit_select_shl(i32 %x, i1 %cond) {
57; CHECK-LABEL: @xor_signbit_select_shl(
58; CHECK-NEXT:    [[TMP1:%.*]] = shl i32 [[X:%.*]], 8
59; CHECK-NEXT:    [[TMP2:%.*]] = xor i32 [[TMP1]], -16777216
60; CHECK-NEXT:    [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP2]], i32 [[TMP1]]
61; CHECK-NEXT:    ret i32 [[R]]
62;
63  %t0 = xor i32 %x, 4294901760 ; 0xFFFF0000
64  %t1 = select i1 %cond, i32 %t0, i32 %x
65  %r = shl i32 %t1, 8
66  ret i32 %r
67}
68define i32 @xor_nosignbit_select_shl(i32 %x, i1 %cond) {
69; CHECK-LABEL: @xor_nosignbit_select_shl(
70; CHECK-NEXT:    [[TMP1:%.*]] = shl i32 [[X:%.*]], 8
71; CHECK-NEXT:    [[TMP2:%.*]] = xor i32 [[TMP1]], -16777216
72; CHECK-NEXT:    [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP2]], i32 [[TMP1]]
73; CHECK-NEXT:    ret i32 [[R]]
74;
75  %t0 = xor i32 %x, 2147418112 ; 0x7FFF0000
76  %t1 = select i1 %cond, i32 %t0, i32 %x
77  %r = shl i32 %t1, 8
78  ret i32 %r
79}
80
81define i32 @add_signbit_select_shl(i32 %x, i1 %cond) {
82; CHECK-LABEL: @add_signbit_select_shl(
83; CHECK-NEXT:    [[TMP1:%.*]] = shl i32 [[X:%.*]], 8
84; CHECK-NEXT:    [[TMP2:%.*]] = add i32 [[TMP1]], -16777216
85; CHECK-NEXT:    [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP2]], i32 [[TMP1]]
86; CHECK-NEXT:    ret i32 [[R]]
87;
88  %t0 = add i32 %x, 4294901760 ; 0xFFFF0000
89  %t1 = select i1 %cond, i32 %t0, i32 %x
90  %r = shl i32 %t1, 8
91  ret i32 %r
92}
93define i32 @add_nosignbit_select_shl(i32 %x, i1 %cond) {
94; CHECK-LABEL: @add_nosignbit_select_shl(
95; CHECK-NEXT:    [[TMP1:%.*]] = shl i32 [[X:%.*]], 8
96; CHECK-NEXT:    [[TMP2:%.*]] = add i32 [[TMP1]], -16777216
97; CHECK-NEXT:    [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP2]], i32 [[TMP1]]
98; CHECK-NEXT:    ret i32 [[R]]
99;
100  %t0 = add i32 %x, 2147418112 ; 0x7FFF0000
101  %t1 = select i1 %cond, i32 %t0, i32 %x
102  %r = shl i32 %t1, 8
103  ret i32 %r
104}
105
106; logical shift right
107
108define i32 @and_signbit_select_lshr(i32 %x, i1 %cond) {
109; CHECK-LABEL: @and_signbit_select_lshr(
110; CHECK-NEXT:    [[TMP1:%.*]] = lshr i32 [[X:%.*]], 8
111; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[TMP1]], 16776960
112; CHECK-NEXT:    [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP2]], i32 [[TMP1]]
113; CHECK-NEXT:    ret i32 [[R]]
114;
115  %t0 = and i32 %x, 4294901760 ; 0xFFFF0000
116  %t1 = select i1 %cond, i32 %t0, i32 %x
117  %r = lshr i32 %t1, 8
118  ret i32 %r
119}
120define i32 @and_nosignbit_select_lshr(i32 %x, i1 %cond) {
121; CHECK-LABEL: @and_nosignbit_select_lshr(
122; CHECK-NEXT:    [[TMP1:%.*]] = lshr i32 [[X:%.*]], 8
123; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[TMP1]], 8388352
124; CHECK-NEXT:    [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP2]], i32 [[TMP1]]
125; CHECK-NEXT:    ret i32 [[R]]
126;
127  %t0 = and i32 %x, 2147418112 ; 0x7FFF0000
128  %t1 = select i1 %cond, i32 %t0, i32 %x
129  %r = lshr i32 %t1, 8
130  ret i32 %r
131}
132
133define i32 @or_signbit_select_lshr(i32 %x, i1 %cond) {
134; CHECK-LABEL: @or_signbit_select_lshr(
135; CHECK-NEXT:    [[TMP1:%.*]] = lshr i32 [[X:%.*]], 8
136; CHECK-NEXT:    [[TMP2:%.*]] = or i32 [[TMP1]], 16776960
137; CHECK-NEXT:    [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP2]], i32 [[TMP1]]
138; CHECK-NEXT:    ret i32 [[R]]
139;
140  %t0 = or i32 %x, 4294901760 ; 0xFFFF0000
141  %t1 = select i1 %cond, i32 %t0, i32 %x
142  %r = lshr i32 %t1, 8
143  ret i32 %r
144}
145define i32 @or_nosignbit_select_lshr(i32 %x, i1 %cond) {
146; CHECK-LABEL: @or_nosignbit_select_lshr(
147; CHECK-NEXT:    [[TMP1:%.*]] = lshr i32 [[X:%.*]], 8
148; CHECK-NEXT:    [[TMP2:%.*]] = or i32 [[TMP1]], 8388352
149; CHECK-NEXT:    [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP2]], i32 [[TMP1]]
150; CHECK-NEXT:    ret i32 [[R]]
151;
152  %t0 = or i32 %x, 2147418112 ; 0x7FFF0000
153  %t1 = select i1 %cond, i32 %t0, i32 %x
154  %r = lshr i32 %t1, 8
155  ret i32 %r
156}
157
158define i32 @xor_signbit_select_lshr(i32 %x, i1 %cond) {
159; CHECK-LABEL: @xor_signbit_select_lshr(
160; CHECK-NEXT:    [[TMP1:%.*]] = lshr i32 [[X:%.*]], 8
161; CHECK-NEXT:    [[TMP2:%.*]] = xor i32 [[TMP1]], 16776960
162; CHECK-NEXT:    [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP2]], i32 [[TMP1]]
163; CHECK-NEXT:    ret i32 [[R]]
164;
165  %t0 = xor i32 %x, 4294901760 ; 0xFFFF0000
166  %t1 = select i1 %cond, i32 %t0, i32 %x
167  %r = lshr i32 %t1, 8
168  ret i32 %r
169}
170define i32 @xor_nosignbit_select_lshr(i32 %x, i1 %cond) {
171; CHECK-LABEL: @xor_nosignbit_select_lshr(
172; CHECK-NEXT:    [[TMP1:%.*]] = lshr i32 [[X:%.*]], 8
173; CHECK-NEXT:    [[TMP2:%.*]] = xor i32 [[TMP1]], 8388352
174; CHECK-NEXT:    [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP2]], i32 [[TMP1]]
175; CHECK-NEXT:    ret i32 [[R]]
176;
177  %t0 = xor i32 %x, 2147418112 ; 0x7FFF0000
178  %t1 = select i1 %cond, i32 %t0, i32 %x
179  %r = lshr i32 %t1, 8
180  ret i32 %r
181}
182
183define i32 @add_signbit_select_lshr(i32 %x, i1 %cond) {
184; CHECK-LABEL: @add_signbit_select_lshr(
185; CHECK-NEXT:    [[T0:%.*]] = add i32 [[X:%.*]], -65536
186; CHECK-NEXT:    [[T1:%.*]] = select i1 [[COND:%.*]], i32 [[T0]], i32 [[X]]
187; CHECK-NEXT:    [[R:%.*]] = lshr i32 [[T1]], 8
188; CHECK-NEXT:    ret i32 [[R]]
189;
190  %t0 = add i32 %x, 4294901760 ; 0xFFFF0000
191  %t1 = select i1 %cond, i32 %t0, i32 %x
192  %r = lshr i32 %t1, 8
193  ret i32 %r
194}
195define i32 @add_nosignbit_select_lshr(i32 %x, i1 %cond) {
196; CHECK-LABEL: @add_nosignbit_select_lshr(
197; CHECK-NEXT:    [[T0:%.*]] = add i32 [[X:%.*]], 2147418112
198; CHECK-NEXT:    [[T1:%.*]] = select i1 [[COND:%.*]], i32 [[T0]], i32 [[X]]
199; CHECK-NEXT:    [[R:%.*]] = lshr i32 [[T1]], 8
200; CHECK-NEXT:    ret i32 [[R]]
201;
202  %t0 = add i32 %x, 2147418112 ; 0x7FFF0000
203  %t1 = select i1 %cond, i32 %t0, i32 %x
204  %r = lshr i32 %t1, 8
205  ret i32 %r
206}
207
208; arithmetic shift right
209
210define i32 @and_signbit_select_ashr(i32 %x, i1 %cond) {
211; CHECK-LABEL: @and_signbit_select_ashr(
212; CHECK-NEXT:    [[TMP1:%.*]] = ashr i32 [[X:%.*]], 8
213; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[TMP1]], -256
214; CHECK-NEXT:    [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP2]], i32 [[TMP1]]
215; CHECK-NEXT:    ret i32 [[R]]
216;
217  %t0 = and i32 %x, 4294901760 ; 0xFFFF0000
218  %t1 = select i1 %cond, i32 %t0, i32 %x
219  %r = ashr i32 %t1, 8
220  ret i32 %r
221}
222define i32 @and_nosignbit_select_ashr(i32 %x, i1 %cond) {
223; CHECK-LABEL: @and_nosignbit_select_ashr(
224; CHECK-NEXT:    [[TMP1:%.*]] = ashr i32 [[X:%.*]], 8
225; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[TMP1]], 8388352
226; CHECK-NEXT:    [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP2]], i32 [[TMP1]]
227; CHECK-NEXT:    ret i32 [[R]]
228;
229  %t0 = and i32 %x, 2147418112 ; 0x7FFF0000
230  %t1 = select i1 %cond, i32 %t0, i32 %x
231  %r = ashr i32 %t1, 8
232  ret i32 %r
233}
234
235define i32 @or_signbit_select_ashr(i32 %x, i1 %cond) {
236; CHECK-LABEL: @or_signbit_select_ashr(
237; CHECK-NEXT:    [[TMP1:%.*]] = ashr i32 [[X:%.*]], 8
238; CHECK-NEXT:    [[TMP2:%.*]] = or i32 [[TMP1]], -256
239; CHECK-NEXT:    [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP2]], i32 [[TMP1]]
240; CHECK-NEXT:    ret i32 [[R]]
241;
242  %t0 = or i32 %x, 4294901760 ; 0xFFFF0000
243  %t1 = select i1 %cond, i32 %t0, i32 %x
244  %r = ashr i32 %t1, 8
245  ret i32 %r
246}
247define i32 @or_nosignbit_select_ashr(i32 %x, i1 %cond) {
248; CHECK-LABEL: @or_nosignbit_select_ashr(
249; CHECK-NEXT:    [[TMP1:%.*]] = ashr i32 [[X:%.*]], 8
250; CHECK-NEXT:    [[TMP2:%.*]] = or i32 [[TMP1]], 8388352
251; CHECK-NEXT:    [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP2]], i32 [[TMP1]]
252; CHECK-NEXT:    ret i32 [[R]]
253;
254  %t0 = or i32 %x, 2147418112 ; 0x7FFF0000
255  %t1 = select i1 %cond, i32 %t0, i32 %x
256  %r = ashr i32 %t1, 8
257  ret i32 %r
258}
259
260define i32 @xor_signbit_select_ashr(i32 %x, i1 %cond) {
261; CHECK-LABEL: @xor_signbit_select_ashr(
262; CHECK-NEXT:    [[TMP1:%.*]] = ashr i32 [[X:%.*]], 8
263; CHECK-NEXT:    [[TMP2:%.*]] = xor i32 [[TMP1]], -256
264; CHECK-NEXT:    [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP2]], i32 [[TMP1]]
265; CHECK-NEXT:    ret i32 [[R]]
266;
267  %t0 = xor i32 %x, 4294901760 ; 0xFFFF0000
268  %t1 = select i1 %cond, i32 %t0, i32 %x
269  %r = ashr i32 %t1, 8
270  ret i32 %r
271}
272define i32 @xor_nosignbit_select_ashr(i32 %x, i1 %cond) {
273; CHECK-LABEL: @xor_nosignbit_select_ashr(
274; CHECK-NEXT:    [[TMP1:%.*]] = ashr i32 [[X:%.*]], 8
275; CHECK-NEXT:    [[TMP2:%.*]] = xor i32 [[TMP1]], 8388352
276; CHECK-NEXT:    [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP2]], i32 [[TMP1]]
277; CHECK-NEXT:    ret i32 [[R]]
278;
279  %t0 = xor i32 %x, 2147418112 ; 0x7FFF0000
280  %t1 = select i1 %cond, i32 %t0, i32 %x
281  %r = ashr i32 %t1, 8
282  ret i32 %r
283}
284
285define i32 @add_signbit_select_ashr(i32 %x, i1 %cond) {
286; CHECK-LABEL: @add_signbit_select_ashr(
287; CHECK-NEXT:    [[T0:%.*]] = add i32 [[X:%.*]], -65536
288; CHECK-NEXT:    [[T1:%.*]] = select i1 [[COND:%.*]], i32 [[T0]], i32 [[X]]
289; CHECK-NEXT:    [[R:%.*]] = ashr i32 [[T1]], 8
290; CHECK-NEXT:    ret i32 [[R]]
291;
292  %t0 = add i32 %x, 4294901760 ; 0xFFFF0000
293  %t1 = select i1 %cond, i32 %t0, i32 %x
294  %r = ashr i32 %t1, 8
295  ret i32 %r
296}
297define i32 @add_nosignbit_select_ashr(i32 %x, i1 %cond) {
298; CHECK-LABEL: @add_nosignbit_select_ashr(
299; CHECK-NEXT:    [[T0:%.*]] = add i32 [[X:%.*]], 2147418112
300; CHECK-NEXT:    [[T1:%.*]] = select i1 [[COND:%.*]], i32 [[T0]], i32 [[X]]
301; CHECK-NEXT:    [[R:%.*]] = ashr i32 [[T1]], 8
302; CHECK-NEXT:    ret i32 [[R]]
303;
304  %t0 = add i32 %x, 2147418112 ; 0x7FFF0000
305  %t1 = select i1 %cond, i32 %t0, i32 %x
306  %r = ashr i32 %t1, 8
307  ret i32 %r
308}
309