1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -instcombine -S | FileCheck %s 3 4target datalayout = "n8:16:32:64" 5 6declare void @use(i8) 7declare void @use_vec(<2 x i8>) 8 9define i32 @select_icmp_eq_and_1_0_or_2(i32 %x, i32 %y) { 10; CHECK-LABEL: @select_icmp_eq_and_1_0_or_2( 11; CHECK-NEXT: [[AND:%.*]] = shl i32 [[X:%.*]], 1 12; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 2 13; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], [[Y:%.*]] 14; CHECK-NEXT: ret i32 [[TMP2]] 15; 16 %and = and i32 %x, 1 17 %cmp = icmp eq i32 %and, 0 18 %or = or i32 %y, 2 19 %select = select i1 %cmp, i32 %y, i32 %or 20 ret i32 %select 21} 22 23define <2 x i32> @select_icmp_eq_and_1_0_or_2_vec(<2 x i32> %x, <2 x i32> %y) { 24; CHECK-LABEL: @select_icmp_eq_and_1_0_or_2_vec( 25; CHECK-NEXT: [[AND:%.*]] = shl <2 x i32> [[X:%.*]], <i32 1, i32 1> 26; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[AND]], <i32 2, i32 2> 27; CHECK-NEXT: [[TMP2:%.*]] = or <2 x i32> [[TMP1]], [[Y:%.*]] 28; CHECK-NEXT: ret <2 x i32> [[TMP2]] 29; 30 %and = and <2 x i32> %x, <i32 1, i32 1> 31 %cmp = icmp eq <2 x i32> %and, zeroinitializer 32 %or = or <2 x i32> %y, <i32 2, i32 2> 33 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 34 ret <2 x i32> %select 35} 36 37define i32 @select_icmp_eq_and_1_0_xor_2(i32 %x, i32 %y) { 38; CHECK-LABEL: @select_icmp_eq_and_1_0_xor_2( 39; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 40; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 41; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2 42; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 43; CHECK-NEXT: ret i32 [[SELECT]] 44; 45 %and = and i32 %x, 1 46 %cmp = icmp eq i32 %and, 0 47 %xor = xor i32 %y, 2 48 %select = select i1 %cmp, i32 %y, i32 %xor 49 ret i32 %select 50} 51 52define i32 @select_icmp_eq_and_1_0_and_not_2(i32 %x, i32 %y) { 53; CHECK-LABEL: @select_icmp_eq_and_1_0_and_not_2( 54; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 55; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 56; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -3 57; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 58; CHECK-NEXT: ret i32 [[SELECT]] 59; 60 %and = and i32 %x, 1 61 %cmp = icmp eq i32 %and, 0 62 %and2 = and i32 %y, -3 63 %select = select i1 %cmp, i32 %y, i32 %and2 64 ret i32 %select 65} 66 67define i32 @select_icmp_eq_and_32_0_or_8(i32 %x, i32 %y) { 68; CHECK-LABEL: @select_icmp_eq_and_32_0_or_8( 69; CHECK-NEXT: [[AND:%.*]] = lshr i32 [[X:%.*]], 2 70; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 8 71; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], [[Y:%.*]] 72; CHECK-NEXT: ret i32 [[TMP2]] 73; 74 %and = and i32 %x, 32 75 %cmp = icmp eq i32 %and, 0 76 %or = or i32 %y, 8 77 %select = select i1 %cmp, i32 %y, i32 %or 78 ret i32 %select 79} 80 81define <2 x i32> @select_icmp_eq_and_32_0_or_8_vec(<2 x i32> %x, <2 x i32> %y) { 82; CHECK-LABEL: @select_icmp_eq_and_32_0_or_8_vec( 83; CHECK-NEXT: [[AND:%.*]] = lshr <2 x i32> [[X:%.*]], <i32 2, i32 2> 84; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[AND]], <i32 8, i32 8> 85; CHECK-NEXT: [[TMP2:%.*]] = or <2 x i32> [[TMP1]], [[Y:%.*]] 86; CHECK-NEXT: ret <2 x i32> [[TMP2]] 87; 88 %and = and <2 x i32> %x, <i32 32, i32 32> 89 %cmp = icmp eq <2 x i32> %and, zeroinitializer 90 %or = or <2 x i32> %y, <i32 8, i32 8> 91 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 92 ret <2 x i32> %select 93} 94 95define i32 @select_icmp_eq_and_32_0_xor_8(i32 %x, i32 %y) { 96; CHECK-LABEL: @select_icmp_eq_and_32_0_xor_8( 97; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 32 98; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 99; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 8 100; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 101; CHECK-NEXT: ret i32 [[SELECT]] 102; 103 %and = and i32 %x, 32 104 %cmp = icmp eq i32 %and, 0 105 %xor = xor i32 %y, 8 106 %select = select i1 %cmp, i32 %y, i32 %xor 107 ret i32 %select 108} 109 110define i32 @select_icmp_eq_and_32_0_and_not_8(i32 %x, i32 %y) { 111; CHECK-LABEL: @select_icmp_eq_and_32_0_and_not_8( 112; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 32 113; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 114; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -9 115; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 116; CHECK-NEXT: ret i32 [[SELECT]] 117; 118 %and = and i32 %x, 32 119 %cmp = icmp eq i32 %and, 0 120 %and2 = and i32 %y, -9 121 %select = select i1 %cmp, i32 %y, i32 %and2 122 ret i32 %select 123} 124 125define i32 @select_icmp_ne_0_and_4096_or_4096(i32 %x, i32 %y) { 126; CHECK-LABEL: @select_icmp_ne_0_and_4096_or_4096( 127; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 128; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[AND]], 4096 129; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], [[Y:%.*]] 130; CHECK-NEXT: ret i32 [[TMP2]] 131; 132 %and = and i32 %x, 4096 133 %cmp = icmp ne i32 0, %and 134 %or = or i32 %y, 4096 135 %select = select i1 %cmp, i32 %y, i32 %or 136 ret i32 %select 137} 138 139define <2 x i32> @select_icmp_ne_0_and_4096_or_4096_vec(<2 x i32> %x, <2 x i32> %y) { 140; CHECK-LABEL: @select_icmp_ne_0_and_4096_or_4096_vec( 141; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], <i32 4096, i32 4096> 142; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[AND]], <i32 4096, i32 4096> 143; CHECK-NEXT: [[TMP2:%.*]] = or <2 x i32> [[TMP1]], [[Y:%.*]] 144; CHECK-NEXT: ret <2 x i32> [[TMP2]] 145; 146 %and = and <2 x i32> %x, <i32 4096, i32 4096> 147 %cmp = icmp ne <2 x i32> zeroinitializer, %and 148 %or = or <2 x i32> %y, <i32 4096, i32 4096> 149 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 150 ret <2 x i32> %select 151} 152 153define i32 @select_icmp_ne_0_and_4096_xor_4096(i32 %x, i32 %y) { 154; CHECK-LABEL: @select_icmp_ne_0_and_4096_xor_4096( 155; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 156; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 157; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 4096 158; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[XOR]], i32 [[Y]] 159; CHECK-NEXT: ret i32 [[SELECT]] 160; 161 %and = and i32 %x, 4096 162 %cmp = icmp ne i32 0, %and 163 %xor = xor i32 %y, 4096 164 %select = select i1 %cmp, i32 %y, i32 %xor 165 ret i32 %select 166} 167 168define i32 @select_icmp_ne_0_and_4096_and_not_4096(i32 %x, i32 %y) { 169; CHECK-LABEL: @select_icmp_ne_0_and_4096_and_not_4096( 170; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 171; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 172; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 173; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[AND2]], i32 [[Y]] 174; CHECK-NEXT: ret i32 [[SELECT]] 175; 176 %and = and i32 %x, 4096 177 %cmp = icmp ne i32 0, %and 178 %and2 = and i32 %y, -4097 179 %select = select i1 %cmp, i32 %y, i32 %and2 180 ret i32 %select 181} 182 183define i32 @select_icmp_eq_and_4096_0_or_4096(i32 %x, i32 %y) { 184; CHECK-LABEL: @select_icmp_eq_and_4096_0_or_4096( 185; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 186; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[AND]], [[Y:%.*]] 187; CHECK-NEXT: ret i32 [[TMP1]] 188; 189 %and = and i32 %x, 4096 190 %cmp = icmp eq i32 %and, 0 191 %or = or i32 %y, 4096 192 %select = select i1 %cmp, i32 %y, i32 %or 193 ret i32 %select 194} 195 196define <2 x i32> @select_icmp_eq_and_4096_0_or_4096_vec(<2 x i32> %x, <2 x i32> %y) { 197; CHECK-LABEL: @select_icmp_eq_and_4096_0_or_4096_vec( 198; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], <i32 4096, i32 4096> 199; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i32> [[AND]], [[Y:%.*]] 200; CHECK-NEXT: ret <2 x i32> [[TMP1]] 201; 202 %and = and <2 x i32> %x, <i32 4096, i32 4096> 203 %cmp = icmp eq <2 x i32> %and, zeroinitializer 204 %or = or <2 x i32> %y, <i32 4096, i32 4096> 205 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 206 ret <2 x i32> %select 207} 208 209define i32 @select_icmp_eq_and_4096_0_xor_4096(i32 %x, i32 %y) { 210; CHECK-LABEL: @select_icmp_eq_and_4096_0_xor_4096( 211; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 212; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 213; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 4096 214; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 215; CHECK-NEXT: ret i32 [[SELECT]] 216; 217 %and = and i32 %x, 4096 218 %cmp = icmp eq i32 %and, 0 219 %xor = xor i32 %y, 4096 220 %select = select i1 %cmp, i32 %y, i32 %xor 221 ret i32 %select 222} 223 224define i32 @select_icmp_eq_and_4096_0_and_not_4096(i32 %x, i32 %y) { 225; CHECK-LABEL: @select_icmp_eq_and_4096_0_and_not_4096( 226; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 227; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 228; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 229; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 230; CHECK-NEXT: ret i32 [[SELECT]] 231; 232 %and = and i32 %x, 4096 233 %cmp = icmp eq i32 %and, 0 234 %and2 = and i32 %y, -4097 235 %select = select i1 %cmp, i32 %y, i32 %and2 236 ret i32 %select 237} 238 239define i32 @select_icmp_eq_0_and_1_or_1(i64 %x, i32 %y) { 240; CHECK-LABEL: @select_icmp_eq_0_and_1_or_1( 241; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[X:%.*]] to i32 242; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 1 243; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP2]], [[Y:%.*]] 244; CHECK-NEXT: ret i32 [[TMP3]] 245; 246 %and = and i64 %x, 1 247 %cmp = icmp eq i64 %and, 0 248 %or = or i32 %y, 1 249 %select = select i1 %cmp, i32 %y, i32 %or 250 ret i32 %select 251} 252 253define <2 x i32> @select_icmp_eq_0_and_1_or_1_vec(<2 x i64> %x, <2 x i32> %y) { 254; CHECK-LABEL: @select_icmp_eq_0_and_1_or_1_vec( 255; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i64> [[X:%.*]] to <2 x i32> 256; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i32> [[TMP1]], <i32 1, i32 1> 257; CHECK-NEXT: [[TMP3:%.*]] = or <2 x i32> [[TMP2]], [[Y:%.*]] 258; CHECK-NEXT: ret <2 x i32> [[TMP3]] 259; 260 %and = and <2 x i64> %x, <i64 1, i64 1> 261 %cmp = icmp eq <2 x i64> %and, zeroinitializer 262 %or = or <2 x i32> %y, <i32 1, i32 1> 263 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 264 ret <2 x i32> %select 265} 266 267define i32 @select_icmp_eq_0_and_1_xor_1(i64 %x, i32 %y) { 268; CHECK-LABEL: @select_icmp_eq_0_and_1_xor_1( 269; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[X:%.*]] to i32 270; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 1 271; CHECK-NEXT: [[SELECT:%.*]] = xor i32 [[TMP2]], [[Y:%.*]] 272; CHECK-NEXT: ret i32 [[SELECT]] 273; 274 %and = and i64 %x, 1 275 %cmp = icmp eq i64 %and, 0 276 %xor = xor i32 %y, 1 277 %select = select i1 %cmp, i32 %y, i32 %xor 278 ret i32 %select 279} 280 281define i32 @select_icmp_eq_0_and_1_and_not_1(i64 %x, i32 %y) { 282; CHECK-LABEL: @select_icmp_eq_0_and_1_and_not_1( 283; CHECK-NEXT: [[AND:%.*]] = and i64 [[X:%.*]], 1 284; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[AND]], 0 285; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -2 286; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 287; CHECK-NEXT: ret i32 [[SELECT]] 288; 289 %and = and i64 %x, 1 290 %cmp = icmp eq i64 %and, 0 291 %and2 = and i32 %y, -2 292 %select = select i1 %cmp, i32 %y, i32 %and2 293 ret i32 %select 294} 295 296define i32 @select_icmp_ne_0_and_4096_or_32(i32 %x, i32 %y) { 297; CHECK-LABEL: @select_icmp_ne_0_and_4096_or_32( 298; CHECK-NEXT: [[AND:%.*]] = lshr i32 [[X:%.*]], 7 299; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 32 300; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], 32 301; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP2]], [[Y:%.*]] 302; CHECK-NEXT: ret i32 [[TMP3]] 303; 304 %and = and i32 %x, 4096 305 %cmp = icmp ne i32 0, %and 306 %or = or i32 %y, 32 307 %select = select i1 %cmp, i32 %y, i32 %or 308 ret i32 %select 309} 310 311define i32 @select_icmp_ne_0_and_4096_xor_32(i32 %x, i32 %y) { 312; CHECK-LABEL: @select_icmp_ne_0_and_4096_xor_32( 313; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 314; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 315; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 32 316; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[XOR]], i32 [[Y]] 317; CHECK-NEXT: ret i32 [[SELECT]] 318; 319 %and = and i32 %x, 4096 320 %cmp = icmp ne i32 0, %and 321 %xor = xor i32 %y, 32 322 %select = select i1 %cmp, i32 %y, i32 %xor 323 ret i32 %select 324} 325 326define i32 @select_icmp_ne_0_and_4096_and_not_32(i32 %x, i32 %y) { 327; CHECK-LABEL: @select_icmp_ne_0_and_4096_and_not_32( 328; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 329; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 330; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -33 331; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[AND2]], i32 [[Y]] 332; CHECK-NEXT: ret i32 [[SELECT]] 333; 334 %and = and i32 %x, 4096 335 %cmp = icmp ne i32 0, %and 336 %and2 = and i32 %y, -33 337 %select = select i1 %cmp, i32 %y, i32 %and2 338 ret i32 %select 339} 340 341define i32 @select_icmp_ne_0_and_32_or_4096(i32 %x, i32 %y) { 342; CHECK-LABEL: @select_icmp_ne_0_and_32_or_4096( 343; CHECK-NEXT: [[AND:%.*]] = shl i32 [[X:%.*]], 7 344; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 4096 345; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], 4096 346; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP2]], [[Y:%.*]] 347; CHECK-NEXT: ret i32 [[TMP3]] 348; 349 %and = and i32 %x, 32 350 %cmp = icmp ne i32 0, %and 351 %or = or i32 %y, 4096 352 %select = select i1 %cmp, i32 %y, i32 %or 353 ret i32 %select 354} 355 356define <2 x i32> @select_icmp_ne_0_and_32_or_4096_vec(<2 x i32> %x, <2 x i32> %y) { 357; CHECK-LABEL: @select_icmp_ne_0_and_32_or_4096_vec( 358; CHECK-NEXT: [[AND:%.*]] = shl <2 x i32> [[X:%.*]], <i32 7, i32 7> 359; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[AND]], <i32 4096, i32 4096> 360; CHECK-NEXT: [[TMP2:%.*]] = xor <2 x i32> [[TMP1]], <i32 4096, i32 4096> 361; CHECK-NEXT: [[TMP3:%.*]] = or <2 x i32> [[TMP2]], [[Y:%.*]] 362; CHECK-NEXT: ret <2 x i32> [[TMP3]] 363; 364 %and = and <2 x i32> %x, <i32 32, i32 32> 365 %cmp = icmp ne <2 x i32> zeroinitializer, %and 366 %or = or <2 x i32> %y, <i32 4096, i32 4096> 367 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 368 ret <2 x i32> %select 369} 370 371define i32 @select_icmp_ne_0_and_32_xor_4096(i32 %x, i32 %y) { 372; CHECK-LABEL: @select_icmp_ne_0_and_32_xor_4096( 373; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 32 374; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 375; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 4096 376; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[XOR]], i32 [[Y]] 377; CHECK-NEXT: ret i32 [[SELECT]] 378; 379 %and = and i32 %x, 32 380 %cmp = icmp ne i32 0, %and 381 %xor = xor i32 %y, 4096 382 %select = select i1 %cmp, i32 %y, i32 %xor 383 ret i32 %select 384} 385 386define i32 @select_icmp_ne_0_and_32_and_not_4096(i32 %x, i32 %y) { 387; CHECK-LABEL: @select_icmp_ne_0_and_32_and_not_4096( 388; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 32 389; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 390; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 391; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[AND2]], i32 [[Y]] 392; CHECK-NEXT: ret i32 [[SELECT]] 393; 394 %and = and i32 %x, 32 395 %cmp = icmp ne i32 0, %and 396 %and2 = and i32 %y, -4097 397 %select = select i1 %cmp, i32 %y, i32 %and2 398 ret i32 %select 399} 400 401define i8 @select_icmp_ne_0_and_1073741824_or_8(i32 %x, i8 %y) { 402; CHECK-LABEL: @select_icmp_ne_0_and_1073741824_or_8( 403; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1073741824 404; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 405; CHECK-NEXT: [[OR:%.*]] = or i8 [[Y:%.*]], 8 406; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i8 [[OR]], i8 [[Y]] 407; CHECK-NEXT: ret i8 [[SELECT]] 408; 409 %and = and i32 %x, 1073741824 410 %cmp = icmp ne i32 0, %and 411 %or = or i8 %y, 8 412 %select = select i1 %cmp, i8 %y, i8 %or 413 ret i8 %select 414} 415 416define i8 @select_icmp_ne_0_and_1073741824_xor_8(i32 %x, i8 %y) { 417; CHECK-LABEL: @select_icmp_ne_0_and_1073741824_xor_8( 418; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1073741824 419; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 420; CHECK-NEXT: [[XOR:%.*]] = xor i8 [[Y:%.*]], 8 421; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i8 [[XOR]], i8 [[Y]] 422; CHECK-NEXT: ret i8 [[SELECT]] 423; 424 %and = and i32 %x, 1073741824 425 %cmp = icmp ne i32 0, %and 426 %xor = xor i8 %y, 8 427 %select = select i1 %cmp, i8 %y, i8 %xor 428 ret i8 %select 429} 430 431define i8 @select_icmp_ne_0_and_1073741824_and_not_8(i32 %x, i8 %y) { 432; CHECK-LABEL: @select_icmp_ne_0_and_1073741824_and_not_8( 433; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1073741824 434; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 435; CHECK-NEXT: [[AND2:%.*]] = and i8 [[Y:%.*]], -9 436; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i8 [[AND2]], i8 [[Y]] 437; CHECK-NEXT: ret i8 [[SELECT]] 438; 439 %and = and i32 %x, 1073741824 440 %cmp = icmp ne i32 0, %and 441 %and2 = and i8 %y, -9 442 %select = select i1 %cmp, i8 %y, i8 %and2 443 ret i8 %select 444} 445 446define i32 @select_icmp_ne_0_and_8_or_1073741824(i8 %x, i32 %y) { 447; CHECK-LABEL: @select_icmp_ne_0_and_8_or_1073741824( 448; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], 8 449; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i8 [[AND]], 0 450; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 1073741824 451; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[OR]], i32 [[Y]] 452; CHECK-NEXT: ret i32 [[SELECT]] 453; 454 %and = and i8 %x, 8 455 %cmp = icmp ne i8 0, %and 456 %or = or i32 %y, 1073741824 457 %select = select i1 %cmp, i32 %y, i32 %or 458 ret i32 %select 459} 460 461define i32 @select_icmp_ne_0_and_8_xor_1073741824(i8 %x, i32 %y) { 462; CHECK-LABEL: @select_icmp_ne_0_and_8_xor_1073741824( 463; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], 8 464; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i8 [[AND]], 0 465; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 1073741824 466; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[XOR]], i32 [[Y]] 467; CHECK-NEXT: ret i32 [[SELECT]] 468; 469 %and = and i8 %x, 8 470 %cmp = icmp ne i8 0, %and 471 %xor = xor i32 %y, 1073741824 472 %select = select i1 %cmp, i32 %y, i32 %xor 473 ret i32 %select 474} 475 476define i32 @select_icmp_ne_0_and_8_and_not_1073741824(i8 %x, i32 %y) { 477; CHECK-LABEL: @select_icmp_ne_0_and_8_and_not_1073741824( 478; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], 8 479; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i8 [[AND]], 0 480; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -1073741825 481; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[AND2]], i32 [[Y]] 482; CHECK-NEXT: ret i32 [[SELECT]] 483; 484 %and = and i8 %x, 8 485 %cmp = icmp ne i8 0, %and 486 %and2 = and i32 %y, -1073741825 487 %select = select i1 %cmp, i32 %y, i32 %and2 488 ret i32 %select 489} 490 491; We can't combine here, because the cmp is scalar and the or vector. 492; Just make sure we don't assert. 493define <2 x i32> @select_icmp_eq_and_1_0_or_vector_of_2s(i32 %x, <2 x i32> %y) { 494; CHECK-LABEL: @select_icmp_eq_and_1_0_or_vector_of_2s( 495; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 496; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 497; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[Y:%.*]], <i32 2, i32 2> 498; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], <2 x i32> [[Y]], <2 x i32> [[OR]] 499; CHECK-NEXT: ret <2 x i32> [[SELECT]] 500; 501 %and = and i32 %x, 1 502 %cmp = icmp eq i32 %and, 0 503 %or = or <2 x i32> %y, <i32 2, i32 2> 504 %select = select i1 %cmp, <2 x i32> %y, <2 x i32> %or 505 ret <2 x i32> %select 506} 507 508define i32 @select_icmp_and_8_ne_0_xor_8(i32 %x) { 509; CHECK-LABEL: @select_icmp_and_8_ne_0_xor_8( 510; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -9 511; CHECK-NEXT: ret i32 [[TMP1]] 512; 513 %and = and i32 %x, 8 514 %cmp = icmp eq i32 %and, 0 515 %xor = xor i32 %x, 8 516 %x.xor = select i1 %cmp, i32 %x, i32 %xor 517 ret i32 %x.xor 518} 519 520define i32 @select_icmp_and_8_eq_0_xor_8(i32 %x) { 521; CHECK-LABEL: @select_icmp_and_8_eq_0_xor_8( 522; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[X:%.*]], 8 523; CHECK-NEXT: ret i32 [[TMP1]] 524; 525 %and = and i32 %x, 8 526 %cmp = icmp eq i32 %and, 0 527 %xor = xor i32 %x, 8 528 %xor.x = select i1 %cmp, i32 %xor, i32 %x 529 ret i32 %xor.x 530} 531 532define i64 @select_icmp_x_and_8_eq_0_y_xor_8(i32 %x, i64 %y) { 533; CHECK-LABEL: @select_icmp_x_and_8_eq_0_y_xor_8( 534; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 8 535; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 536; CHECK-NEXT: [[XOR:%.*]] = xor i64 [[Y:%.*]], 8 537; CHECK-NEXT: [[Y_XOR:%.*]] = select i1 [[CMP]], i64 [[Y]], i64 [[XOR]] 538; CHECK-NEXT: ret i64 [[Y_XOR]] 539; 540 %and = and i32 %x, 8 541 %cmp = icmp eq i32 %and, 0 542 %xor = xor i64 %y, 8 543 %y.xor = select i1 %cmp, i64 %y, i64 %xor 544 ret i64 %y.xor 545} 546 547define i64 @select_icmp_x_and_8_ne_0_y_xor_8(i32 %x, i64 %y) { 548; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_xor_8( 549; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 8 550; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 551; CHECK-NEXT: [[XOR:%.*]] = xor i64 [[Y:%.*]], 8 552; CHECK-NEXT: [[XOR_Y:%.*]] = select i1 [[CMP]], i64 [[XOR]], i64 [[Y]] 553; CHECK-NEXT: ret i64 [[XOR_Y]] 554; 555 %and = and i32 %x, 8 556 %cmp = icmp eq i32 %and, 0 557 %xor = xor i64 %y, 8 558 %xor.y = select i1 %cmp, i64 %xor, i64 %y 559 ret i64 %xor.y 560} 561 562define i64 @select_icmp_x_and_8_ne_0_y_or_8(i32 %x, i64 %y) { 563; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_or_8( 564; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 8 565; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[AND]], 8 566; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 567; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP2]], [[Y:%.*]] 568; CHECK-NEXT: ret i64 [[TMP3]] 569; 570 %and = and i32 %x, 8 571 %cmp = icmp eq i32 %and, 0 572 %or = or i64 %y, 8 573 %or.y = select i1 %cmp, i64 %or, i64 %y 574 ret i64 %or.y 575} 576 577define <2 x i64> @select_icmp_x_and_8_ne_0_y_or_8_vec(<2 x i32> %x, <2 x i64> %y) { 578; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_or_8_vec( 579; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], <i32 8, i32 8> 580; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[AND]], <i32 8, i32 8> 581; CHECK-NEXT: [[TMP2:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64> 582; CHECK-NEXT: [[TMP3:%.*]] = or <2 x i64> [[TMP2]], [[Y:%.*]] 583; CHECK-NEXT: ret <2 x i64> [[TMP3]] 584; 585 %and = and <2 x i32> %x, <i32 8, i32 8> 586 %cmp = icmp eq <2 x i32> %and, zeroinitializer 587 %or = or <2 x i64> %y, <i64 8, i64 8> 588 %or.y = select <2 x i1> %cmp, <2 x i64> %or, <2 x i64> %y 589 ret <2 x i64> %or.y 590} 591 592define i64 @select_icmp_x_and_8_ne_0_y_and_not_8(i32 %x, i64 %y) { 593; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_and_not_8( 594; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 8 595; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 596; CHECK-NEXT: [[AND2:%.*]] = and i64 [[Y:%.*]], -9 597; CHECK-NEXT: [[AND_Y:%.*]] = select i1 [[CMP]], i64 [[AND2]], i64 [[Y]] 598; CHECK-NEXT: ret i64 [[AND_Y]] 599; 600 %and = and i32 %x, 8 601 %cmp = icmp eq i32 %and, 0 602 %and2 = and i64 %y, -9 603 %and.y = select i1 %cmp, i64 %and2, i64 %y 604 ret i64 %and.y 605} 606 607define i32 @select_icmp_and_2147483648_ne_0_xor_2147483648(i32 %x) { 608; CHECK-LABEL: @select_icmp_and_2147483648_ne_0_xor_2147483648( 609; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 2147483647 610; CHECK-NEXT: ret i32 [[TMP1]] 611; 612 %and = and i32 %x, 2147483648 613 %cmp = icmp eq i32 %and, 0 614 %xor = xor i32 %x, 2147483648 615 %x.xor = select i1 %cmp, i32 %x, i32 %xor 616 ret i32 %x.xor 617} 618 619define i32 @select_icmp_and_2147483648_eq_0_xor_2147483648(i32 %x) { 620; CHECK-LABEL: @select_icmp_and_2147483648_eq_0_xor_2147483648( 621; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[X:%.*]], -2147483648 622; CHECK-NEXT: ret i32 [[TMP1]] 623; 624 %and = and i32 %x, 2147483648 625 %cmp = icmp eq i32 %and, 0 626 %xor = xor i32 %x, 2147483648 627 %xor.x = select i1 %cmp, i32 %xor, i32 %x 628 ret i32 %xor.x 629} 630 631define i32 @select_icmp_x_and_2147483648_ne_0_or_2147483648(i32 %x) { 632; CHECK-LABEL: @select_icmp_x_and_2147483648_ne_0_or_2147483648( 633; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], -2147483648 634; CHECK-NEXT: ret i32 [[OR]] 635; 636 %and = and i32 %x, 2147483648 637 %cmp = icmp eq i32 %and, 0 638 %or = or i32 %x, 2147483648 639 %or.x = select i1 %cmp, i32 %or, i32 %x 640 ret i32 %or.x 641} 642 643define i32 @test68(i32 %x, i32 %y) { 644; CHECK-LABEL: @test68( 645; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[X:%.*]], 6 646; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 2 647; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP2]], [[Y:%.*]] 648; CHECK-NEXT: ret i32 [[TMP3]] 649; 650 %and = and i32 %x, 128 651 %cmp = icmp eq i32 %and, 0 652 %or = or i32 %y, 2 653 %select = select i1 %cmp, i32 %y, i32 %or 654 ret i32 %select 655} 656 657define <2 x i32> @test68vec(<2 x i32> %x, <2 x i32> %y) { 658; CHECK-LABEL: @test68vec( 659; CHECK-NEXT: [[TMP1:%.*]] = lshr <2 x i32> [[X:%.*]], <i32 6, i32 6> 660; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i32> [[TMP1]], <i32 2, i32 2> 661; CHECK-NEXT: [[TMP3:%.*]] = or <2 x i32> [[TMP2]], [[Y:%.*]] 662; CHECK-NEXT: ret <2 x i32> [[TMP3]] 663; 664 %and = and <2 x i32> %x, <i32 128, i32 128> 665 %cmp = icmp eq <2 x i32> %and, zeroinitializer 666 %or = or <2 x i32> %y, <i32 2, i32 2> 667 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 668 ret <2 x i32> %select 669} 670 671define i32 @test68_xor(i32 %x, i32 %y) { 672; CHECK-LABEL: @test68_xor( 673; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i8 674; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[TMP1]], -1 675; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2 676; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 677; CHECK-NEXT: ret i32 [[SELECT]] 678; 679 %and = and i32 %x, 128 680 %cmp = icmp eq i32 %and, 0 681 %xor = xor i32 %y, 2 682 %select = select i1 %cmp, i32 %y, i32 %xor 683 ret i32 %select 684} 685 686define i32 @test68_and(i32 %x, i32 %y) { 687; CHECK-LABEL: @test68_and( 688; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i8 689; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[TMP1]], -1 690; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -3 691; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 692; CHECK-NEXT: ret i32 [[SELECT]] 693; 694 %and = and i32 %x, 128 695 %cmp = icmp eq i32 %and, 0 696 %and2 = and i32 %y, -3 697 %select = select i1 %cmp, i32 %y, i32 %and2 698 ret i32 %select 699} 700 701define i32 @test69(i32 %x, i32 %y) { 702; CHECK-LABEL: @test69( 703; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[X:%.*]], 6 704; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 2 705; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP2]], 2 706; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP3]], [[Y:%.*]] 707; CHECK-NEXT: ret i32 [[TMP4]] 708; 709 %and = and i32 %x, 128 710 %cmp = icmp ne i32 %and, 0 711 %or = or i32 %y, 2 712 %select = select i1 %cmp, i32 %y, i32 %or 713 ret i32 %select 714} 715 716define <2 x i32> @test69vec(<2 x i32> %x, <2 x i32> %y) { 717; CHECK-LABEL: @test69vec( 718; CHECK-NEXT: [[TMP1:%.*]] = lshr <2 x i32> [[X:%.*]], <i32 6, i32 6> 719; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i32> [[TMP1]], <i32 2, i32 2> 720; CHECK-NEXT: [[TMP3:%.*]] = xor <2 x i32> [[TMP2]], <i32 2, i32 2> 721; CHECK-NEXT: [[TMP4:%.*]] = or <2 x i32> [[TMP3]], [[Y:%.*]] 722; CHECK-NEXT: ret <2 x i32> [[TMP4]] 723; 724 %and = and <2 x i32> %x, <i32 128, i32 128> 725 %cmp = icmp ne <2 x i32> %and, zeroinitializer 726 %or = or <2 x i32> %y, <i32 2, i32 2> 727 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 728 ret <2 x i32> %select 729} 730 731define i32 @test69_xor(i32 %x, i32 %y) { 732; CHECK-LABEL: @test69_xor( 733; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i8 734; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp sgt i8 [[TMP1]], -1 735; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2 736; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[XOR]], i32 [[Y]] 737; CHECK-NEXT: ret i32 [[SELECT]] 738; 739 %and = and i32 %x, 128 740 %cmp = icmp ne i32 %and, 0 741 %xor = xor i32 %y, 2 742 %select = select i1 %cmp, i32 %y, i32 %xor 743 ret i32 %select 744} 745 746define i32 @test69_and(i32 %x, i32 %y) { 747; CHECK-LABEL: @test69_and( 748; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i8 749; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp sgt i8 [[TMP1]], -1 750; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], 2 751; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[AND2]], i32 [[Y]] 752; CHECK-NEXT: ret i32 [[SELECT]] 753; 754 %and = and i32 %x, 128 755 %cmp = icmp ne i32 %and, 0 756 %and2 = and i32 %y, 2 757 %select = select i1 %cmp, i32 %y, i32 %and2 758 ret i32 %select 759} 760 761define i8 @test70(i8 %x, i8 %y) { 762; CHECK-LABEL: @test70( 763; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 0 764; CHECK-NEXT: [[OR:%.*]] = or i8 [[Y:%.*]], 2 765; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i8 [[OR]], i8 [[Y]] 766; CHECK-NEXT: ret i8 [[SELECT]] 767; 768 %cmp = icmp slt i8 %x, 0 769 %or = or i8 %y, 2 770 %select = select i1 %cmp, i8 %or, i8 %y 771 ret i8 %select 772} 773 774define i32 @shift_no_xor_multiuse_or(i32 %x, i32 %y) { 775; CHECK-LABEL: @shift_no_xor_multiuse_or( 776; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 2 777; CHECK-NEXT: [[AND:%.*]] = shl i32 [[X:%.*]], 1 778; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 2 779; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], [[Y]] 780; CHECK-NEXT: [[RES:%.*]] = mul i32 [[TMP2]], [[OR]] 781; CHECK-NEXT: ret i32 [[RES]] 782; 783 %and = and i32 %x, 1 784 %cmp = icmp eq i32 %and, 0 785 %or = or i32 %y, 2 786 %select = select i1 %cmp, i32 %y, i32 %or 787 %res = mul i32 %select, %or ; to bump up use count of the Or 788 ret i32 %res 789} 790 791define i32 @shift_no_xor_multiuse_xor(i32 %x, i32 %y) { 792; CHECK-LABEL: @shift_no_xor_multiuse_xor( 793; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 794; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 795; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2 796; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 797; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[XOR]] 798; CHECK-NEXT: ret i32 [[RES]] 799; 800 %and = and i32 %x, 1 801 %cmp = icmp eq i32 %and, 0 802 %xor = xor i32 %y, 2 803 %select = select i1 %cmp, i32 %y, i32 %xor 804 %res = mul i32 %select, %xor ; to bump up use count of the Xor 805 ret i32 %res 806} 807 808define i32 @shift_no_xor_multiuse_and(i32 %x, i32 %y) { 809; CHECK-LABEL: @shift_no_xor_multiuse_and( 810; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 811; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 812; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -3 813; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 814; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[AND2]] 815; CHECK-NEXT: ret i32 [[RES]] 816; 817 %and = and i32 %x, 1 818 %cmp = icmp eq i32 %and, 0 819 %and2 = and i32 %y, -3 820 %select = select i1 %cmp, i32 %y, i32 %and2 821 %res = mul i32 %select, %and2 ; to bump up use count of the And 822 ret i32 %res 823} 824 825define i32 @no_shift_no_xor_multiuse_or(i32 %x, i32 %y) { 826; CHECK-LABEL: @no_shift_no_xor_multiuse_or( 827; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 828; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 4096 829; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[AND]], [[Y]] 830; CHECK-NEXT: [[RES:%.*]] = mul i32 [[TMP1]], [[OR]] 831; CHECK-NEXT: ret i32 [[RES]] 832; 833 %and = and i32 %x, 4096 834 %cmp = icmp eq i32 %and, 0 835 %or = or i32 %y, 4096 836 %select = select i1 %cmp, i32 %y, i32 %or 837 %res = mul i32 %select, %or ; to bump up use count of the Or 838 ret i32 %res 839} 840 841define i32 @no_shift_no_xor_multiuse_xor(i32 %x, i32 %y) { 842; CHECK-LABEL: @no_shift_no_xor_multiuse_xor( 843; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 844; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 845; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 4096 846; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 847; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[XOR]] 848; CHECK-NEXT: ret i32 [[RES]] 849; 850 %and = and i32 %x, 4096 851 %cmp = icmp eq i32 %and, 0 852 %xor = xor i32 %y, 4096 853 %select = select i1 %cmp, i32 %y, i32 %xor 854 %res = mul i32 %select, %xor ; to bump up use count of the Xor 855 ret i32 %res 856} 857 858define i32 @no_shift_no_xor_multiuse_and(i32 %x, i32 %y) { 859; CHECK-LABEL: @no_shift_no_xor_multiuse_and( 860; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 861; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 862; CHECK-NEXT: [[AND2:%.*]] = add i32 [[Y:%.*]], -4097 863; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 864; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[AND2]] 865; CHECK-NEXT: ret i32 [[RES]] 866; 867 %and = and i32 %x, 4096 868 %cmp = icmp eq i32 %and, 0 869 %and2 = add i32 %y, -4097 870 %select = select i1 %cmp, i32 %y, i32 %and2 871 %res = mul i32 %select, %and2 ; to bump up use count of the And 872 ret i32 %res 873} 874 875define i32 @no_shift_xor_multiuse_or(i32 %x, i32 %y) { 876; CHECK-LABEL: @no_shift_xor_multiuse_or( 877; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 878; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 4096 879; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[AND]], 4096 880; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], [[Y]] 881; CHECK-NEXT: [[RES:%.*]] = mul i32 [[TMP2]], [[OR]] 882; CHECK-NEXT: ret i32 [[RES]] 883; 884 %and = and i32 %x, 4096 885 %cmp = icmp ne i32 0, %and 886 %or = or i32 %y, 4096 887 %select = select i1 %cmp, i32 %y, i32 %or 888 %res = mul i32 %select, %or ; to bump up use count of the Or 889 ret i32 %res 890} 891 892define i32 @no_shift_xor_multiuse_xor(i32 %x, i32 %y) { 893; CHECK-LABEL: @no_shift_xor_multiuse_xor( 894; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 895; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 896; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 4096 897; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[XOR]], i32 [[Y]] 898; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[XOR]] 899; CHECK-NEXT: ret i32 [[RES]] 900; 901 %and = and i32 %x, 4096 902 %cmp = icmp ne i32 0, %and 903 %xor = xor i32 %y, 4096 904 %select = select i1 %cmp, i32 %y, i32 %xor 905 %res = mul i32 %select, %xor ; to bump up use count of the Xor 906 ret i32 %res 907} 908 909define i32 @no_shift_xor_multiuse_and(i32 %x, i32 %y) { 910; CHECK-LABEL: @no_shift_xor_multiuse_and( 911; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 912; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 913; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 914; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[AND2]], i32 [[Y]] 915; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[AND2]] 916; CHECK-NEXT: ret i32 [[RES]] 917; 918 %and = and i32 %x, 4096 919 %cmp = icmp ne i32 0, %and 920 %and2 = and i32 %y, -4097 921 %select = select i1 %cmp, i32 %y, i32 %and2 922 %res = mul i32 %select, %and2 ; to bump up use count of the And 923 ret i32 %res 924} 925 926define i32 @shift_xor_multiuse_or(i32 %x, i32 %y) { 927; CHECK-LABEL: @shift_xor_multiuse_or( 928; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 929; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 930; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 2048 931; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[OR]], i32 [[Y]] 932; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[OR]] 933; CHECK-NEXT: ret i32 [[RES]] 934; 935 %and = and i32 %x, 4096 936 %cmp = icmp ne i32 0, %and 937 %or = or i32 %y, 2048 938 %select = select i1 %cmp, i32 %y, i32 %or 939 %res = mul i32 %select, %or ; to bump up use count of the Or 940 ret i32 %res 941} 942 943define i32 @shift_xor_multiuse_xor(i32 %x, i32 %y) { 944; CHECK-LABEL: @shift_xor_multiuse_xor( 945; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 946; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 947; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2048 948; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[XOR]], i32 [[Y]] 949; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[XOR]] 950; CHECK-NEXT: ret i32 [[RES]] 951; 952 %and = and i32 %x, 4096 953 %cmp = icmp ne i32 0, %and 954 %xor = xor i32 %y, 2048 955 %select = select i1 %cmp, i32 %y, i32 %xor 956 %res = mul i32 %select, %xor ; to bump up use count of the Xor 957 ret i32 %res 958} 959 960define i32 @shift_xor_multiuse_and(i32 %x, i32 %y) { 961; CHECK-LABEL: @shift_xor_multiuse_and( 962; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 963; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 964; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -2049 965; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[AND2]], i32 [[Y]] 966; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[AND2]] 967; CHECK-NEXT: ret i32 [[RES]] 968; 969 %and = and i32 %x, 4096 970 %cmp = icmp ne i32 0, %and 971 %and2 = and i32 %y, -2049 972 %select = select i1 %cmp, i32 %y, i32 %and2 973 %res = mul i32 %select, %and2 ; to bump up use count of the and 974 ret i32 %res 975} 976 977define i32 @shift_no_xor_multiuse_cmp(i32 %x, i32 %y, i32 %z, i32 %w) { 978; CHECK-LABEL: @shift_no_xor_multiuse_cmp( 979; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 980; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 981; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i32 [[AND]], 1 982; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], [[Y:%.*]] 983; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 984; CHECK-NEXT: [[RES:%.*]] = mul i32 [[TMP2]], [[SELECT2]] 985; CHECK-NEXT: ret i32 [[RES]] 986; 987 %and = and i32 %x, 1 988 %cmp = icmp eq i32 %and, 0 989 %or = or i32 %y, 2 990 %select = select i1 %cmp, i32 %y, i32 %or 991 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 992 %res = mul i32 %select, %select2 993 ret i32 %res 994} 995 996define i32 @shift_no_xor_multiuse_cmp_with_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 997; CHECK-LABEL: @shift_no_xor_multiuse_cmp_with_xor( 998; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 999; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1000; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2 1001; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 1002; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1003; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1004; CHECK-NEXT: ret i32 [[RES]] 1005; 1006 %and = and i32 %x, 1 1007 %cmp = icmp eq i32 %and, 0 1008 %xor = xor i32 %y, 2 1009 %select = select i1 %cmp, i32 %y, i32 %xor 1010 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1011 %res = mul i32 %select, %select2 1012 ret i32 %res 1013} 1014 1015define i32 @shift_no_xor_multiuse_cmp_with_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1016; CHECK-LABEL: @shift_no_xor_multiuse_cmp_with_and( 1017; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 1018; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1019; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -3 1020; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 1021; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1022; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1023; CHECK-NEXT: ret i32 [[RES]] 1024; 1025 %and = and i32 %x, 1 1026 %cmp = icmp eq i32 %and, 0 1027 %and2 = and i32 %y, -3 1028 %select = select i1 %cmp, i32 %y, i32 %and2 1029 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1030 %res = mul i32 %select, %select2 1031 ret i32 %res 1032} 1033 1034define i32 @no_shift_no_xor_multiuse_cmp(i32 %x, i32 %y, i32 %z, i32 %w) { 1035; CHECK-LABEL: @no_shift_no_xor_multiuse_cmp( 1036; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1037; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1038; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[AND]], [[Y:%.*]] 1039; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1040; CHECK-NEXT: [[RES:%.*]] = mul i32 [[TMP1]], [[SELECT2]] 1041; CHECK-NEXT: ret i32 [[RES]] 1042; 1043 %and = and i32 %x, 4096 1044 %cmp = icmp eq i32 %and, 0 1045 %or = or i32 %y, 4096 1046 %select = select i1 %cmp, i32 %y, i32 %or 1047 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1048 %res = mul i32 %select, %select2 1049 ret i32 %res 1050} 1051 1052define i32 @no_shift_no_xor_multiuse_cmp_with_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 1053; CHECK-LABEL: @no_shift_no_xor_multiuse_cmp_with_xor( 1054; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1055; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1056; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 4096 1057; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 1058; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1059; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1060; CHECK-NEXT: ret i32 [[RES]] 1061; 1062 %and = and i32 %x, 4096 1063 %cmp = icmp eq i32 %and, 0 1064 %xor = xor i32 %y, 4096 1065 %select = select i1 %cmp, i32 %y, i32 %xor 1066 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1067 %res = mul i32 %select, %select2 1068 ret i32 %res 1069} 1070 1071define i32 @no_shift_no_xor_multiuse_cmp_with_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1072; CHECK-LABEL: @no_shift_no_xor_multiuse_cmp_with_and( 1073; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1074; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1075; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 1076; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 1077; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1078; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1079; CHECK-NEXT: ret i32 [[RES]] 1080; 1081 %and = and i32 %x, 4096 1082 %cmp = icmp eq i32 %and, 0 1083 %and2 = and i32 %y, -4097 1084 %select = select i1 %cmp, i32 %y, i32 %and2 1085 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1086 %res = mul i32 %select, %select2 1087 ret i32 %res 1088} 1089 1090define i32 @no_shift_xor_multiuse_cmp(i32 %x, i32 %y, i32 %z, i32 %w) { 1091; CHECK-LABEL: @no_shift_xor_multiuse_cmp( 1092; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1093; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1094; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[AND]], 4096 1095; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], [[Y:%.*]] 1096; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1097; CHECK-NEXT: [[RES:%.*]] = mul i32 [[TMP2]], [[SELECT2]] 1098; CHECK-NEXT: ret i32 [[RES]] 1099; 1100 %and = and i32 %x, 4096 1101 %cmp = icmp ne i32 0, %and 1102 %or = or i32 %y, 4096 1103 %select = select i1 %cmp, i32 %y, i32 %or 1104 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1105 %res = mul i32 %select, %select2 1106 ret i32 %res 1107} 1108 1109define i32 @no_shift_xor_multiuse_cmp_with_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 1110; CHECK-LABEL: @no_shift_xor_multiuse_cmp_with_xor( 1111; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1112; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1113; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 4096 1114; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[XOR]], i32 [[Y]] 1115; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1116; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1117; CHECK-NEXT: ret i32 [[RES]] 1118; 1119 %and = and i32 %x, 4096 1120 %cmp = icmp ne i32 0, %and 1121 %xor = xor i32 %y, 4096 1122 %select = select i1 %cmp, i32 %y, i32 %xor 1123 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1124 %res = mul i32 %select, %select2 1125 ret i32 %res 1126} 1127 1128define i32 @no_shift_xor_multiuse_cmp_with_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1129; CHECK-LABEL: @no_shift_xor_multiuse_cmp_with_and( 1130; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1131; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1132; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 1133; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[AND2]], i32 [[Y]] 1134; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1135; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1136; CHECK-NEXT: ret i32 [[RES]] 1137; 1138 %and = and i32 %x, 4096 1139 %cmp = icmp ne i32 0, %and 1140 %and2 = and i32 %y, -4097 1141 %select = select i1 %cmp, i32 %y, i32 %and2 1142 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1143 %res = mul i32 %select, %select2 1144 ret i32 %res 1145} 1146 1147define i32 @shift_xor_multiuse_cmp(i32 %x, i32 %y, i32 %z, i32 %w) { 1148; CHECK-LABEL: @shift_xor_multiuse_cmp( 1149; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1150; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1151; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 2048 1152; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[OR]], i32 [[Y]] 1153; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1154; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1155; CHECK-NEXT: ret i32 [[RES]] 1156; 1157 %and = and i32 %x, 4096 1158 %cmp = icmp ne i32 0, %and 1159 %or = or i32 %y, 2048 1160 %select = select i1 %cmp, i32 %y, i32 %or 1161 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1162 %res = mul i32 %select, %select2 1163 ret i32 %res 1164} 1165 1166define i32 @shift_xor_multiuse_cmp_with_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 1167; CHECK-LABEL: @shift_xor_multiuse_cmp_with_xor( 1168; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1169; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1170; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2048 1171; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[XOR]], i32 [[Y]] 1172; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1173; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1174; CHECK-NEXT: ret i32 [[RES]] 1175; 1176 %and = and i32 %x, 4096 1177 %cmp = icmp ne i32 0, %and 1178 %xor = xor i32 %y, 2048 1179 %select = select i1 %cmp, i32 %y, i32 %xor 1180 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1181 %res = mul i32 %select, %select2 1182 ret i32 %res 1183} 1184 1185define i32 @shift_xor_multiuse_cmp_with_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1186; CHECK-LABEL: @shift_xor_multiuse_cmp_with_and( 1187; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1188; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1189; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -2049 1190; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[AND2]], i32 [[Y]] 1191; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1192; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1193; CHECK-NEXT: ret i32 [[RES]] 1194; 1195 %and = and i32 %x, 4096 1196 %cmp = icmp ne i32 0, %and 1197 %and2 = and i32 %y, -2049 1198 %select = select i1 %cmp, i32 %y, i32 %and2 1199 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1200 %res = mul i32 %select, %select2 1201 ret i32 %res 1202} 1203 1204define i32 @shift_no_xor_multiuse_cmp_or(i32 %x, i32 %y, i32 %z, i32 %w) { 1205; CHECK-LABEL: @shift_no_xor_multiuse_cmp_or( 1206; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 1207; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1208; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 2 1209; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[OR]] 1210; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1211; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1212; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[OR]] 1213; CHECK-NEXT: ret i32 [[RES2]] 1214; 1215 %and = and i32 %x, 1 1216 %cmp = icmp eq i32 %and, 0 1217 %or = or i32 %y, 2 1218 %select = select i1 %cmp, i32 %y, i32 %or 1219 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1220 %res = mul i32 %select, %select2 1221 %res2 = mul i32 %res, %or ; to bump up the use count of the or 1222 ret i32 %res2 1223} 1224 1225define i32 @shift_no_xor_multiuse_cmp_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 1226; CHECK-LABEL: @shift_no_xor_multiuse_cmp_xor( 1227; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 1228; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1229; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2 1230; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 1231; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1232; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1233; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[XOR]] 1234; CHECK-NEXT: ret i32 [[RES2]] 1235; 1236 %and = and i32 %x, 1 1237 %cmp = icmp eq i32 %and, 0 1238 %xor = xor i32 %y, 2 1239 %select = select i1 %cmp, i32 %y, i32 %xor 1240 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1241 %res = mul i32 %select, %select2 1242 %res2 = mul i32 %res, %xor ; to bump up the use count of the xor 1243 ret i32 %res2 1244} 1245 1246define i32 @shift_no_xor_multiuse_cmp_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1247; CHECK-LABEL: @shift_no_xor_multiuse_cmp_and( 1248; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 1249; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1250; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -3 1251; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 1252; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1253; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1254; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[AND2]] 1255; CHECK-NEXT: ret i32 [[RES2]] 1256; 1257 %and = and i32 %x, 1 1258 %cmp = icmp eq i32 %and, 0 1259 %and2 = and i32 %y, -3 1260 %select = select i1 %cmp, i32 %y, i32 %and2 1261 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1262 %res = mul i32 %select, %select2 1263 %res2 = mul i32 %res, %and2 ; to bump up the use count of the and 1264 ret i32 %res2 1265} 1266 1267define i32 @no_shift_no_xor_multiuse_cmp_or(i32 %x, i32 %y, i32 %z, i32 %w) { 1268; CHECK-LABEL: @no_shift_no_xor_multiuse_cmp_or( 1269; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1270; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1271; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 4096 1272; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[AND]], [[Y]] 1273; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1274; CHECK-NEXT: [[RES:%.*]] = mul i32 [[TMP1]], [[SELECT2]] 1275; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[OR]] 1276; CHECK-NEXT: ret i32 [[RES2]] 1277; 1278 %and = and i32 %x, 4096 1279 %cmp = icmp eq i32 %and, 0 1280 %or = or i32 %y, 4096 1281 %select = select i1 %cmp, i32 %y, i32 %or 1282 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1283 %res = mul i32 %select, %select2 1284 %res2 = mul i32 %res, %or ; to bump up the use count of the or 1285 ret i32 %res2 1286} 1287 1288define i32 @no_shift_no_xor_multiuse_cmp_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 1289; CHECK-LABEL: @no_shift_no_xor_multiuse_cmp_xor( 1290; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1291; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1292; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 4096 1293; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 1294; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1295; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1296; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[XOR]] 1297; CHECK-NEXT: ret i32 [[RES2]] 1298; 1299 %and = and i32 %x, 4096 1300 %cmp = icmp eq i32 %and, 0 1301 %xor = xor i32 %y, 4096 1302 %select = select i1 %cmp, i32 %y, i32 %xor 1303 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1304 %res = mul i32 %select, %select2 1305 %res2 = mul i32 %res, %xor ; to bump up the use count of the xor 1306 ret i32 %res2 1307} 1308 1309define i32 @no_shift_no_xor_multiuse_cmp_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1310; CHECK-LABEL: @no_shift_no_xor_multiuse_cmp_and( 1311; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1312; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1313; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 1314; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 1315; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1316; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1317; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[AND2]] 1318; CHECK-NEXT: ret i32 [[RES2]] 1319; 1320 %and = and i32 %x, 4096 1321 %cmp = icmp eq i32 %and, 0 1322 %and2 = and i32 %y, -4097 1323 %select = select i1 %cmp, i32 %y, i32 %and2 1324 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1325 %res = mul i32 %select, %select2 1326 %res2 = mul i32 %res, %and2 ; to bump up the use count of the and 1327 ret i32 %res2 1328} 1329 1330define i32 @no_shift_xor_multiuse_cmp_or(i32 %x, i32 %y, i32 %z, i32 %w) { 1331; CHECK-LABEL: @no_shift_xor_multiuse_cmp_or( 1332; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1333; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1334; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 4096 1335; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[OR]], i32 [[Y]] 1336; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1337; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1338; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[OR]] 1339; CHECK-NEXT: ret i32 [[RES2]] 1340; 1341 %and = and i32 %x, 4096 1342 %cmp = icmp ne i32 0, %and 1343 %or = or i32 %y, 4096 1344 %select = select i1 %cmp, i32 %y, i32 %or 1345 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1346 %res = mul i32 %select, %select2 1347 %res2 = mul i32 %res, %or ; to bump up the use count of the or 1348 ret i32 %res2 1349} 1350 1351define i32 @no_shift_xor_multiuse_cmp_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 1352; CHECK-LABEL: @no_shift_xor_multiuse_cmp_xor( 1353; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1354; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1355; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 4096 1356; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[XOR]], i32 [[Y]] 1357; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1358; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1359; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[XOR]] 1360; CHECK-NEXT: ret i32 [[RES2]] 1361; 1362 %and = and i32 %x, 4096 1363 %cmp = icmp ne i32 0, %and 1364 %xor = xor i32 %y, 4096 1365 %select = select i1 %cmp, i32 %y, i32 %xor 1366 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1367 %res = mul i32 %select, %select2 1368 %res2 = mul i32 %res, %xor ; to bump up the use count of the xor 1369 ret i32 %res2 1370} 1371 1372define i32 @no_shift_xor_multiuse_cmp_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1373; CHECK-LABEL: @no_shift_xor_multiuse_cmp_and( 1374; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1375; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1376; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 1377; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[AND2]], i32 [[Y]] 1378; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1379; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1380; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[AND2]] 1381; CHECK-NEXT: ret i32 [[RES2]] 1382; 1383 %and = and i32 %x, 4096 1384 %cmp = icmp ne i32 0, %and 1385 %and2 = and i32 %y, -4097 1386 %select = select i1 %cmp, i32 %y, i32 %and2 1387 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1388 %res = mul i32 %select, %select2 1389 %res2 = mul i32 %res, %and2 ; to bump up the use count of the and 1390 ret i32 %res2 1391} 1392 1393define i32 @shift_xor_multiuse_cmp_or(i32 %x, i32 %y, i32 %z, i32 %w) { 1394; CHECK-LABEL: @shift_xor_multiuse_cmp_or( 1395; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1396; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1397; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 2048 1398; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[OR]], i32 [[Y]] 1399; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1400; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1401; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[OR]] 1402; CHECK-NEXT: ret i32 [[RES2]] 1403; 1404 %and = and i32 %x, 4096 1405 %cmp = icmp ne i32 0, %and 1406 %or = or i32 %y, 2048 1407 %select = select i1 %cmp, i32 %y, i32 %or 1408 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1409 %res = mul i32 %select, %select2 1410 %res2 = mul i32 %res, %or ; to bump up the use count of the or 1411 ret i32 %res2 1412} 1413 1414define i32 @shift_xor_multiuse_cmp_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 1415; CHECK-LABEL: @shift_xor_multiuse_cmp_xor( 1416; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1417; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1418; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2048 1419; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[XOR]], i32 [[Y]] 1420; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1421; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1422; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[XOR]] 1423; CHECK-NEXT: ret i32 [[RES2]] 1424; 1425 %and = and i32 %x, 4096 1426 %cmp = icmp ne i32 0, %and 1427 %xor = xor i32 %y, 2048 1428 %select = select i1 %cmp, i32 %y, i32 %xor 1429 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1430 %res = mul i32 %select, %select2 1431 %res2 = mul i32 %res, %xor ; to bump up the use count of the xor 1432 ret i32 %res2 1433} 1434 1435define i32 @shift_xor_multiuse_cmp_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1436; CHECK-LABEL: @shift_xor_multiuse_cmp_and( 1437; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1438; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1439; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], 2048 1440; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[AND2]], i32 [[Y]] 1441; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1442; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1443; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[AND2]] 1444; CHECK-NEXT: ret i32 [[RES2]] 1445; 1446 %and = and i32 %x, 4096 1447 %cmp = icmp ne i32 0, %and 1448 %and2 = and i32 %y, 2048 1449 %select = select i1 %cmp, i32 %y, i32 %and2 1450 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1451 %res = mul i32 %select, %select2 1452 %res2 = mul i32 %res, %and2 ; to bump up the use count of the and 1453 ret i32 %res2 1454} 1455 1456define i8 @set_bits(i8 %x, i1 %b) { 1457; CHECK-LABEL: @set_bits( 1458; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], -6 1459; CHECK-NEXT: [[MASKSEL:%.*]] = select i1 [[B:%.*]], i8 5, i8 0 1460; CHECK-NEXT: [[COND:%.*]] = or i8 [[AND]], [[MASKSEL]] 1461; CHECK-NEXT: ret i8 [[COND]] 1462; 1463 %and = and i8 %x, 250 1464 %or = or i8 %x, 5 1465 %cond = select i1 %b, i8 %or, i8 %and 1466 ret i8 %cond 1467} 1468 1469; Negative test 1470 1471define i8 @set_bits_not_inverse_constant(i8 %x, i1 %b) { 1472; CHECK-LABEL: @set_bits_not_inverse_constant( 1473; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], -6 1474; CHECK-NEXT: [[OR:%.*]] = or i8 [[X]], 7 1475; CHECK-NEXT: [[COND:%.*]] = select i1 [[B:%.*]], i8 [[OR]], i8 [[AND]] 1476; CHECK-NEXT: ret i8 [[COND]] 1477; 1478 %and = and i8 %x, 250 1479 %or = or i8 %x, 7 1480 %cond = select i1 %b, i8 %or, i8 %and 1481 ret i8 %cond 1482} 1483 1484define i8 @set_bits_extra_use1(i8 %x, i1 %b) { 1485; CHECK-LABEL: @set_bits_extra_use1( 1486; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], -6 1487; CHECK-NEXT: call void @use(i8 [[AND]]) 1488; CHECK-NEXT: [[MASKSEL:%.*]] = select i1 [[B:%.*]], i8 5, i8 0 1489; CHECK-NEXT: [[COND:%.*]] = or i8 [[AND]], [[MASKSEL]] 1490; CHECK-NEXT: ret i8 [[COND]] 1491; 1492 %and = and i8 %x, 250 1493 call void @use(i8 %and) 1494 %or = or i8 %x, 5 1495 %cond = select i1 %b, i8 %or, i8 %and 1496 ret i8 %cond 1497} 1498 1499; Negative test 1500 1501define i8 @set_bits_extra_use2(i8 %x, i1 %b) { 1502; CHECK-LABEL: @set_bits_extra_use2( 1503; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], -6 1504; CHECK-NEXT: [[OR:%.*]] = or i8 [[X]], 5 1505; CHECK-NEXT: call void @use(i8 [[OR]]) 1506; CHECK-NEXT: [[COND:%.*]] = select i1 [[B:%.*]], i8 [[OR]], i8 [[AND]] 1507; CHECK-NEXT: ret i8 [[COND]] 1508; 1509 %and = and i8 %x, 250 1510 %or = or i8 %x, 5 1511 call void @use(i8 %or) 1512 %cond = select i1 %b, i8 %or, i8 %and 1513 ret i8 %cond 1514} 1515 1516define <2 x i8> @clear_bits(<2 x i8> %x, <2 x i1> %b) { 1517; CHECK-LABEL: @clear_bits( 1518; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[X:%.*]], <i8 37, i8 37> 1519; CHECK-NEXT: [[MASKSEL:%.*]] = select <2 x i1> [[B:%.*]], <2 x i8> zeroinitializer, <2 x i8> <i8 -38, i8 -38> 1520; CHECK-NEXT: [[COND:%.*]] = or <2 x i8> [[AND]], [[MASKSEL]] 1521; CHECK-NEXT: ret <2 x i8> [[COND]] 1522; 1523 %and = and <2 x i8> %x, <i8 37, i8 37> 1524 %or = or <2 x i8> %x, <i8 218, i8 218> 1525 %cond = select <2 x i1> %b, <2 x i8> %and, <2 x i8> %or 1526 ret <2 x i8> %cond 1527} 1528 1529; Negative test 1530 1531define <2 x i8> @clear_bits_not_inverse_constant(<2 x i8> %x, <2 x i1> %b) { 1532; CHECK-LABEL: @clear_bits_not_inverse_constant( 1533; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[X:%.*]], <i8 undef, i8 37> 1534; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[X]], <i8 -38, i8 -38> 1535; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[B:%.*]], <2 x i8> [[AND]], <2 x i8> [[OR]] 1536; CHECK-NEXT: ret <2 x i8> [[COND]] 1537; 1538 %and = and <2 x i8> %x, <i8 undef, i8 37> 1539 %or = or <2 x i8> %x, <i8 218, i8 218> 1540 %cond = select <2 x i1> %b, <2 x i8> %and, <2 x i8> %or 1541 ret <2 x i8> %cond 1542} 1543 1544define <2 x i8> @clear_bits_extra_use1(<2 x i8> %x, i1 %b) { 1545; CHECK-LABEL: @clear_bits_extra_use1( 1546; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[X:%.*]], <i8 37, i8 37> 1547; CHECK-NEXT: call void @use_vec(<2 x i8> [[AND]]) 1548; CHECK-NEXT: [[MASKSEL:%.*]] = select i1 [[B:%.*]], <2 x i8> zeroinitializer, <2 x i8> <i8 -38, i8 -38> 1549; CHECK-NEXT: [[COND:%.*]] = or <2 x i8> [[AND]], [[MASKSEL]] 1550; CHECK-NEXT: ret <2 x i8> [[COND]] 1551; 1552 %and = and <2 x i8> %x, <i8 37, i8 37> 1553 call void @use_vec(<2 x i8> %and) 1554 %or = or <2 x i8> %x, <i8 218, i8 218> 1555 %cond = select i1 %b, <2 x i8> %and, <2 x i8> %or 1556 ret <2 x i8> %cond 1557} 1558 1559; Negative test 1560 1561define i8 @clear_bits_extra_use2(i8 %x, i1 %b) { 1562; CHECK-LABEL: @clear_bits_extra_use2( 1563; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], -6 1564; CHECK-NEXT: [[OR:%.*]] = or i8 [[X]], 5 1565; CHECK-NEXT: call void @use(i8 [[OR]]) 1566; CHECK-NEXT: [[COND:%.*]] = select i1 [[B:%.*]], i8 [[AND]], i8 [[OR]] 1567; CHECK-NEXT: ret i8 [[COND]] 1568; 1569 %and = and i8 %x, 250 1570 %or = or i8 %x, 5 1571 call void @use(i8 %or) 1572 %cond = select i1 %b, i8 %and, i8 %or 1573 ret i8 %cond 1574} 1575