1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -instcombine -S < %s | FileCheck %s
3
4define i32 @shl_sub_i32(i32 %x) {
5; CHECK-LABEL: @shl_sub_i32(
6; CHECK-NEXT:    [[R:%.*]] = lshr i32 -2147483648, [[X:%.*]]
7; CHECK-NEXT:    ret i32 [[R]]
8;
9  %s = sub i32 31, %x
10  %r = shl i32 1, %s
11  ret i32 %r
12}
13
14define i32 @shl_sub_multiuse_i32(i32 %x) {
15; CHECK-LABEL: @shl_sub_multiuse_i32(
16; CHECK-NEXT:    [[S:%.*]] = sub i32 31, [[X:%.*]]
17; CHECK-NEXT:    call void @use(i32 [[S]])
18; CHECK-NEXT:    [[R:%.*]] = lshr i32 -2147483648, [[X]]
19; CHECK-NEXT:    ret i32 [[R]]
20;
21  %s = sub i32 31, %x
22  call void @use(i32 %s)
23  %r = shl i32 1, %s
24  ret i32 %r
25}
26
27define i8 @shl_sub_i8(i8 %x) {
28; CHECK-LABEL: @shl_sub_i8(
29; CHECK-NEXT:    [[R:%.*]] = lshr i8 -128, [[X:%.*]]
30; CHECK-NEXT:    ret i8 [[R]]
31;
32  %s = sub i8 7, %x
33  %r = shl i8 1, %s
34  ret i8 %r
35}
36
37define i64 @shl_sub_i64(i64 %x) {
38; CHECK-LABEL: @shl_sub_i64(
39; CHECK-NEXT:    [[R:%.*]] = lshr i64 -9223372036854775808, [[X:%.*]]
40; CHECK-NEXT:    ret i64 [[R]]
41;
42  %s = sub i64 63, %x
43  %r = shl i64 1, %s
44  ret i64 %r
45}
46
47define <2 x i64> @shl_sub_i64_vec(<2 x i64> %x) {
48; CHECK-LABEL: @shl_sub_i64_vec(
49; CHECK-NEXT:    [[R:%.*]] = lshr <2 x i64> <i64 -9223372036854775808, i64 -9223372036854775808>, [[X:%.*]]
50; CHECK-NEXT:    ret <2 x i64> [[R]]
51;
52  %s = sub <2 x i64> <i64 63, i64 63>, %x
53  %r = shl <2 x i64> <i64 1, i64 1>, %s
54  ret <2 x i64> %r
55}
56
57define <3 x i64> @shl_sub_i64_vec_undef(<3 x i64> %x) {
58; CHECK-LABEL: @shl_sub_i64_vec_undef(
59; CHECK-NEXT:    [[R:%.*]] = lshr <3 x i64> <i64 -9223372036854775808, i64 -9223372036854775808, i64 -9223372036854775808>, [[X:%.*]]
60; CHECK-NEXT:    ret <3 x i64> [[R]]
61;
62  %s = sub <3 x i64> <i64 63, i64 63, i64 63>, %x
63  %r = shl <3 x i64> <i64 1, i64 undef, i64 1>, %s
64  ret <3 x i64> %r
65}
66
67; Negative tests
68
69define i32 @shl_bad_sub_i32(i32 %x) {
70; CHECK-LABEL: @shl_bad_sub_i32(
71; CHECK-NEXT:    [[S:%.*]] = sub i32 32, [[X:%.*]]
72; CHECK-NEXT:    [[R:%.*]] = shl i32 1, [[S]]
73; CHECK-NEXT:    ret i32 [[R]]
74;
75  %s = sub i32 32, %x
76  %r = shl i32 1, %s
77  ret i32 %r
78}
79
80define i32 @bad_shl_sub_i32(i32 %x) {
81; CHECK-LABEL: @bad_shl_sub_i32(
82; CHECK-NEXT:    [[S:%.*]] = sub i32 31, [[X:%.*]]
83; CHECK-NEXT:    [[R:%.*]] = shl i32 2, [[S]]
84; CHECK-NEXT:    ret i32 [[R]]
85;
86  %s = sub i32 31, %x
87  %r = shl i32 2, %s
88  ret i32 %r
89}
90
91define i32 @shl_bad_sub2_i32(i32 %x) {
92; CHECK-LABEL: @shl_bad_sub2_i32(
93; CHECK-NEXT:    [[S:%.*]] = add i32 [[X:%.*]], -31
94; CHECK-NEXT:    [[R:%.*]] = shl i32 1, [[S]]
95; CHECK-NEXT:    ret i32 [[R]]
96;
97  %s = sub i32 %x, 31
98  %r = shl i32 1, %s
99  ret i32 %r
100}
101
102define i32 @bad_shl2_sub_i32(i32 %x) {
103; CHECK-LABEL: @bad_shl2_sub_i32(
104; CHECK-NEXT:    [[S:%.*]] = add i32 [[X:%.*]], -31
105; CHECK-NEXT:    [[R:%.*]] = shl i32 1, [[S]]
106; CHECK-NEXT:    ret i32 [[R]]
107;
108  %s = sub i32 %x, 31
109  %r = shl i32 1, %s
110  ret i32 %r
111}
112
113define i8 @shl_bad_sub_i8(i8 %x) {
114; CHECK-LABEL: @shl_bad_sub_i8(
115; CHECK-NEXT:    [[S:%.*]] = sub i8 4, [[X:%.*]]
116; CHECK-NEXT:    [[R:%.*]] = shl i8 1, [[S]]
117; CHECK-NEXT:    ret i8 [[R]]
118;
119  %s = sub i8 4, %x
120  %r = shl i8 1, %s
121  ret i8 %r
122}
123
124define i64 @shl_bad_sub_i64(i64 %x) {
125; CHECK-LABEL: @shl_bad_sub_i64(
126; CHECK-NEXT:    [[S:%.*]] = sub i64 67, [[X:%.*]]
127; CHECK-NEXT:    [[R:%.*]] = shl i64 1, [[S]]
128; CHECK-NEXT:    ret i64 [[R]]
129;
130  %s = sub i64 67, %x
131  %r = shl i64 1, %s
132  ret i64 %r
133}
134
135define <2 x i64> @shl_bad_sub_i64_vec(<2 x i64> %x) {
136; CHECK-LABEL: @shl_bad_sub_i64_vec(
137; CHECK-NEXT:    [[S:%.*]] = sub <2 x i64> <i64 53, i64 53>, [[X:%.*]]
138; CHECK-NEXT:    [[R:%.*]] = shl <2 x i64> <i64 1, i64 1>, [[S]]
139; CHECK-NEXT:    ret <2 x i64> [[R]]
140;
141  %s = sub <2 x i64> <i64 53, i64 53>, %x
142  %r = shl <2 x i64> <i64 1, i64 1>, %s
143  ret <2 x i64> %r
144}
145
146define <2 x i64> @bad_shl_sub_i64_vec(<2 x i64> %x) {
147; CHECK-LABEL: @bad_shl_sub_i64_vec(
148; CHECK-NEXT:    [[S:%.*]] = sub <2 x i64> <i64 63, i64 63>, [[X:%.*]]
149; CHECK-NEXT:    [[R:%.*]] = shl <2 x i64> <i64 2, i64 2>, [[S]]
150; CHECK-NEXT:    ret <2 x i64> [[R]]
151;
152  %s = sub <2 x i64> <i64 63, i64 63>, %x
153  %r = shl <2 x i64> <i64 2, i64 2>, %s
154  ret <2 x i64> %r
155}
156
157define <3 x i64> @shl_sub_i64_vec_undef_bad(<3 x i64> %x) {
158; CHECK-LABEL: @shl_sub_i64_vec_undef_bad(
159; CHECK-NEXT:    [[S:%.*]] = sub <3 x i64> <i64 63, i64 undef, i64 63>, [[X:%.*]]
160; CHECK-NEXT:    [[R:%.*]] = shl <3 x i64> <i64 1, i64 1, i64 1>, [[S]]
161; CHECK-NEXT:    ret <3 x i64> [[R]]
162;
163  %s = sub <3 x i64> <i64 63, i64 undef, i64 63>, %x
164  %r = shl <3 x i64> <i64 1, i64 1, i64 1>, %s
165  ret <3 x i64> %r
166}
167
168define <3 x i64> @shl_sub_i64_vec_undef_bad2(<3 x i64> %x) {
169; CHECK-LABEL: @shl_sub_i64_vec_undef_bad2(
170; CHECK-NEXT:    [[S:%.*]] = sub <3 x i64> <i64 63, i64 undef, i64 63>, [[X:%.*]]
171; CHECK-NEXT:    [[R:%.*]] = shl <3 x i64> <i64 1, i64 undef, i64 1>, [[S]]
172; CHECK-NEXT:    ret <3 x i64> [[R]]
173;
174  %s = sub <3 x i64> <i64 63, i64 undef, i64 63>, %x
175  %r = shl <3 x i64> <i64 1, i64 undef, i64 1>, %s
176  ret <3 x i64> %r
177}
178
179
180declare void @use(i32)
181