1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -instcombine -S -o - | FileCheck %s
3
4; This test case was added as a reproducer for a miscompile, where instcombine
5; introduced an
6;   srem <2 x i16> %1, <i16 undef, i16 2>
7; instruction, which makes the whole srem undefined (even if we only end up
8; extracting the second element in the vector).
9define i16 @test_srem_orig(i16 %a, i1 %cmp) {
10; CHECK-LABEL: @test_srem_orig(
11; CHECK-NEXT:    [[SPLATINSERT:%.*]] = insertelement <2 x i16> undef, i16 [[A:%.*]], i32 0
12; CHECK-NEXT:    [[TMP1:%.*]] = srem <2 x i16> [[SPLATINSERT]], <i16 2, i16 1>
13; CHECK-NEXT:    [[SPLAT_OP:%.*]] = shufflevector <2 x i16> [[TMP1]], <2 x i16> undef, <2 x i32> <i32 undef, i32 0>
14; CHECK-NEXT:    [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x i16> <i16 undef, i16 1>, <2 x i16> [[SPLAT_OP]]
15; CHECK-NEXT:    [[T3:%.*]] = extractelement <2 x i16> [[T2]], i32 1
16; CHECK-NEXT:    ret i16 [[T3]]
17;
18  %splatinsert = insertelement <2 x i16> undef, i16 %a, i32 0
19  %splat = shufflevector <2 x i16> %splatinsert, <2 x i16> undef, <2 x i32> zeroinitializer
20  %t1 = select i1 %cmp, <2 x i16> <i16 1, i16 1>, <2 x i16> %splat
21  %t2 = srem <2 x i16> %t1, <i16 2, i16 2>
22  %t3 = extractelement <2 x i16> %t2, i32 1
23  ret i16 %t3
24}
25
26; This is basically a reduced version of test_srem_orig (based on what the
27; code would look like after a few iterations of instcombine, just before we
28; try to transform the shufflevector by doing
29; "evaluateInDifferentElementOrder".
30define <2 x i16> @test_srem(i16 %a, i1 %cmp) {
31; CHECK-LABEL: @test_srem(
32; CHECK-NEXT:    [[SPLATINSERT:%.*]] = insertelement <2 x i16> undef, i16 [[A:%.*]], i32 0
33; CHECK-NEXT:    [[T1:%.*]] = srem <2 x i16> [[SPLATINSERT]], <i16 2, i16 1>
34; CHECK-NEXT:    [[SPLAT_OP:%.*]] = shufflevector <2 x i16> [[T1]], <2 x i16> undef, <2 x i32> <i32 undef, i32 0>
35; CHECK-NEXT:    [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x i16> <i16 77, i16 99>, <2 x i16> [[SPLAT_OP]]
36; CHECK-NEXT:    ret <2 x i16> [[T2]]
37;
38  %splatinsert = insertelement <2 x i16> undef, i16 %a, i32 0
39  %t1 = srem <2 x i16> %splatinsert, <i16 2, i16 1>
40  %splat.op = shufflevector <2 x i16> %t1, <2 x i16> undef, <2 x i32> <i32 undef, i32 0>
41  %t2 = select i1 %cmp, <2 x i16> <i16 77, i16 99>, <2 x i16> %splat.op
42  ret <2 x i16> %t2
43}
44
45define <2 x i16> @test_urem(i16 %a, i1 %cmp) {
46; CHECK-LABEL: @test_urem(
47; CHECK-NEXT:    [[SPLATINSERT:%.*]] = insertelement <2 x i16> undef, i16 [[A:%.*]], i32 0
48; CHECK-NEXT:    [[T1:%.*]] = urem <2 x i16> [[SPLATINSERT]], <i16 3, i16 1>
49; CHECK-NEXT:    [[SPLAT_OP:%.*]] = shufflevector <2 x i16> [[T1]], <2 x i16> undef, <2 x i32> <i32 undef, i32 0>
50; CHECK-NEXT:    [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x i16> <i16 77, i16 99>, <2 x i16> [[SPLAT_OP]]
51; CHECK-NEXT:    ret <2 x i16> [[T2]]
52;
53  %splatinsert = insertelement <2 x i16> undef, i16 %a, i32 0
54  %t1 = urem <2 x i16> %splatinsert, <i16 3, i16 1>
55  %splat.op = shufflevector <2 x i16> %t1, <2 x i16> undef, <2 x i32> <i32 undef, i32 0>
56  %t2 = select i1 %cmp, <2 x i16> <i16 77, i16 99>, <2 x i16> %splat.op
57  ret <2 x i16> %t2
58}
59
60define <2 x i16> @test_sdiv(i16 %a, i1 %cmp) {
61; CHECK-LABEL: @test_sdiv(
62; CHECK-NEXT:    [[SPLATINSERT:%.*]] = insertelement <2 x i16> undef, i16 [[A:%.*]], i32 0
63; CHECK-NEXT:    [[T1:%.*]] = sdiv <2 x i16> [[SPLATINSERT]], <i16 2, i16 1>
64; CHECK-NEXT:    [[SPLAT_OP:%.*]] = shufflevector <2 x i16> [[T1]], <2 x i16> undef, <2 x i32> <i32 undef, i32 0>
65; CHECK-NEXT:    [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x i16> <i16 77, i16 99>, <2 x i16> [[SPLAT_OP]]
66; CHECK-NEXT:    ret <2 x i16> [[T2]]
67;
68  %splatinsert = insertelement <2 x i16> undef, i16 %a, i32 0
69  %t1 = sdiv <2 x i16> %splatinsert, <i16 2, i16 1>
70  %splat.op = shufflevector <2 x i16> %t1, <2 x i16> undef, <2 x i32> <i32 undef, i32 0>
71  %t2 = select i1 %cmp, <2 x i16> <i16 77, i16 99>, <2 x i16> %splat.op
72  ret <2 x i16> %t2
73}
74
75define <2 x i16> @test_udiv(i16 %a, i1 %cmp) {
76; CHECK-LABEL: @test_udiv(
77; CHECK-NEXT:    [[SPLATINSERT:%.*]] = insertelement <2 x i16> undef, i16 [[A:%.*]], i32 0
78; CHECK-NEXT:    [[T1:%.*]] = udiv <2 x i16> [[SPLATINSERT]], <i16 3, i16 1>
79; CHECK-NEXT:    [[SPLAT_OP:%.*]] = shufflevector <2 x i16> [[T1]], <2 x i16> undef, <2 x i32> <i32 undef, i32 0>
80; CHECK-NEXT:    [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x i16> <i16 77, i16 99>, <2 x i16> [[SPLAT_OP]]
81; CHECK-NEXT:    ret <2 x i16> [[T2]]
82;
83  %splatinsert = insertelement <2 x i16> undef, i16 %a, i32 0
84  %t1 = udiv <2 x i16> %splatinsert, <i16 3, i16 1>
85  %splat.op = shufflevector <2 x i16> %t1, <2 x i16> undef, <2 x i32> <i32 undef, i32 0>
86  %t2 = select i1 %cmp, <2 x i16> <i16 77, i16 99>, <2 x i16> %splat.op
87  ret <2 x i16> %t2
88}
89
90; For fdiv we do not need to worry about div by undef. Verify that the
91; shufflevector is eliminated here.
92define <2 x float> @test_fdiv(float %a, float %b, i1 %cmp) {
93; CHECK-LABEL: @test_fdiv(
94; CHECK-NEXT:    [[TMP1:%.*]] = insertelement <2 x float> undef, float [[A:%.*]], i32 1
95; CHECK-NEXT:    [[TMP2:%.*]] = fdiv <2 x float> [[TMP1]], <float undef, float 3.000000e+00>
96; CHECK-NEXT:    [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x float> <float 7.700000e+01, float 9.900000e+01>, <2 x float> [[TMP2]]
97; CHECK-NEXT:    ret <2 x float> [[T2]]
98;
99  %splatinsert = insertelement <2 x float> undef, float %a, i32 0
100  %denom = insertelement <2 x float> <float 3.0, float undef>, float 1.0, i32 1
101  %t1 = fdiv <2 x float> %splatinsert, %denom
102  %splat.op = shufflevector <2 x float> %t1, <2 x float> undef, <2 x i32> <i32 undef, i32 0>
103  %t2 = select i1 %cmp, <2 x float> <float 77.0, float 99.0>, <2 x float> %splat.op
104  ret <2 x float> %t2
105}
106
107; For frem we do not need to worry about div by undef. Verify that the
108; shufflevector is eliminated here.
109define <2 x float> @test_frem(float %a, float %b, i1 %cmp) {
110; CHECK-LABEL: @test_frem(
111; CHECK-NEXT:    [[TMP1:%.*]] = insertelement <2 x float> undef, float [[A:%.*]], i32 1
112; CHECK-NEXT:    [[TMP2:%.*]] = frem <2 x float> [[TMP1]], <float undef, float 3.000000e+00>
113; CHECK-NEXT:    [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x float> <float 7.700000e+01, float 9.900000e+01>, <2 x float> [[TMP2]]
114; CHECK-NEXT:    ret <2 x float> [[T2]]
115;
116  %splatinsert = insertelement <2 x float> undef, float %a, i32 0
117  %denom = insertelement <2 x float> <float 3.0, float undef>, float 1.0, i32 1
118  %t1 = frem <2 x float> %splatinsert, %denom
119  %splat.op = shufflevector <2 x float> %t1, <2 x float> undef, <2 x i32> <i32 undef, i32 0>
120  %t2 = select i1 %cmp, <2 x float> <float 77.0, float 99.0>, <2 x float> %splat.op
121  ret <2 x float> %t2
122}
123