1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -instsimplify -S | FileCheck %s 3 4define i1 @zext_uge_sext(i32 %x) { 5; CHECK-LABEL: @zext_uge_sext( 6; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X:%.*]] to i64 7; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[X]] to i64 8; CHECK-NEXT: [[CMP:%.*]] = icmp uge i64 [[ZEXT]], [[SEXT]] 9; CHECK-NEXT: ret i1 [[CMP]] 10; 11 %sext = sext i32 %x to i64 12 %zext = zext i32 %x to i64 13 %cmp = icmp uge i64 %zext, %sext 14 ret i1 %cmp 15} 16 17define i1 @zext_ugt_sext(i32 %x) { 18; CHECK-LABEL: @zext_ugt_sext( 19; CHECK-NEXT: ret i1 false 20; 21 %sext = sext i32 %x to i64 22 %zext = zext i32 %x to i64 23 %cmp = icmp ugt i64 %zext, %sext 24 ret i1 %cmp 25} 26 27define i1 @zext_ult_sext(i32 %x) { 28; CHECK-LABEL: @zext_ult_sext( 29; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X:%.*]] to i64 30; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[X]] to i64 31; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[ZEXT]], [[SEXT]] 32; CHECK-NEXT: ret i1 [[CMP]] 33; 34 %sext = sext i32 %x to i64 35 %zext = zext i32 %x to i64 36 %cmp = icmp ult i64 %zext, %sext 37 ret i1 %cmp 38} 39 40define i1 @zext_ule_sext(i32 %x) { 41; CHECK-LABEL: @zext_ule_sext( 42; CHECK-NEXT: ret i1 true 43; 44 %sext = sext i32 %x to i64 45 %zext = zext i32 %x to i64 46 %cmp = icmp ule i64 %zext, %sext 47 ret i1 %cmp 48} 49 50define i1 @zext_sge_sext(i32 %x) { 51; CHECK-LABEL: @zext_sge_sext( 52; CHECK-NEXT: ret i1 true 53; 54 %sext = sext i32 %x to i64 55 %zext = zext i32 %x to i64 56 %cmp = icmp sge i64 %zext, %sext 57 ret i1 %cmp 58} 59 60define i1 @zext_sgt_sext(i32 %x) { 61; CHECK-LABEL: @zext_sgt_sext( 62; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X:%.*]] to i64 63; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[X]] to i64 64; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[ZEXT]], [[SEXT]] 65; CHECK-NEXT: ret i1 [[CMP]] 66; 67 %sext = sext i32 %x to i64 68 %zext = zext i32 %x to i64 69 %cmp = icmp sgt i64 %zext, %sext 70 ret i1 %cmp 71} 72 73define i1 @zext_slt_sext(i32 %x) { 74; CHECK-LABEL: @zext_slt_sext( 75; CHECK-NEXT: ret i1 false 76; 77 %sext = sext i32 %x to i64 78 %zext = zext i32 %x to i64 79 %cmp = icmp slt i64 %zext, %sext 80 ret i1 %cmp 81} 82 83define i1 @zext_sle_sext(i32 %x) { 84; CHECK-LABEL: @zext_sle_sext( 85; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X:%.*]] to i64 86; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[X]] to i64 87; CHECK-NEXT: [[CMP:%.*]] = icmp sle i64 [[ZEXT]], [[SEXT]] 88; CHECK-NEXT: ret i1 [[CMP]] 89; 90 %sext = sext i32 %x to i64 91 %zext = zext i32 %x to i64 92 %cmp = icmp sle i64 %zext, %sext 93 ret i1 %cmp 94} 95 96define i1 @sext_uge_zext(i32 %x) { 97; CHECK-LABEL: @sext_uge_zext( 98; CHECK-NEXT: ret i1 true 99; 100 %sext = sext i32 %x to i64 101 %zext = zext i32 %x to i64 102 %cmp = icmp uge i64 %sext, %zext 103 ret i1 %cmp 104} 105 106define i1 @sext_ugt_zext(i32 %x) { 107; CHECK-LABEL: @sext_ugt_zext( 108; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X:%.*]] to i64 109; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[X]] to i64 110; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i64 [[SEXT]], [[ZEXT]] 111; CHECK-NEXT: ret i1 [[CMP]] 112; 113 %sext = sext i32 %x to i64 114 %zext = zext i32 %x to i64 115 %cmp = icmp ugt i64 %sext, %zext 116 ret i1 %cmp 117} 118 119define i1 @sext_ult_zext(i32 %x) { 120; CHECK-LABEL: @sext_ult_zext( 121; CHECK-NEXT: ret i1 false 122; 123 %sext = sext i32 %x to i64 124 %zext = zext i32 %x to i64 125 %cmp = icmp ult i64 %sext, %zext 126 ret i1 %cmp 127} 128 129define i1 @sext_ule_zext(i32 %x) { 130; CHECK-LABEL: @sext_ule_zext( 131; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X:%.*]] to i64 132; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[X]] to i64 133; CHECK-NEXT: [[CMP:%.*]] = icmp ule i64 [[SEXT]], [[ZEXT]] 134; CHECK-NEXT: ret i1 [[CMP]] 135; 136 %sext = sext i32 %x to i64 137 %zext = zext i32 %x to i64 138 %cmp = icmp ule i64 %sext, %zext 139 ret i1 %cmp 140} 141 142define i1 @sext_sge_zext(i32 %x) { 143; CHECK-LABEL: @sext_sge_zext( 144; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X:%.*]] to i64 145; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[X]] to i64 146; CHECK-NEXT: [[CMP:%.*]] = icmp sge i64 [[SEXT]], [[ZEXT]] 147; CHECK-NEXT: ret i1 [[CMP]] 148; 149 %sext = sext i32 %x to i64 150 %zext = zext i32 %x to i64 151 %cmp = icmp sge i64 %sext, %zext 152 ret i1 %cmp 153} 154 155define i1 @sext_sgt_zext(i32 %x) { 156; CHECK-LABEL: @sext_sgt_zext( 157; CHECK-NEXT: ret i1 false 158; 159 %sext = sext i32 %x to i64 160 %zext = zext i32 %x to i64 161 %cmp = icmp sgt i64 %sext, %zext 162 ret i1 %cmp 163} 164 165define i1 @sext_slt_zext(i32 %x) { 166; CHECK-LABEL: @sext_slt_zext( 167; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X:%.*]] to i64 168; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[X]] to i64 169; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[SEXT]], [[ZEXT]] 170; CHECK-NEXT: ret i1 [[CMP]] 171; 172 %sext = sext i32 %x to i64 173 %zext = zext i32 %x to i64 174 %cmp = icmp slt i64 %sext, %zext 175 ret i1 %cmp 176} 177 178define i1 @sext_sle_zext(i32 %x) { 179; CHECK-LABEL: @sext_sle_zext( 180; CHECK-NEXT: ret i1 true 181; 182 %sext = sext i32 %x to i64 183 %zext = zext i32 %x to i64 184 %cmp = icmp sle i64 %sext, %zext 185 ret i1 %cmp 186} 187 188define <4 x i1> @zext_ugt_sext_vec(<4 x i32> %x) { 189; CHECK-LABEL: @zext_ugt_sext_vec( 190; CHECK-NEXT: ret <4 x i1> zeroinitializer 191; 192 %sext = sext <4 x i32> %x to <4 x i64> 193 %zext = zext <4 x i32> %x to <4 x i64> 194 %cmp = icmp ugt <4 x i64> %zext, %sext 195 ret <4 x i1> %cmp 196} 197 198define <4 x i1> @sext_ult_zext_vec(<4 x i32> %x) { 199; CHECK-LABEL: @sext_ult_zext_vec( 200; CHECK-NEXT: ret <4 x i1> zeroinitializer 201; 202 %sext = sext <4 x i32> %x to <4 x i64> 203 %zext = zext <4 x i32> %x to <4 x i64> 204 %cmp = icmp ult <4 x i64> %sext, %zext 205 ret <4 x i1> %cmp 206} 207 208define i1 @zext_ugt_sext_different_operand(i32 %x, i32 %y) { 209; CHECK-LABEL: @zext_ugt_sext_different_operand( 210; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X:%.*]] to i64 211; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[Y:%.*]] to i64 212; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i64 [[ZEXT]], [[SEXT]] 213; CHECK-NEXT: ret i1 [[CMP]] 214; 215 %sext = sext i32 %x to i64 216 %zext = zext i32 %y to i64 217 %cmp = icmp ugt i64 %zext, %sext 218 ret i1 %cmp 219} 220 221define i1 @sext_ult_zext_different_operand(i32 %x, i32 %y) { 222; CHECK-LABEL: @sext_ult_zext_different_operand( 223; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X:%.*]] to i64 224; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[Y:%.*]] to i64 225; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[SEXT]], [[ZEXT]] 226; CHECK-NEXT: ret i1 [[CMP]] 227; 228 %sext = sext i32 %x to i64 229 %zext = zext i32 %y to i64 230 %cmp = icmp ult i64 %sext, %zext 231 ret i1 %cmp 232} 233