1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2 3; RUN: opt < %s -S -loop-flatten -verify-loop-info -verify-dom-info -verify-scev -verify | FileCheck %s 4 5target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" 6 7define dso_local void @inner_limit_not_invariant(i32 %N, i32* nocapture %C, i16* nocapture readonly %A, i16 %val) { 8; CHECK-LABEL: @inner_limit_not_invariant( 9; CHECK-NEXT: entry: 10; CHECK-NEXT: [[CMP26_NOT:%.*]] = icmp eq i32 [[N:%.*]], 0 11; CHECK-NEXT: br i1 [[CMP26_NOT]], label [[FOR_END12:%.*]], label [[FOR_COND1_PREHEADER_LR_PH:%.*]] 12; CHECK: for.cond1.preheader.lr.ph: 13; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[VAL:%.*]] to i32 14; CHECK-NEXT: br label [[FOR_COND1_PREHEADER_US:%.*]] 15; CHECK: for.cond1.preheader.us: 16; CHECK-NEXT: [[I_027_US:%.*]] = phi i32 [ 0, [[FOR_COND1_PREHEADER_LR_PH]] ], [ [[INC11_US:%.*]], [[FOR_COND1_FOR_INC10_CRIT_EDGE_US:%.*]] ] 17; CHECK-NEXT: [[MUL_US:%.*]] = mul i32 [[I_027_US]], [[N]] 18; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[N]] to i64 19; CHECK-NEXT: br label [[FOR_BODY3_US:%.*]] 20; CHECK: for.body3.us: 21; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_COND1_PREHEADER_US]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY3_US]] ] 22; CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[INDVARS_IV]] to i32 23; CHECK-NEXT: [[ADD_US:%.*]] = add i32 [[TMP0]], [[MUL_US]] 24; CHECK-NEXT: [[IDXPROM_US:%.*]] = zext i32 [[ADD_US]] to i64 25; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i16, i16* [[A:%.*]], i64 [[IDXPROM_US]] 26; CHECK-NEXT: [[TMP1:%.*]] = load i16, i16* [[ARRAYIDX_US]], align 2 27; CHECK-NEXT: [[CONV_US:%.*]] = sext i16 [[TMP1]] to i32 28; CHECK-NEXT: [[MUL5_US:%.*]] = mul nsw i32 [[CONV_US]], [[CONV4]] 29; CHECK-NEXT: [[ARRAYIDX9_US:%.*]] = getelementptr inbounds i32, i32* [[C:%.*]], i64 [[IDXPROM_US]] 30; CHECK-NEXT: store i32 [[MUL5_US]], i32* [[ARRAYIDX9_US]], align 4 31; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 32; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]] 33; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY3_US]], label [[FOR_COND1_FOR_INC10_CRIT_EDGE_US]] 34; CHECK: for.cond1.for.inc10_crit_edge.us: 35; CHECK-NEXT: [[INC11_US]] = add nuw i32 [[I_027_US]], 1 36; CHECK-NEXT: [[EXITCOND29:%.*]] = icmp ne i32 [[INC11_US]], [[N]] 37; CHECK-NEXT: br i1 [[EXITCOND29]], label [[FOR_COND1_PREHEADER_US]], label [[FOR_END12_LOOPEXIT:%.*]] 38; CHECK: for.end12.loopexit: 39; CHECK-NEXT: br label [[FOR_END12]] 40; CHECK: for.end12: 41; CHECK-NEXT: ret void 42; 43entry: 44 %cmp26.not = icmp eq i32 %N, 0 45 br i1 %cmp26.not, label %for.end12, label %for.cond1.preheader.lr.ph 46 47for.cond1.preheader.lr.ph: 48 %conv4 = sext i16 %val to i32 49 br label %for.cond1.preheader.us 50 51for.cond1.preheader.us: 52 %i.027.us = phi i32 [ 0, %for.cond1.preheader.lr.ph ], [ %inc11.us, %for.cond1.for.inc10_crit_edge.us ] 53 %mul.us = mul i32 %i.027.us, %N 54 %wide.trip.count = zext i32 %N to i64 55 br label %for.body3.us 56 57for.body3.us: 58 %indvars.iv = phi i64 [ 0, %for.cond1.preheader.us ], [ %indvars.iv.next, %for.body3.us ] 59 %0 = trunc i64 %indvars.iv to i32 60 %add.us = add i32 %0, %mul.us 61 %idxprom.us = zext i32 %add.us to i64 62 %arrayidx.us = getelementptr inbounds i16, i16* %A, i64 %idxprom.us 63 %1 = load i16, i16* %arrayidx.us, align 2 64 %conv.us = sext i16 %1 to i32 65 %mul5.us = mul nsw i32 %conv.us, %conv4 66 %arrayidx9.us = getelementptr inbounds i32, i32* %C, i64 %idxprom.us 67 store i32 %mul5.us, i32* %arrayidx9.us, align 4 68 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 69 %exitcond = icmp ne i64 %indvars.iv.next, %wide.trip.count 70 br i1 %exitcond, label %for.body3.us, label %for.cond1.for.inc10_crit_edge.us 71 72for.cond1.for.inc10_crit_edge.us: 73 %inc11.us = add nuw i32 %i.027.us, 1 74 %exitcond29 = icmp ne i32 %inc11.us, %N 75 br i1 %exitcond29, label %for.cond1.preheader.us, label %for.end12.loopexit 76 77for.end12.loopexit: 78 br label %for.end12 79 80for.end12: 81 ret void 82} 83 84define dso_local void @outer_limit_not_invariant(i32 %N, i32* nocapture %C, i16* nocapture readonly %A, i16 %val, i64 %M) { 85; CHECK-LABEL: @outer_limit_not_invariant( 86; CHECK-NEXT: entry: 87; CHECK-NEXT: [[CMP26_NOT:%.*]] = icmp eq i32 [[N:%.*]], 0 88; CHECK-NEXT: br i1 [[CMP26_NOT]], label [[FOR_END12:%.*]], label [[FOR_COND1_PREHEADER_LR_PH:%.*]] 89; CHECK: for.cond1.preheader.lr.ph: 90; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[VAL:%.*]] to i32 91; CHECK-NEXT: br label [[FOR_COND1_PREHEADER_US:%.*]] 92; CHECK: for.cond1.preheader.us: 93; CHECK-NEXT: [[I_027_US:%.*]] = phi i32 [ 0, [[FOR_COND1_PREHEADER_LR_PH]] ], [ [[INC11_US:%.*]], [[FOR_COND1_FOR_INC10_CRIT_EDGE_US:%.*]] ] 94; CHECK-NEXT: [[MUL_US:%.*]] = mul i32 [[I_027_US]], [[N]] 95; CHECK-NEXT: [[TRUNC_TRIP_COUNT:%.*]] = trunc i64 [[M:%.*]] to i32 96; CHECK-NEXT: br label [[FOR_BODY3_US:%.*]] 97; CHECK: for.body3.us: 98; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_COND1_PREHEADER_US]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY3_US]] ] 99; CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[INDVARS_IV]] to i32 100; CHECK-NEXT: [[ADD_US:%.*]] = add i32 [[TMP0]], [[MUL_US]] 101; CHECK-NEXT: [[IDXPROM_US:%.*]] = zext i32 [[ADD_US]] to i64 102; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i16, i16* [[A:%.*]], i64 [[IDXPROM_US]] 103; CHECK-NEXT: [[TMP1:%.*]] = load i16, i16* [[ARRAYIDX_US]], align 2 104; CHECK-NEXT: [[CONV_US:%.*]] = sext i16 [[TMP1]] to i32 105; CHECK-NEXT: [[MUL5_US:%.*]] = mul nsw i32 [[CONV_US]], [[CONV4]] 106; CHECK-NEXT: [[ARRAYIDX9_US:%.*]] = getelementptr inbounds i32, i32* [[C:%.*]], i64 [[IDXPROM_US]] 107; CHECK-NEXT: store i32 [[MUL5_US]], i32* [[ARRAYIDX9_US]], align 4 108; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 109; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[M]] 110; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY3_US]], label [[FOR_COND1_FOR_INC10_CRIT_EDGE_US]] 111; CHECK: for.cond1.for.inc10_crit_edge.us: 112; CHECK-NEXT: [[INC11_US]] = add nuw i32 [[I_027_US]], 1 113; CHECK-NEXT: [[EXITCOND29:%.*]] = icmp ne i32 [[INC11_US]], [[TRUNC_TRIP_COUNT]] 114; CHECK-NEXT: br i1 [[EXITCOND29]], label [[FOR_COND1_PREHEADER_US]], label [[FOR_END12_LOOPEXIT:%.*]] 115; CHECK: for.end12.loopexit: 116; CHECK-NEXT: br label [[FOR_END12]] 117; CHECK: for.end12: 118; CHECK-NEXT: ret void 119; 120entry: 121 %cmp26.not = icmp eq i32 %N, 0 122 br i1 %cmp26.not, label %for.end12, label %for.cond1.preheader.lr.ph 123 124for.cond1.preheader.lr.ph: 125 %conv4 = sext i16 %val to i32 126 br label %for.cond1.preheader.us 127 128for.cond1.preheader.us: 129 %i.027.us = phi i32 [ 0, %for.cond1.preheader.lr.ph ], [ %inc11.us, %for.cond1.for.inc10_crit_edge.us ] 130 %mul.us = mul i32 %i.027.us, %N 131 %trunc.trip.count = trunc i64 %M to i32 132 br label %for.body3.us 133 134for.body3.us: 135 %indvars.iv = phi i64 [ 0, %for.cond1.preheader.us ], [ %indvars.iv.next, %for.body3.us ] 136 %0 = trunc i64 %indvars.iv to i32 137 %add.us = add i32 %0, %mul.us 138 %idxprom.us = zext i32 %add.us to i64 139 %arrayidx.us = getelementptr inbounds i16, i16* %A, i64 %idxprom.us 140 %1 = load i16, i16* %arrayidx.us, align 2 141 %conv.us = sext i16 %1 to i32 142 %mul5.us = mul nsw i32 %conv.us, %conv4 143 %arrayidx9.us = getelementptr inbounds i32, i32* %C, i64 %idxprom.us 144 store i32 %mul5.us, i32* %arrayidx9.us, align 4 145 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 146 %exitcond = icmp ne i64 %indvars.iv.next, %M 147 br i1 %exitcond, label %for.body3.us, label %for.cond1.for.inc10_crit_edge.us 148 149for.cond1.for.inc10_crit_edge.us: 150 %inc11.us = add nuw i32 %i.027.us, 1 151 %exitcond29 = icmp ne i32 %inc11.us, %trunc.trip.count 152 br i1 %exitcond29, label %for.cond1.preheader.us, label %for.end12.loopexit 153 154for.end12.loopexit: 155 br label %for.end12 156 157for.end12: 158 ret void 159} 160