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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
3; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes='require<domtree>,loop(loop-simplifycfg)' -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
4; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -enable-mssa-loop-dependency=true -verify-memoryssa -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
5
6target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
7
8define void @c() {
9; CHECK-LABEL: @c(
10; CHECK-NEXT:  entry:
11; CHECK-NEXT:    br label [[D:%.*]]
12; CHECK:       d.loopexit:
13; CHECK-NEXT:    [[DOTLCSSA:%.*]] = phi i32 [ [[TMP1:%.*]], [[FOR_COND:%.*]] ]
14; CHECK-NEXT:    br label [[D]]
15; CHECK:       d:
16; CHECK-NEXT:    [[TMP0:%.*]] = phi i32 [ undef, [[ENTRY:%.*]] ], [ [[DOTLCSSA]], [[D_LOOPEXIT:%.*]] ]
17; CHECK-NEXT:    br label [[FOR_COND]]
18; CHECK:       for.cond:
19; CHECK-NEXT:    [[TMP1]] = phi i32 [ [[TMP0]], [[D]] ], [ 0, [[IF_END:%.*]] ]
20; CHECK-NEXT:    [[TOBOOL2:%.*]] = icmp eq i32 [[TMP1]], 0
21; CHECK-NEXT:    br i1 [[TOBOOL2]], label [[IF_END]], label [[D_LOOPEXIT]]
22; CHECK:       if.end:
23; CHECK-NEXT:    br label [[FOR_COND]]
24;
25entry:
26  br label %d
27
28d.loopexit:                                       ; preds = %if.end.7, %for.body
29  %.lcssa = phi i32 [ %1, %for.body ], [ 0, %if.end.7 ]
30  br label %d
31
32d:                                                ; preds = %d.loopexit, %entry
33  %0 = phi i32 [ undef, %entry ], [ %.lcssa, %d.loopexit ]
34  br label %for.cond
35
36for.cond:                                         ; preds = %if.end.8, %d
37  %1 = phi i32 [ %0, %d ], [ 0, %if.end.8 ]
38  br label %for.body
39
40for.body:                                         ; preds = %for.cond
41  %tobool2 = icmp eq i32 %1, 0
42  br i1 %tobool2, label %if.end, label %d.loopexit
43
44if.end:                                           ; preds = %for.body
45  br label %if.end.7
46
47if.end.7:                                         ; preds = %if.end
48  br i1 true, label %if.end.8, label %d.loopexit
49
50if.end.8:                                         ; preds = %if.end.7
51  br label %for.cond
52}
53
54define void @test_01() {
55; CHECK-LABEL: @test_01(
56; CHECK-NEXT:  entry:
57; CHECK-NEXT:    br label [[FOR_COND:%.*]]
58; CHECK:       for.cond.loopexit:
59; CHECK-NEXT:    br label [[FOR_COND]]
60; CHECK:       for.cond:
61; CHECK-NEXT:    [[INC41_LCSSA3:%.*]] = phi i16 [ undef, [[FOR_COND_LOOPEXIT:%.*]] ], [ undef, [[ENTRY:%.*]] ]
62; CHECK-NEXT:    switch i32 0, label [[FOR_COND_SPLIT:%.*]] [
63; CHECK-NEXT:    i32 1, label [[FOR_COND_LOOPEXIT]]
64; CHECK-NEXT:    ]
65; CHECK:       for.cond.split:
66; CHECK-NEXT:    [[INC41_LCSSA3_LCSSA:%.*]] = phi i16 [ [[INC41_LCSSA3]], [[FOR_COND]] ]
67; CHECK-NEXT:    br label [[WHILE_COND:%.*]]
68; CHECK:       while.cond:
69; CHECK-NEXT:    [[INC41:%.*]] = phi i16 [ [[INC4:%.*]], [[WHILE_COND]] ], [ [[INC41_LCSSA3_LCSSA]], [[FOR_COND_SPLIT]] ]
70; CHECK-NEXT:    [[INC4]] = add nsw i16 [[INC41]], 1
71; CHECK-NEXT:    br label [[WHILE_COND]]
72;
73entry:
74  br label %for.cond
75
76for.cond.loopexit:                                ; preds = %while.cond
77  %inc41.lcssa = phi i16 [ %inc41, %while.cond ]
78  br label %for.cond
79
80for.cond:                                         ; preds = %for.cond.loopexit, %entry
81  %inc41.lcssa3 = phi i16 [ %inc41.lcssa, %for.cond.loopexit ], [ undef, %entry ]
82  br label %while.cond
83
84while.cond:                                       ; preds = %while.body, %for.cond
85  %inc41 = phi i16 [ %inc4, %while.body ], [ %inc41.lcssa3, %for.cond ]
86  br i1 true, label %while.body, label %for.cond.loopexit
87
88while.body:                                       ; preds = %while.cond
89  %inc4 = add nsw i16 %inc41, 1
90  br label %while.cond
91}
92
93define void @bar() {
94; CHECK-LABEL: @bar(
95; CHECK-NEXT:  bb:
96; CHECK-NEXT:    switch i32 0, label [[BB_SPLIT:%.*]] [
97; CHECK-NEXT:    i32 1, label [[BB10:%.*]]
98; CHECK-NEXT:    ]
99; CHECK:       bb.split:
100; CHECK-NEXT:    br label [[BB1:%.*]]
101; CHECK:       bb1:
102; CHECK-NEXT:    [[TMP:%.*]] = phi i32 [ [[TMP7:%.*]], [[BB6:%.*]] ], [ undef, [[BB_SPLIT]] ]
103; CHECK-NEXT:    switch i32 undef, label [[BB5:%.*]] [
104; CHECK-NEXT:    i32 0, label [[BB6]]
105; CHECK-NEXT:    i32 1, label [[BB8:%.*]]
106; CHECK-NEXT:    ]
107; CHECK:       bb5:
108; CHECK-NEXT:    ret void
109; CHECK:       bb6:
110; CHECK-NEXT:    [[TMP7]] = add i32 undef, 123
111; CHECK-NEXT:    br label [[BB1]]
112; CHECK:       bb8:
113; CHECK-NEXT:    [[TMP9:%.*]] = phi i32 [ [[TMP]], [[BB1]] ]
114; CHECK-NEXT:    [[USE:%.*]] = add i32 [[TMP9]], 1
115; CHECK-NEXT:    ret void
116; CHECK:       bb10:
117; CHECK-NEXT:    ret void
118;
119
120bb:
121  br label %bb1
122
123bb1:                                              ; preds = %bb6, %bb
124  %tmp = phi i32 [ %tmp7, %bb6 ], [ undef, %bb ]
125  br i1 false, label %bb2, label %bb4
126
127bb2:                                              ; preds = %bb1
128  switch i32 undef, label %bb10 [
129  i32 0, label %bb3
130  i32 1, label %bb8
131  ]
132
133bb3:                                              ; preds = %bb2
134  br label %bb6
135
136bb4:                                              ; preds = %bb1
137  switch i32 undef, label %bb5 [
138  i32 0, label %bb6
139  i32 1, label %bb8
140  ]
141
142bb5:                                              ; preds = %bb4
143  ret void
144
145bb6:                                              ; preds = %bb4, %bb3
146  %tmp7 = add i32 undef, 123
147  br label %bb1
148
149bb8:                                              ; preds = %bb4, %bb2
150  %tmp9 = phi i32 [ %tmp, %bb2 ], [ %tmp, %bb4 ]
151  %use = add i32 %tmp9, 1
152  ret void
153
154bb10:                                             ; preds = %bb2
155  ret void
156}
157
158define void @memlcssa() {
159; CHECK-LABEL: @memlcssa(
160; CHECK-NEXT:  entry:
161; CHECK-NEXT:    switch i32 0, label [[ENTRY_SPLIT:%.*]] [
162; CHECK-NEXT:    i32 1, label [[DEFAULT_BB:%.*]]
163; CHECK-NEXT:    ]
164; CHECK:       entry.split:
165; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
166; CHECK:       for.body:
167; CHECK-NEXT:    call void @foo()
168; CHECK-NEXT:    br label [[FOR_BODY]]
169; CHECK:       default.bb:
170; CHECK-NEXT:    unreachable
171;
172entry:
173  br label %for.body
174
175for.body:                                         ; preds = %exit, %entry
176  br label %switch.bb
177
178switch.bb:                                        ; preds = %for.body
179  switch i2 1, label %default.bb [
180  i2 1, label %case.bb
181  ]
182
183case.bb:                                          ; preds = %switch
184  br label %exit
185
186default.bb:                                       ; preds = %switch
187  unreachable
188
189exit:                                             ; preds = %case.bb
190  call void @foo()
191  br label %for.body
192}
193
194declare void @foo()
195