1; RUN: opt -mtriple=armv7 -mcpu=cortex-a57 -loop-unroll -S %s -o - | FileCheck %s --check-prefix=CHECK-UNROLL-A 2; RUN: opt -mtriple=thumbv7 -mcpu=cortex-a57 -loop-unroll -S %s -o - | FileCheck %s --check-prefix=CHECK-UNROLL-A 3; RUN: opt -mtriple=thumbv7 -mcpu=cortex-a72 -loop-unroll -S %s -o - | FileCheck %s --check-prefix=CHECK-UNROLL-A 4; RUN: opt -mtriple=thumbv8m -mcpu=cortex-m23 -loop-unroll -S %s -o - | FileCheck %s --check-prefix=CHECK-UNROLL-T1 5; RUN: opt -mtriple=thumbv8m.main -mcpu=cortex-m33 -loop-unroll -S %s -o - | FileCheck %s --check-prefix=CHECK-UNROLL-T2 6; RUN: opt -mtriple=thumbv7em -mcpu=cortex-m7 -loop-unroll -S %s -o - | FileCheck %s --check-prefix=CHECK-UNROLL-T2 7 8; CHECK-LABEL: partial 9define arm_aapcs_vfpcc void @partial(i32* nocapture %C, i32* nocapture readonly %A, i32* nocapture readonly %B) local_unnamed_addr #0 { 10entry: 11 br label %for.body 12 13; CHECK-LABEL: for.body 14for.body: 15 16; CHECK-UNROLL-A: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV2:%[a-z.0-9]+]], %for.body ] 17; CHECK-UNROLL-A: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1 18; CHECK-UNROLL-A: [[IV2]] = add nuw nsw i32 [[IV1]], 1 19; CHECK-UNROLL-A: [[CMP:%[a-z.0-9]+]] = icmp eq i32 [[IV2]], 1024 20; CHECK-UNROLL-A: br i1 [[CMP]], label [[END:%[a-z.]+]], label %for.body 21 22; CHECK-UNROLL-T1: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV1:%[a-z.0-9]+]], %for.body ] 23; CHECK-UNROLL-T1: [[IV1]] = add nuw nsw i32 [[IV0]], 1 24; CHECK-UNROLL-T1: [[CMP:%[a-z.0-9]+]] = icmp eq i32 [[IV1]], 1024 25; CHECK-UNROLL-T1: br i1 [[CMP]], label [[END:%[a-z.]+]], label %for.body 26 27; CHECK-UNROLL-T2: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV16:%[a-z.0-9]+]], %for.body ] 28; CHECK-UNROLL-T2: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1 29; CHECK-UNROLL-T2: [[IV2:%[a-z.0-9]+]] = add nuw nsw i32 [[IV1]], 1 30; CHECK-UNROLL-T2: [[IV3:%[a-z.0-9]+]] = add nuw nsw i32 [[IV2]], 1 31; CHECK-UNROLL-T2: [[IV4:%[a-z.0-9]+]] = add nuw nsw i32 [[IV3]], 1 32; CHECK-UNROLL-T2: [[IV5:%[a-z.0-9]+]] = add nuw nsw i32 [[IV4]], 1 33; CHECK-UNROLL-T2: [[IV6:%[a-z.0-9]+]] = add nuw nsw i32 [[IV5]], 1 34; CHECK-UNROLL-T2: [[IV7:%[a-z.0-9]+]] = add nuw nsw i32 [[IV6]], 1 35; CHECK-UNROLL-T2: [[IV8:%[a-z.0-9]+]] = add nuw nsw i32 [[IV7]], 1 36; CHECK-UNROLL-T2: [[IV9:%[a-z.0-9]+]] = add nuw nsw i32 [[IV8]], 1 37; CHECK-UNROLL-T2: [[IV10:%[a-z.0-9]+]] = add nuw nsw i32 [[IV9]], 1 38; CHECK-UNROLL-T2: [[IV11:%[a-z.0-9]+]] = add nuw nsw i32 [[IV10]], 1 39; CHECK-UNROLL-T2: [[IV12:%[a-z.0-9]+]] = add nuw nsw i32 [[IV11]], 1 40; CHECK-UNROLL-T2: [[IV13:%[a-z.0-9]+]] = add nuw nsw i32 [[IV12]], 1 41; CHECK-UNROLL-T2: [[IV14:%[a-z.0-9]+]] = add nuw nsw i32 [[IV13]], 1 42; CHECK-UNROLL-T2: [[IV15:%[a-z.0-9]+]] = add nuw nsw i32 [[IV14]], 1 43; CHECK-UNROLL-T2: [[IV16]] = add nuw nsw i32 [[IV15]], 1 44; CHECK-UNROLL-T2: [[CMP:%[a-z.0-9]+]] = icmp eq i32 [[IV16]], 1024 45; CHECK-UNROLL-T2: br i1 [[CMP]], label [[END:%[a-z.]+]], label %for.body 46 47 %i.08 = phi i32 [ 0, %entry ], [ %inc, %for.body ] 48 %arrayidx = getelementptr inbounds i32, i32* %A, i32 %i.08 49 %0 = load i32, i32* %arrayidx, align 4 50 %arrayidx1 = getelementptr inbounds i32, i32* %B, i32 %i.08 51 %1 = load i32, i32* %arrayidx1, align 4 52 %mul = mul nsw i32 %1, %0 53 %arrayidx2 = getelementptr inbounds i32, i32* %C, i32 %i.08 54 store i32 %mul, i32* %arrayidx2, align 4 55 %inc = add nuw nsw i32 %i.08, 1 56 %exitcond = icmp eq i32 %inc, 1024 57 br i1 %exitcond, label %for.cond.cleanup, label %for.body 58 59for.cond.cleanup: 60 ret void 61} 62 63; CHECK-LABEL: runtime 64define arm_aapcs_vfpcc void @runtime(i32* nocapture %C, i32* nocapture readonly %A, i32* nocapture readonly %B, i32 %N) local_unnamed_addr #0 { 65entry: 66 %cmp8 = icmp eq i32 %N, 0 67 br i1 %cmp8, label %for.cond.cleanup, label %for.body 68 69; CHECK-LABEL: for.body 70for.body: 71; CHECK-UNROLL-A: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, [[PRE:%[a-z.0-9]+]] ], [ [[IV2:%[a-z.0-9]+]], %for.body ] 72; CHECK-UNROLL-A: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1 73; CHECK-UNROLL-A: [[IV2]] = add nuw i32 [[IV1]], 1 74; CHECK-UNROLL-A: br 75 76; CHECK-UNROLL-T1: %i.09 = phi i32 [ %inc, %for.body ], [ 0 77; CHECK-UNROLL-T1: %inc = add nuw i32 %i.09, 1 78; CHECK-UNROLL-T1: %exitcond = icmp eq i32 %inc, %N 79; CHECK-UNROLL-T1: br 80 81; CHECK-UNROLL-T2: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, [[PRE:%[a-z.0-9]+]] ], [ [[IV4:%[a-z.0-9]+]], %for.body ] 82; CHECK-UNROLL-T2: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1 83; CHECK-UNROLL-T2: [[IV2:%[a-z.0-9]+]] = add nuw nsw i32 [[IV1]], 1 84; CHECK-UNROLL-T2: [[IV3:%[a-z.0-9]+]] = add nuw nsw i32 [[IV2]], 1 85; CHECK-UNROLL-T2: [[IV4]] = add nuw i32 [[IV3]], 1 86; CHECK-UNROLL-T2: br 87 88; CHECK-UNROLL-T2: for.body.epil: 89; CHECK-UNROLL-T2: for.body.epil.1: 90; CHECK-UNROLL-T2: for.body.epil.2: 91 92 %i.09 = phi i32 [ %inc, %for.body ], [ 0, %entry ] 93 %arrayidx = getelementptr inbounds i32, i32* %A, i32 %i.09 94 %0 = load i32, i32* %arrayidx, align 4 95 %arrayidx1 = getelementptr inbounds i32, i32* %B, i32 %i.09 96 %1 = load i32, i32* %arrayidx1, align 4 97 %mul = mul nsw i32 %1, %0 98 %arrayidx2 = getelementptr inbounds i32, i32* %C, i32 %i.09 99 store i32 %mul, i32* %arrayidx2, align 4 100 %inc = add nuw i32 %i.09, 1 101 %exitcond = icmp eq i32 %inc, %N 102 br i1 %exitcond, label %for.cond.cleanup, label %for.body 103 104for.cond.cleanup: 105 ret void 106} 107 108; CHECK-LABEL: nested_runtime 109define arm_aapcs_vfpcc void @nested_runtime(i32* nocapture %C, i16* nocapture readonly %A, i16* nocapture readonly %B, i32 %N) local_unnamed_addr #0 { 110entry: 111 %cmp25 = icmp eq i32 %N, 0 112 br i1 %cmp25, label %for.cond.cleanup, label %for.body4.lr.ph 113 114for.body4.lr.ph: 115 %h.026 = phi i32 [ %inc11, %for.cond.cleanup3 ], [ 0, %entry ] 116 %mul = mul i32 %h.026, %N 117 br label %for.body4 118 119for.cond.cleanup: 120 ret void 121 122for.cond.cleanup3: 123 %inc11 = add nuw i32 %h.026, 1 124 %exitcond27 = icmp eq i32 %inc11, %N 125 br i1 %exitcond27, label %for.cond.cleanup, label %for.body4.lr.ph 126 127; CHECK-LABEL: for.body4 128for.body4: 129; CHECK-UNROLL-T1: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, [[PRE:%[a-z0-9.]+]] ], [ [[IV1:%[a-z.0-9]+]], %for.body4 ] 130; CHECK-UNROLL-T1: [[IV1]] = add nuw i32 [[IV0]], 1 131; CHECK-UNROLL-T1: br 132 133; CHECK-UNROLL-T2: for.body4.epil: 134; CHECK-UNROLL-T2: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, [[PRE:%[a-z0-9.]+]] ], [ [[IV4:%[a-z.0-9]+]], %for.body4 ] 135; CHECK-UNROLL-T2: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1 136; CHECK-UNROLL-T2: [[IV2:%[a-z.0-9]+]] = add nuw nsw i32 [[IV1]], 1 137; CHECK-UNROLL-T2: [[IV3:%[a-z.0-9]+]] = add nuw nsw i32 [[IV2]], 1 138; CHECK-UNROLL-T2: [[IV4]] = add nuw i32 [[IV3]], 1 139; CHECK-UNROLL-T2: br 140; CHECK-UNROLL-T2: for.body4.epil.1: 141; CHECK-UNROLL-T2: for.body4.epil.2: 142 143 %w.024 = phi i32 [ 0, %for.body4.lr.ph ], [ %inc, %for.body4 ] 144 %add = add i32 %w.024, %mul 145 %arrayidx = getelementptr inbounds i16, i16* %A, i32 %add 146 %0 = load i16, i16* %arrayidx, align 2 147 %conv = sext i16 %0 to i32 148 %arrayidx5 = getelementptr inbounds i16, i16* %B, i32 %w.024 149 %1 = load i16, i16* %arrayidx5, align 2 150 %conv6 = sext i16 %1 to i32 151 %mul7 = mul nsw i32 %conv6, %conv 152 %arrayidx8 = getelementptr inbounds i32, i32* %C, i32 %w.024 153 %2 = load i32, i32* %arrayidx8, align 4 154 %add9 = add nsw i32 %mul7, %2 155 store i32 %add9, i32* %arrayidx8, align 4 156 %inc = add nuw i32 %w.024, 1 157 %exitcond = icmp eq i32 %inc, %N 158 br i1 %exitcond, label %for.cond.cleanup3, label %for.body4 159} 160 161; CHECK-LABEL: loop_call 162define arm_aapcs_vfpcc void @loop_call(i32* nocapture %C, i32* nocapture readonly %A, i32* nocapture readonly %B) local_unnamed_addr #1 { 163entry: 164 br label %for.body 165 166for.cond.cleanup: 167 ret void 168 169; CHECK-LABEL: for.body 170for.body: 171; CHECK-UNROLL-A: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV1:%[a-z.0-9]+]], %for.body ] 172; CHECK-UNROLL-A: [[IV1]] = add nuw nsw i32 [[IV0]], 1 173; CHECK-UNROLL-A: icmp eq i32 [[IV1]], 1024 174; CHECK-UNROLL-A: br 175 176; CHECK-UNROLL-T1: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV1:%[a-z.0-9]+]], %for.body ] 177; CHECK-UNROLL-T1: [[IV1]] = add nuw nsw i32 [[IV0]], 1 178; CHECK-UNROLL-T1: icmp eq i32 [[IV1]], 1024 179; CHECK-UNROLL-T1: br 180 181; CHECK-UNROLL-T2: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV1:%[a-z.0-9]+]], %for.body ] 182; CHECK-UNROLL-T2: [[IV1]] = add nuw nsw i32 [[IV0]], 1 183; CHECK-UNROLL-T2: icmp eq i32 [[IV1]], 1024 184; CHECK-UNROLL-T2: br 185 186 %i.08 = phi i32 [ 0, %entry ], [ %inc, %for.body ] 187 %arrayidx = getelementptr inbounds i32, i32* %A, i32 %i.08 188 %0 = load i32, i32* %arrayidx, align 4 189 %arrayidx1 = getelementptr inbounds i32, i32* %B, i32 %i.08 190 %1 = load i32, i32* %arrayidx1, align 4 191 %call = tail call arm_aapcs_vfpcc i32 @some_func(i32 %0, i32 %1) #3 192 %arrayidx2 = getelementptr inbounds i32, i32* %C, i32 %i.08 193 store i32 %call, i32* %arrayidx2, align 4 194 %inc = add nuw nsw i32 %i.08, 1 195 %exitcond = icmp eq i32 %inc, 1024 196 br i1 %exitcond, label %for.cond.cleanup, label %for.body 197} 198 199; CHECK-LABEL: iterate_inc 200; CHECK-UNROLL-A: %n.addr.04 = phi %struct.Node* [ %1, %while.body ], [ %n, %while.body.preheader ] 201; CHECK-UNROLL-A: %tobool = icmp eq %struct.Node* %1, null 202; CHECK-UNROLL-A: br i1 %tobool 203; CHECK-UNROLL-A-NOT: load 204 205; CHECK-UNROLL-T1: %n.addr.04 = phi %struct.Node* [ %1, %while.body ], [ %n, %while.body.preheader ] 206; CHECK-UNROLL-T1: %tobool = icmp eq %struct.Node* %1, null 207; CHECK-UNROLL-T1: br i1 %tobool 208; CHECK-UNROLL-T1-NOT: load 209 210; CHECK-UNROLL-T2: [[CMP0:%[a-z.0-9]+]] = icmp eq %struct.Node* [[VAR0:%[a-z.0-9]+]], null 211; CHECK-UNROLL-T2: br i1 [[CMP0]], label [[END:%[a-z.0-9]+]] 212; CHECK-UNROLL-T2: [[CMP1:%[a-z.0-9]+]] = icmp eq %struct.Node* [[VAR1:%[a-z.0-9]+]], null 213; CHECK-UNROLL-T2: br i1 [[CMP1]], label [[END]] 214; CHECK-UNROLL-T2: [[CMP2:%[a-z.0-9]+]] = icmp eq %struct.Node* [[VAR2:%[a-z.0-9]+]], null 215; CHECK-UNROLL-T2: br i1 [[CMP2]], label [[END]] 216; CHECK-UNROLL-T2: [[CMP3:%[a-z.0-9]+]] = icmp eq %struct.Node* [[VAR3:%[a-z.0-9]+]], null 217; CHECK-UNROLL-T2: br i1 [[CMP3]], label [[END]] 218; CHECK-UNROLL-T2: [[CMP4:%[a-z.0-9]+]] = icmp eq %struct.Node* [[VAR4:%[a-z.0-9]+]], null 219; CHECK-UNROLL-T2: br i1 [[CMP4]], label [[END]] 220; CHECK-UNROLL-T2-NOT: load 221 222%struct.Node = type { %struct.Node*, i32 } 223 224define arm_aapcscc void @iterate_inc(%struct.Node* %n) local_unnamed_addr #0 { 225entry: 226 %tobool3 = icmp eq %struct.Node* %n, null 227 br i1 %tobool3, label %while.end, label %while.body.preheader 228 229while.body.preheader: 230 br label %while.body 231 232while.body: 233 %n.addr.04 = phi %struct.Node* [ %1, %while.body ], [ %n, %while.body.preheader ] 234 %val = getelementptr inbounds %struct.Node, %struct.Node* %n.addr.04, i32 0, i32 1 235 %0 = load i32, i32* %val, align 4 236 %add = add nsw i32 %0, 1 237 store i32 %add, i32* %val, align 4 238 %next = getelementptr inbounds %struct.Node, %struct.Node* %n.addr.04, i32 0, i32 0 239 %1 = load %struct.Node*, %struct.Node** %next, align 4 240 %tobool = icmp eq %struct.Node* %1, null 241 br i1 %tobool, label %while.end, label %while.body 242 243while.end: 244 ret void 245} 246 247declare arm_aapcs_vfpcc i32 @some_func(i32, i32) local_unnamed_addr #2 248