1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -prefer-inloop-reductions -force-reduction-intrinsics -dce -instcombine -S | FileCheck %s 3 4target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 5 6define i32 @reduction_sum_single(i32* noalias nocapture %A) { 7; CHECK-LABEL: @reduction_sum_single( 8; CHECK-NEXT: entry: 9; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 10; CHECK: vector.ph: 11; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 12; CHECK: vector.body: 13; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 14; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP3:%.*]], [[VECTOR_BODY]] ] 15; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] 16; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>* 17; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4 18; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[WIDE_LOAD]]) 19; CHECK-NEXT: [[TMP3]] = add i32 [[TMP2]], [[VEC_PHI]] 20; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 21; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 22; CHECK-NEXT: br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP0:!llvm.loop !.*]] 23; CHECK: middle.block: 24; CHECK-NEXT: br i1 true, label [[DOT_CRIT_EDGE:%.*]], label [[SCALAR_PH]] 25; CHECK: scalar.ph: 26; CHECK-NEXT: br label [[DOTLR_PH:%.*]] 27; CHECK: .lr.ph: 28; CHECK-NEXT: br i1 undef, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], [[LOOP2:!llvm.loop !.*]] 29; CHECK: ._crit_edge: 30; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ undef, [[DOTLR_PH]] ], [ [[TMP3]], [[MIDDLE_BLOCK]] ] 31; CHECK-NEXT: ret i32 [[SUM_0_LCSSA]] 32; 33entry: 34 br label %.lr.ph 35 36.lr.ph: ; preds = %entry, %.lr.ph 37 %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ] 38 %sum.02 = phi i32 [ %l7, %.lr.ph ], [ 0, %entry ] 39 %l2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv 40 %l3 = load i32, i32* %l2, align 4 41 %l7 = add i32 %sum.02, %l3 42 %indvars.iv.next = add i64 %indvars.iv, 1 43 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 44 %exitcond = icmp eq i32 %lftr.wideiv, 256 45 br i1 %exitcond, label %._crit_edge, label %.lr.ph 46 47._crit_edge: ; preds = %.lr.ph 48 %sum.0.lcssa = phi i32 [ %l7, %.lr.ph ] 49 ret i32 %sum.0.lcssa 50} 51 52define i32 @reduction_sum(i32* noalias nocapture %A, i32* noalias nocapture %B) { 53; CHECK-LABEL: @reduction_sum( 54; CHECK-NEXT: entry: 55; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 56; CHECK: vector.ph: 57; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 58; CHECK: vector.body: 59; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 60; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP9:%.*]], [[VECTOR_BODY]] ] 61; CHECK-NEXT: [[VEC_IND2:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT3:%.*]], [[VECTOR_BODY]] ] 62; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] 63; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>* 64; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4 65; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]] 66; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>* 67; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4 68; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[VEC_IND2]]) 69; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], [[VEC_PHI]] 70; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[WIDE_LOAD]]) 71; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TMP6]], [[TMP5]] 72; CHECK-NEXT: [[TMP8:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[WIDE_LOAD1]]) 73; CHECK-NEXT: [[TMP9]] = add i32 [[TMP8]], [[TMP7]] 74; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 75; CHECK-NEXT: [[VEC_IND_NEXT3]] = add <4 x i32> [[VEC_IND2]], <i32 4, i32 4, i32 4, i32 4> 76; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 77; CHECK-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP4:!llvm.loop !.*]] 78; CHECK: middle.block: 79; CHECK-NEXT: br i1 true, label [[DOT_CRIT_EDGE:%.*]], label [[SCALAR_PH]] 80; CHECK: scalar.ph: 81; CHECK-NEXT: br label [[DOTLR_PH:%.*]] 82; CHECK: .lr.ph: 83; CHECK-NEXT: br i1 undef, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], [[LOOP5:!llvm.loop !.*]] 84; CHECK: ._crit_edge: 85; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ undef, [[DOTLR_PH]] ], [ [[TMP9]], [[MIDDLE_BLOCK]] ] 86; CHECK-NEXT: ret i32 [[SUM_0_LCSSA]] 87; 88entry: 89 br label %.lr.ph 90 91.lr.ph: ; preds = %entry, %.lr.ph 92 %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ] 93 %sum.02 = phi i32 [ %l9, %.lr.ph ], [ 0, %entry ] 94 %l2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv 95 %l3 = load i32, i32* %l2, align 4 96 %l4 = getelementptr inbounds i32, i32* %B, i64 %indvars.iv 97 %l5 = load i32, i32* %l4, align 4 98 %l6 = trunc i64 %indvars.iv to i32 99 %l7 = add i32 %sum.02, %l6 100 %l8 = add i32 %l7, %l3 101 %l9 = add i32 %l8, %l5 102 %indvars.iv.next = add i64 %indvars.iv, 1 103 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 104 %exitcond = icmp eq i32 %lftr.wideiv, 256 105 br i1 %exitcond, label %._crit_edge, label %.lr.ph 106 107._crit_edge: ; preds = %.lr.ph 108 %sum.0.lcssa = phi i32 [ %l9, %.lr.ph ] 109 ret i32 %sum.0.lcssa 110} 111 112define i32 @reduction_sum_const(i32* noalias nocapture %A) { 113; CHECK-LABEL: @reduction_sum_const( 114; CHECK-NEXT: entry: 115; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 116; CHECK: vector.ph: 117; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 118; CHECK: vector.body: 119; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 120; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP4:%.*]], [[VECTOR_BODY]] ] 121; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] 122; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>* 123; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4 124; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[WIDE_LOAD]]) 125; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], [[VEC_PHI]] 126; CHECK-NEXT: [[TMP4]] = add i32 [[TMP3]], 12 127; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 128; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 129; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP6:!llvm.loop !.*]] 130; CHECK: middle.block: 131; CHECK-NEXT: br i1 true, label [[DOT_CRIT_EDGE:%.*]], label [[SCALAR_PH]] 132; CHECK: scalar.ph: 133; CHECK-NEXT: br label [[DOTLR_PH:%.*]] 134; CHECK: .lr.ph: 135; CHECK-NEXT: br i1 undef, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], [[LOOP7:!llvm.loop !.*]] 136; CHECK: ._crit_edge: 137; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ undef, [[DOTLR_PH]] ], [ [[TMP4]], [[MIDDLE_BLOCK]] ] 138; CHECK-NEXT: ret i32 [[SUM_0_LCSSA]] 139; 140entry: 141 br label %.lr.ph 142 143.lr.ph: ; preds = %entry, %.lr.ph 144 %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ] 145 %sum.02 = phi i32 [ %l9, %.lr.ph ], [ 0, %entry ] 146 %l2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv 147 %l3 = load i32, i32* %l2, align 4 148 %l7 = add i32 %sum.02, %l3 149 %l9 = add i32 %l7, 3 150 %indvars.iv.next = add i64 %indvars.iv, 1 151 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 152 %exitcond = icmp eq i32 %lftr.wideiv, 256 153 br i1 %exitcond, label %._crit_edge, label %.lr.ph 154 155._crit_edge: ; preds = %.lr.ph 156 %sum.0.lcssa = phi i32 [ %l9, %.lr.ph ] 157 ret i32 %sum.0.lcssa 158} 159 160define i32 @reduction_prod(i32* noalias nocapture %A, i32* noalias nocapture %B) { 161; CHECK-LABEL: @reduction_prod( 162; CHECK-NEXT: entry: 163; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 164; CHECK: vector.ph: 165; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 166; CHECK: vector.body: 167; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 168; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 1, [[VECTOR_PH]] ], [ [[TMP9:%.*]], [[VECTOR_BODY]] ] 169; CHECK-NEXT: [[VEC_IND2:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT3:%.*]], [[VECTOR_BODY]] ] 170; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] 171; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>* 172; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4 173; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]] 174; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>* 175; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4 176; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> [[VEC_IND2]]) 177; CHECK-NEXT: [[TMP5:%.*]] = mul i32 [[TMP4]], [[VEC_PHI]] 178; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> [[WIDE_LOAD]]) 179; CHECK-NEXT: [[TMP7:%.*]] = mul i32 [[TMP6]], [[TMP5]] 180; CHECK-NEXT: [[TMP8:%.*]] = call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> [[WIDE_LOAD1]]) 181; CHECK-NEXT: [[TMP9]] = mul i32 [[TMP8]], [[TMP7]] 182; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 183; CHECK-NEXT: [[VEC_IND_NEXT3]] = add <4 x i32> [[VEC_IND2]], <i32 4, i32 4, i32 4, i32 4> 184; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 185; CHECK-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP8:!llvm.loop !.*]] 186; CHECK: middle.block: 187; CHECK-NEXT: br i1 true, label [[DOT_CRIT_EDGE:%.*]], label [[SCALAR_PH]] 188; CHECK: scalar.ph: 189; CHECK-NEXT: br label [[DOTLR_PH:%.*]] 190; CHECK: .lr.ph: 191; CHECK-NEXT: br i1 undef, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], [[LOOP9:!llvm.loop !.*]] 192; CHECK: ._crit_edge: 193; CHECK-NEXT: [[PROD_0_LCSSA:%.*]] = phi i32 [ undef, [[DOTLR_PH]] ], [ [[TMP9]], [[MIDDLE_BLOCK]] ] 194; CHECK-NEXT: ret i32 [[PROD_0_LCSSA]] 195; 196entry: 197 br label %.lr.ph 198 199.lr.ph: ; preds = %entry, %.lr.ph 200 %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ] 201 %prod.02 = phi i32 [ %l9, %.lr.ph ], [ 1, %entry ] 202 %l2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv 203 %l3 = load i32, i32* %l2, align 4 204 %l4 = getelementptr inbounds i32, i32* %B, i64 %indvars.iv 205 %l5 = load i32, i32* %l4, align 4 206 %l6 = trunc i64 %indvars.iv to i32 207 %l7 = mul i32 %prod.02, %l6 208 %l8 = mul i32 %l7, %l3 209 %l9 = mul i32 %l8, %l5 210 %indvars.iv.next = add i64 %indvars.iv, 1 211 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 212 %exitcond = icmp eq i32 %lftr.wideiv, 256 213 br i1 %exitcond, label %._crit_edge, label %.lr.ph 214 215._crit_edge: ; preds = %.lr.ph 216 %prod.0.lcssa = phi i32 [ %l9, %.lr.ph ] 217 ret i32 %prod.0.lcssa 218} 219 220define i32 @reduction_mix(i32* noalias nocapture %A, i32* noalias nocapture %B) { 221; CHECK-LABEL: @reduction_mix( 222; CHECK-NEXT: entry: 223; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 224; CHECK: vector.ph: 225; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 226; CHECK: vector.body: 227; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 228; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP8:%.*]], [[VECTOR_BODY]] ] 229; CHECK-NEXT: [[VEC_IND2:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT3:%.*]], [[VECTOR_BODY]] ] 230; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] 231; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>* 232; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4 233; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]] 234; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>* 235; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4 236; CHECK-NEXT: [[TMP4:%.*]] = mul nsw <4 x i32> [[WIDE_LOAD1]], [[WIDE_LOAD]] 237; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[VEC_IND2]]) 238; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP5]], [[VEC_PHI]] 239; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP4]]) 240; CHECK-NEXT: [[TMP8]] = add i32 [[TMP7]], [[TMP6]] 241; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 242; CHECK-NEXT: [[VEC_IND_NEXT3]] = add <4 x i32> [[VEC_IND2]], <i32 4, i32 4, i32 4, i32 4> 243; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 244; CHECK-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP10:!llvm.loop !.*]] 245; CHECK: middle.block: 246; CHECK-NEXT: br i1 true, label [[DOT_CRIT_EDGE:%.*]], label [[SCALAR_PH]] 247; CHECK: scalar.ph: 248; CHECK-NEXT: br label [[DOTLR_PH:%.*]] 249; CHECK: .lr.ph: 250; CHECK-NEXT: br i1 undef, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], [[LOOP11:!llvm.loop !.*]] 251; CHECK: ._crit_edge: 252; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ undef, [[DOTLR_PH]] ], [ [[TMP8]], [[MIDDLE_BLOCK]] ] 253; CHECK-NEXT: ret i32 [[SUM_0_LCSSA]] 254; 255entry: 256 br label %.lr.ph 257 258.lr.ph: ; preds = %entry, %.lr.ph 259 %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ] 260 %sum.02 = phi i32 [ %l9, %.lr.ph ], [ 0, %entry ] 261 %l2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv 262 %l3 = load i32, i32* %l2, align 4 263 %l4 = getelementptr inbounds i32, i32* %B, i64 %indvars.iv 264 %l5 = load i32, i32* %l4, align 4 265 %l6 = mul nsw i32 %l5, %l3 266 %l7 = trunc i64 %indvars.iv to i32 267 %l8 = add i32 %sum.02, %l7 268 %l9 = add i32 %l8, %l6 269 %indvars.iv.next = add i64 %indvars.iv, 1 270 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 271 %exitcond = icmp eq i32 %lftr.wideiv, 256 272 br i1 %exitcond, label %._crit_edge, label %.lr.ph 273 274._crit_edge: ; preds = %.lr.ph 275 %sum.0.lcssa = phi i32 [ %l9, %.lr.ph ] 276 ret i32 %sum.0.lcssa 277} 278 279define i32 @reduction_mul(i32* noalias nocapture %A, i32* noalias nocapture %B) { 280; CHECK-LABEL: @reduction_mul( 281; CHECK-NEXT: entry: 282; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 283; CHECK: vector.ph: 284; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 285; CHECK: vector.body: 286; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 287; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 19, [[VECTOR_PH]] ], [ [[TMP7:%.*]], [[VECTOR_BODY]] ] 288; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] 289; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>* 290; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4 291; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]] 292; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>* 293; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4 294; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> [[WIDE_LOAD]]) 295; CHECK-NEXT: [[TMP5:%.*]] = mul i32 [[TMP4]], [[VEC_PHI]] 296; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> [[WIDE_LOAD1]]) 297; CHECK-NEXT: [[TMP7]] = mul i32 [[TMP6]], [[TMP5]] 298; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 299; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 300; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP12:!llvm.loop !.*]] 301; CHECK: middle.block: 302; CHECK-NEXT: br i1 true, label [[DOT_CRIT_EDGE:%.*]], label [[SCALAR_PH]] 303; CHECK: scalar.ph: 304; CHECK-NEXT: br label [[DOTLR_PH:%.*]] 305; CHECK: .lr.ph: 306; CHECK-NEXT: br i1 undef, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], [[LOOP13:!llvm.loop !.*]] 307; CHECK: ._crit_edge: 308; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ undef, [[DOTLR_PH]] ], [ [[TMP7]], [[MIDDLE_BLOCK]] ] 309; CHECK-NEXT: ret i32 [[SUM_0_LCSSA]] 310; 311entry: 312 br label %.lr.ph 313 314.lr.ph: ; preds = %entry, %.lr.ph 315 %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ] 316 %sum.02 = phi i32 [ %l7, %.lr.ph ], [ 19, %entry ] 317 %l2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv 318 %l3 = load i32, i32* %l2, align 4 319 %l4 = getelementptr inbounds i32, i32* %B, i64 %indvars.iv 320 %l5 = load i32, i32* %l4, align 4 321 %l6 = mul i32 %sum.02, %l3 322 %l7 = mul i32 %l6, %l5 323 %indvars.iv.next = add i64 %indvars.iv, 1 324 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 325 %exitcond = icmp eq i32 %lftr.wideiv, 256 326 br i1 %exitcond, label %._crit_edge, label %.lr.ph 327 328._crit_edge: ; preds = %.lr.ph 329 %sum.0.lcssa = phi i32 [ %l7, %.lr.ph ] 330 ret i32 %sum.0.lcssa 331} 332 333define i32 @start_at_non_zero(i32* nocapture %in, i32* nocapture %coeff, i32* nocapture %out) { 334; CHECK-LABEL: @start_at_non_zero( 335; CHECK-NEXT: entry: 336; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 337; CHECK: vector.ph: 338; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 339; CHECK: vector.body: 340; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 341; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 120, [[VECTOR_PH]] ], [ [[TMP6:%.*]], [[VECTOR_BODY]] ] 342; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[IN:%.*]], i64 [[INDEX]] 343; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>* 344; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4 345; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[COEFF:%.*]], i64 [[INDEX]] 346; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>* 347; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4 348; CHECK-NEXT: [[TMP4:%.*]] = mul nsw <4 x i32> [[WIDE_LOAD1]], [[WIDE_LOAD]] 349; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP4]]) 350; CHECK-NEXT: [[TMP6]] = add i32 [[TMP5]], [[VEC_PHI]] 351; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 352; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 353; CHECK-NEXT: br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP14:!llvm.loop !.*]] 354; CHECK: middle.block: 355; CHECK-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]] 356; CHECK: scalar.ph: 357; CHECK-NEXT: br label [[FOR_BODY:%.*]] 358; CHECK: for.body: 359; CHECK-NEXT: br i1 undef, label [[FOR_END]], label [[FOR_BODY]], [[LOOP15:!llvm.loop !.*]] 360; CHECK: for.end: 361; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ undef, [[FOR_BODY]] ], [ [[TMP6]], [[MIDDLE_BLOCK]] ] 362; CHECK-NEXT: ret i32 [[SUM_0_LCSSA]] 363; 364entry: 365 br label %for.body 366 367for.body: ; preds = %entry, %for.body 368 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] 369 %sum.09 = phi i32 [ %add, %for.body ], [ 120, %entry ] 370 %arrayidx = getelementptr inbounds i32, i32* %in, i64 %indvars.iv 371 %l0 = load i32, i32* %arrayidx, align 4 372 %arrayidx2 = getelementptr inbounds i32, i32* %coeff, i64 %indvars.iv 373 %l1 = load i32, i32* %arrayidx2, align 4 374 %mul = mul nsw i32 %l1, %l0 375 %add = add nsw i32 %mul, %sum.09 376 %indvars.iv.next = add i64 %indvars.iv, 1 377 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 378 %exitcond = icmp eq i32 %lftr.wideiv, 256 379 br i1 %exitcond, label %for.end, label %for.body 380 381for.end: ; preds = %for.body, %entry 382 %sum.0.lcssa = phi i32 [ %add, %for.body ] 383 ret i32 %sum.0.lcssa 384} 385 386define i32 @reduction_and(i32* nocapture %A, i32* nocapture %B) { 387; CHECK-LABEL: @reduction_and( 388; CHECK-NEXT: entry: 389; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 390; CHECK: vector.ph: 391; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 392; CHECK: vector.body: 393; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 394; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ -1, [[VECTOR_PH]] ], [ [[TMP7:%.*]], [[VECTOR_BODY]] ] 395; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] 396; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>* 397; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4 398; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]] 399; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>* 400; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4 401; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> [[WIDE_LOAD]]) 402; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP4]], [[VEC_PHI]] 403; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> [[WIDE_LOAD1]]) 404; CHECK-NEXT: [[TMP7]] = and i32 [[TMP6]], [[TMP5]] 405; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 406; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 407; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP16:!llvm.loop !.*]] 408; CHECK: middle.block: 409; CHECK-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]] 410; CHECK: scalar.ph: 411; CHECK-NEXT: br label [[FOR_BODY:%.*]] 412; CHECK: for.body: 413; CHECK-NEXT: br i1 undef, label [[FOR_END]], label [[FOR_BODY]], [[LOOP17:!llvm.loop !.*]] 414; CHECK: for.end: 415; CHECK-NEXT: [[RESULT_0_LCSSA:%.*]] = phi i32 [ undef, [[FOR_BODY]] ], [ [[TMP7]], [[MIDDLE_BLOCK]] ] 416; CHECK-NEXT: ret i32 [[RESULT_0_LCSSA]] 417; 418entry: 419 br label %for.body 420 421for.body: ; preds = %entry, %for.body 422 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] 423 %result.08 = phi i32 [ %and, %for.body ], [ -1, %entry ] 424 %arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv 425 %l0 = load i32, i32* %arrayidx, align 4 426 %arrayidx2 = getelementptr inbounds i32, i32* %B, i64 %indvars.iv 427 %l1 = load i32, i32* %arrayidx2, align 4 428 %add = and i32 %result.08, %l0 429 %and = and i32 %add, %l1 430 %indvars.iv.next = add i64 %indvars.iv, 1 431 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 432 %exitcond = icmp eq i32 %lftr.wideiv, 256 433 br i1 %exitcond, label %for.end, label %for.body 434 435for.end: ; preds = %for.body, %entry 436 %result.0.lcssa = phi i32 [ %and, %for.body ] 437 ret i32 %result.0.lcssa 438} 439 440define i32 @reduction_or(i32* nocapture %A, i32* nocapture %B) { 441; CHECK-LABEL: @reduction_or( 442; CHECK-NEXT: entry: 443; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 444; CHECK: vector.ph: 445; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 446; CHECK: vector.body: 447; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 448; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP6:%.*]], [[VECTOR_BODY]] ] 449; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] 450; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>* 451; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4 452; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]] 453; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>* 454; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4 455; CHECK-NEXT: [[TMP4:%.*]] = add nsw <4 x i32> [[WIDE_LOAD1]], [[WIDE_LOAD]] 456; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> [[TMP4]]) 457; CHECK-NEXT: [[TMP6]] = or i32 [[TMP5]], [[VEC_PHI]] 458; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 459; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 460; CHECK-NEXT: br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP18:!llvm.loop !.*]] 461; CHECK: middle.block: 462; CHECK-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]] 463; CHECK: scalar.ph: 464; CHECK-NEXT: br label [[FOR_BODY:%.*]] 465; CHECK: for.body: 466; CHECK-NEXT: br i1 undef, label [[FOR_END]], label [[FOR_BODY]], [[LOOP19:!llvm.loop !.*]] 467; CHECK: for.end: 468; CHECK-NEXT: [[RESULT_0_LCSSA:%.*]] = phi i32 [ undef, [[FOR_BODY]] ], [ [[TMP6]], [[MIDDLE_BLOCK]] ] 469; CHECK-NEXT: ret i32 [[RESULT_0_LCSSA]] 470; 471entry: 472 br label %for.body 473 474for.body: ; preds = %entry, %for.body 475 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] 476 %result.08 = phi i32 [ %or, %for.body ], [ 0, %entry ] 477 %arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv 478 %l0 = load i32, i32* %arrayidx, align 4 479 %arrayidx2 = getelementptr inbounds i32, i32* %B, i64 %indvars.iv 480 %l1 = load i32, i32* %arrayidx2, align 4 481 %add = add nsw i32 %l1, %l0 482 %or = or i32 %add, %result.08 483 %indvars.iv.next = add i64 %indvars.iv, 1 484 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 485 %exitcond = icmp eq i32 %lftr.wideiv, 256 486 br i1 %exitcond, label %for.end, label %for.body 487 488for.end: ; preds = %for.body, %entry 489 %result.0.lcssa = phi i32 [ %or, %for.body ] 490 ret i32 %result.0.lcssa 491} 492 493define i32 @reduction_xor(i32* nocapture %A, i32* nocapture %B) { 494; CHECK-LABEL: @reduction_xor( 495; CHECK-NEXT: entry: 496; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 497; CHECK: vector.ph: 498; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 499; CHECK: vector.body: 500; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 501; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP6:%.*]], [[VECTOR_BODY]] ] 502; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] 503; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>* 504; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4 505; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]] 506; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>* 507; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4 508; CHECK-NEXT: [[TMP4:%.*]] = add nsw <4 x i32> [[WIDE_LOAD1]], [[WIDE_LOAD]] 509; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.vector.reduce.xor.v4i32(<4 x i32> [[TMP4]]) 510; CHECK-NEXT: [[TMP6]] = xor i32 [[TMP5]], [[VEC_PHI]] 511; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 512; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 513; CHECK-NEXT: br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP20:!llvm.loop !.*]] 514; CHECK: middle.block: 515; CHECK-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]] 516; CHECK: scalar.ph: 517; CHECK-NEXT: br label [[FOR_BODY:%.*]] 518; CHECK: for.body: 519; CHECK-NEXT: br i1 undef, label [[FOR_END]], label [[FOR_BODY]], [[LOOP21:!llvm.loop !.*]] 520; CHECK: for.end: 521; CHECK-NEXT: [[RESULT_0_LCSSA:%.*]] = phi i32 [ undef, [[FOR_BODY]] ], [ [[TMP6]], [[MIDDLE_BLOCK]] ] 522; CHECK-NEXT: ret i32 [[RESULT_0_LCSSA]] 523; 524entry: 525 br label %for.body 526 527for.body: ; preds = %entry, %for.body 528 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] 529 %result.08 = phi i32 [ %xor, %for.body ], [ 0, %entry ] 530 %arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv 531 %l0 = load i32, i32* %arrayidx, align 4 532 %arrayidx2 = getelementptr inbounds i32, i32* %B, i64 %indvars.iv 533 %l1 = load i32, i32* %arrayidx2, align 4 534 %add = add nsw i32 %l1, %l0 535 %xor = xor i32 %add, %result.08 536 %indvars.iv.next = add i64 %indvars.iv, 1 537 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 538 %exitcond = icmp eq i32 %lftr.wideiv, 256 539 br i1 %exitcond, label %for.end, label %for.body 540 541for.end: ; preds = %for.body, %entry 542 %result.0.lcssa = phi i32 [ %xor, %for.body ] 543 ret i32 %result.0.lcssa 544} 545 546define float @reduction_fadd(float* nocapture %A, float* nocapture %B) { 547; CHECK-LABEL: @reduction_fadd( 548; CHECK-NEXT: entry: 549; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 550; CHECK: vector.ph: 551; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 552; CHECK: vector.body: 553; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 554; CHECK-NEXT: [[VEC_PHI:%.*]] = phi float [ 0.000000e+00, [[VECTOR_PH]] ], [ [[TMP7:%.*]], [[VECTOR_BODY]] ] 555; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds float, float* [[A:%.*]], i64 [[INDEX]] 556; CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[TMP0]] to <4 x float>* 557; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, <4 x float>* [[TMP1]], align 4 558; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 [[INDEX]] 559; CHECK-NEXT: [[TMP3:%.*]] = bitcast float* [[TMP2]] to <4 x float>* 560; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x float>, <4 x float>* [[TMP3]], align 4 561; CHECK-NEXT: [[TMP4:%.*]] = call fast float @llvm.vector.reduce.fadd.v4f32(float -0.000000e+00, <4 x float> [[WIDE_LOAD]]) 562; CHECK-NEXT: [[TMP5:%.*]] = fadd float [[TMP4]], [[VEC_PHI]] 563; CHECK-NEXT: [[TMP6:%.*]] = call fast float @llvm.vector.reduce.fadd.v4f32(float -0.000000e+00, <4 x float> [[WIDE_LOAD1]]) 564; CHECK-NEXT: [[TMP7]] = fadd float [[TMP6]], [[TMP5]] 565; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 566; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 567; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP22:!llvm.loop !.*]] 568; CHECK: middle.block: 569; CHECK-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]] 570; CHECK: scalar.ph: 571; CHECK-NEXT: br label [[FOR_BODY:%.*]] 572; CHECK: for.body: 573; CHECK-NEXT: br i1 undef, label [[FOR_END]], label [[FOR_BODY]], [[LOOP23:!llvm.loop !.*]] 574; CHECK: for.end: 575; CHECK-NEXT: [[RESULT_0_LCSSA:%.*]] = phi float [ undef, [[FOR_BODY]] ], [ [[TMP7]], [[MIDDLE_BLOCK]] ] 576; CHECK-NEXT: ret float [[RESULT_0_LCSSA]] 577; 578entry: 579 br label %for.body 580 581for.body: ; preds = %entry, %for.body 582 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] 583 %result.08 = phi float [ %fadd, %for.body ], [ 0.0, %entry ] 584 %arrayidx = getelementptr inbounds float, float* %A, i64 %indvars.iv 585 %l0 = load float, float* %arrayidx, align 4 586 %arrayidx2 = getelementptr inbounds float, float* %B, i64 %indvars.iv 587 %l1 = load float, float* %arrayidx2, align 4 588 %add = fadd fast float %result.08, %l0 589 %fadd = fadd fast float %add, %l1 590 %indvars.iv.next = add i64 %indvars.iv, 1 591 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 592 %exitcond = icmp eq i32 %lftr.wideiv, 256 593 br i1 %exitcond, label %for.end, label %for.body 594 595for.end: ; preds = %for.body, %entry 596 %result.0.lcssa = phi float [ %fadd, %for.body ] 597 ret float %result.0.lcssa 598} 599 600define float @reduction_fmul(float* nocapture %A, float* nocapture %B) { 601; CHECK-LABEL: @reduction_fmul( 602; CHECK-NEXT: entry: 603; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 604; CHECK: vector.ph: 605; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 606; CHECK: vector.body: 607; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 608; CHECK-NEXT: [[VEC_PHI:%.*]] = phi float [ 0.000000e+00, [[VECTOR_PH]] ], [ [[TMP7:%.*]], [[VECTOR_BODY]] ] 609; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds float, float* [[A:%.*]], i64 [[INDEX]] 610; CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[TMP0]] to <4 x float>* 611; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, <4 x float>* [[TMP1]], align 4 612; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 [[INDEX]] 613; CHECK-NEXT: [[TMP3:%.*]] = bitcast float* [[TMP2]] to <4 x float>* 614; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x float>, <4 x float>* [[TMP3]], align 4 615; CHECK-NEXT: [[TMP4:%.*]] = call fast float @llvm.vector.reduce.fmul.v4f32(float 1.000000e+00, <4 x float> [[WIDE_LOAD]]) 616; CHECK-NEXT: [[TMP5:%.*]] = fmul float [[TMP4]], [[VEC_PHI]] 617; CHECK-NEXT: [[TMP6:%.*]] = call fast float @llvm.vector.reduce.fmul.v4f32(float 1.000000e+00, <4 x float> [[WIDE_LOAD1]]) 618; CHECK-NEXT: [[TMP7]] = fmul float [[TMP6]], [[TMP5]] 619; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 620; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 621; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP24:!llvm.loop !.*]] 622; CHECK: middle.block: 623; CHECK-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]] 624; CHECK: scalar.ph: 625; CHECK-NEXT: br label [[FOR_BODY:%.*]] 626; CHECK: for.body: 627; CHECK-NEXT: br i1 undef, label [[FOR_END]], label [[FOR_BODY]], [[LOOP25:!llvm.loop !.*]] 628; CHECK: for.end: 629; CHECK-NEXT: [[RESULT_0_LCSSA:%.*]] = phi float [ undef, [[FOR_BODY]] ], [ [[TMP7]], [[MIDDLE_BLOCK]] ] 630; CHECK-NEXT: ret float [[RESULT_0_LCSSA]] 631; 632entry: 633 br label %for.body 634 635for.body: ; preds = %entry, %for.body 636 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] 637 %result.08 = phi float [ %fmul, %for.body ], [ 0.0, %entry ] 638 %arrayidx = getelementptr inbounds float, float* %A, i64 %indvars.iv 639 %l0 = load float, float* %arrayidx, align 4 640 %arrayidx2 = getelementptr inbounds float, float* %B, i64 %indvars.iv 641 %l1 = load float, float* %arrayidx2, align 4 642 %add = fmul fast float %result.08, %l0 643 %fmul = fmul fast float %add, %l1 644 %indvars.iv.next = add i64 %indvars.iv, 1 645 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 646 %exitcond = icmp eq i32 %lftr.wideiv, 256 647 br i1 %exitcond, label %for.end, label %for.body 648 649for.end: ; preds = %for.body, %entry 650 %result.0.lcssa = phi float [ %fmul, %for.body ] 651 ret float %result.0.lcssa 652} 653 654define i32 @reduction_min(i32* nocapture %A, i32* nocapture %B) { 655; CHECK-LABEL: @reduction_min( 656; CHECK-NEXT: entry: 657; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 658; CHECK: vector.ph: 659; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 660; CHECK: vector.body: 661; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 662; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 1000, [[VECTOR_PH]] ], [ [[RDX_MINMAX_SELECT:%.*]], [[VECTOR_BODY]] ] 663; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] 664; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>* 665; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4 666; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.vector.reduce.smin.v4i32(<4 x i32> [[WIDE_LOAD]]) 667; CHECK-NEXT: [[RDX_MINMAX_CMP:%.*]] = icmp slt i32 [[TMP2]], [[VEC_PHI]] 668; CHECK-NEXT: [[RDX_MINMAX_SELECT]] = select i1 [[RDX_MINMAX_CMP]], i32 [[TMP2]], i32 [[VEC_PHI]] 669; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 670; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 671; CHECK-NEXT: br i1 [[TMP3]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP26:!llvm.loop !.*]] 672; CHECK: middle.block: 673; CHECK-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]] 674; CHECK: scalar.ph: 675; CHECK-NEXT: br label [[FOR_BODY:%.*]] 676; CHECK: for.body: 677; CHECK-NEXT: br i1 undef, label [[FOR_END]], label [[FOR_BODY]], [[LOOP27:!llvm.loop !.*]] 678; CHECK: for.end: 679; CHECK-NEXT: [[RESULT_0_LCSSA:%.*]] = phi i32 [ undef, [[FOR_BODY]] ], [ [[RDX_MINMAX_SELECT]], [[MIDDLE_BLOCK]] ] 680; CHECK-NEXT: ret i32 [[RESULT_0_LCSSA]] 681; 682entry: 683 br label %for.body 684 685for.body: ; preds = %entry, %for.body 686 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] 687 %result.08 = phi i32 [ %v0, %for.body ], [ 1000, %entry ] 688 %arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv 689 %l0 = load i32, i32* %arrayidx, align 4 690 %c0 = icmp slt i32 %result.08, %l0 691 %v0 = select i1 %c0, i32 %result.08, i32 %l0 692 %indvars.iv.next = add i64 %indvars.iv, 1 693 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 694 %exitcond = icmp eq i32 %lftr.wideiv, 256 695 br i1 %exitcond, label %for.end, label %for.body 696 697for.end: ; preds = %for.body, %entry 698 %result.0.lcssa = phi i32 [ %v0, %for.body ] 699 ret i32 %result.0.lcssa 700} 701 702define i32 @reduction_max(i32* nocapture %A, i32* nocapture %B) { 703; CHECK-LABEL: @reduction_max( 704; CHECK-NEXT: entry: 705; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 706; CHECK: vector.ph: 707; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 708; CHECK: vector.body: 709; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 710; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 1000, [[VECTOR_PH]] ], [ [[RDX_MINMAX_SELECT:%.*]], [[VECTOR_BODY]] ] 711; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] 712; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>* 713; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4 714; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.vector.reduce.umax.v4i32(<4 x i32> [[WIDE_LOAD]]) 715; CHECK-NEXT: [[RDX_MINMAX_CMP:%.*]] = icmp ugt i32 [[TMP2]], [[VEC_PHI]] 716; CHECK-NEXT: [[RDX_MINMAX_SELECT]] = select i1 [[RDX_MINMAX_CMP]], i32 [[TMP2]], i32 [[VEC_PHI]] 717; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 718; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 719; CHECK-NEXT: br i1 [[TMP3]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP28:!llvm.loop !.*]] 720; CHECK: middle.block: 721; CHECK-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]] 722; CHECK: scalar.ph: 723; CHECK-NEXT: br label [[FOR_BODY:%.*]] 724; CHECK: for.body: 725; CHECK-NEXT: br i1 undef, label [[FOR_END]], label [[FOR_BODY]], [[LOOP29:!llvm.loop !.*]] 726; CHECK: for.end: 727; CHECK-NEXT: [[RESULT_0_LCSSA:%.*]] = phi i32 [ undef, [[FOR_BODY]] ], [ [[RDX_MINMAX_SELECT]], [[MIDDLE_BLOCK]] ] 728; CHECK-NEXT: ret i32 [[RESULT_0_LCSSA]] 729; 730entry: 731 br label %for.body 732 733for.body: ; preds = %entry, %for.body 734 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] 735 %result.08 = phi i32 [ %v0, %for.body ], [ 1000, %entry ] 736 %arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv 737 %l0 = load i32, i32* %arrayidx, align 4 738 %c0 = icmp ugt i32 %result.08, %l0 739 %v0 = select i1 %c0, i32 %result.08, i32 %l0 740 %indvars.iv.next = add i64 %indvars.iv, 1 741 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 742 %exitcond = icmp eq i32 %lftr.wideiv, 256 743 br i1 %exitcond, label %for.end, label %for.body 744 745for.end: ; preds = %for.body, %entry 746 %result.0.lcssa = phi i32 [ %v0, %for.body ] 747 ret i32 %result.0.lcssa 748} 749 750; Sub we can create a reduction, but not inloop 751define i32 @reduction_sub_lhs(i32* noalias nocapture %A) { 752; CHECK-LABEL: @reduction_sub_lhs( 753; CHECK-NEXT: entry: 754; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 755; CHECK: vector.ph: 756; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 757; CHECK: vector.body: 758; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 759; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP2:%.*]], [[VECTOR_BODY]] ] 760; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] 761; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>* 762; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4 763; CHECK-NEXT: [[TMP2]] = sub <4 x i32> [[VEC_PHI]], [[WIDE_LOAD]] 764; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 765; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 766; CHECK-NEXT: br i1 [[TMP3]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP30:!llvm.loop !.*]] 767; CHECK: middle.block: 768; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP2]]) 769; CHECK-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]] 770; CHECK: scalar.ph: 771; CHECK-NEXT: br label [[FOR_BODY:%.*]] 772; CHECK: for.body: 773; CHECK-NEXT: br i1 undef, label [[FOR_END]], label [[FOR_BODY]], [[LOOP31:!llvm.loop !.*]] 774; CHECK: for.end: 775; CHECK-NEXT: [[X_0_LCSSA:%.*]] = phi i32 [ undef, [[FOR_BODY]] ], [ [[TMP4]], [[MIDDLE_BLOCK]] ] 776; CHECK-NEXT: ret i32 [[X_0_LCSSA]] 777; 778entry: 779 br label %for.body 780 781for.body: ; preds = %entry, %for.body 782 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] 783 %x.05 = phi i32 [ %sub, %for.body ], [ 0, %entry ] 784 %arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv 785 %l0 = load i32, i32* %arrayidx, align 4 786 %sub = sub nsw i32 %x.05, %l0 787 %indvars.iv.next = add i64 %indvars.iv, 1 788 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 789 %exitcond = icmp eq i32 %lftr.wideiv, 256 790 br i1 %exitcond, label %for.end, label %for.body 791 792for.end: ; preds = %for.body, %entry 793 %x.0.lcssa = phi i32 [ %sub, %for.body ] 794 ret i32 %x.0.lcssa 795} 796 797; Conditional reductions with multi-input phis. 798define float @reduction_conditional(float* %A, float* %B, float* %C, float %S) { 799; CHECK-LABEL: @reduction_conditional( 800; CHECK-NEXT: entry: 801; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 802; CHECK: vector.ph: 803; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> <float undef, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00>, float [[S:%.*]], i32 0 804; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 805; CHECK: vector.body: 806; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 807; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ [[TMP0]], [[VECTOR_PH]] ], [ [[PREDPHI3:%.*]], [[VECTOR_BODY]] ] 808; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds float, float* [[A:%.*]], i64 [[INDEX]] 809; CHECK-NEXT: [[TMP2:%.*]] = bitcast float* [[TMP1]] to <4 x float>* 810; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, <4 x float>* [[TMP2]], align 4 811; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 [[INDEX]] 812; CHECK-NEXT: [[TMP4:%.*]] = bitcast float* [[TMP3]] to <4 x float>* 813; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x float>, <4 x float>* [[TMP4]], align 4 814; CHECK-NEXT: [[TMP5:%.*]] = fcmp ogt <4 x float> [[WIDE_LOAD]], [[WIDE_LOAD1]] 815; CHECK-NEXT: [[TMP6:%.*]] = fcmp ule <4 x float> [[WIDE_LOAD1]], <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> 816; CHECK-NEXT: [[TMP7:%.*]] = fcmp ogt <4 x float> [[WIDE_LOAD]], <float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00> 817; CHECK-NEXT: [[TMP8:%.*]] = and <4 x i1> [[TMP6]], [[TMP5]] 818; CHECK-NEXT: [[TMP9:%.*]] = and <4 x i1> [[TMP7]], [[TMP8]] 819; CHECK-NEXT: [[TMP10:%.*]] = xor <4 x i1> [[TMP7]], <i1 true, i1 true, i1 true, i1 true> 820; CHECK-NEXT: [[TMP11:%.*]] = and <4 x i1> [[TMP8]], [[TMP10]] 821; CHECK-NEXT: [[TMP12:%.*]] = xor <4 x i1> [[TMP5]], <i1 true, i1 true, i1 true, i1 true> 822; CHECK-NEXT: [[PREDPHI_V:%.*]] = select <4 x i1> [[TMP9]], <4 x float> [[WIDE_LOAD1]], <4 x float> [[WIDE_LOAD]] 823; CHECK-NEXT: [[PREDPHI:%.*]] = fadd fast <4 x float> [[VEC_PHI]], [[PREDPHI_V]] 824; CHECK-NEXT: [[TMP13:%.*]] = or <4 x i1> [[TMP11]], [[TMP12]] 825; CHECK-NEXT: [[PREDPHI3]] = select <4 x i1> [[TMP13]], <4 x float> [[VEC_PHI]], <4 x float> [[PREDPHI]] 826; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 827; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128 828; CHECK-NEXT: br i1 [[TMP14]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP32:!llvm.loop !.*]] 829; CHECK: middle.block: 830; CHECK-NEXT: [[TMP15:%.*]] = call fast float @llvm.vector.reduce.fadd.v4f32(float -0.000000e+00, <4 x float> [[PREDPHI3]]) 831; CHECK-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]] 832; CHECK: scalar.ph: 833; CHECK-NEXT: br label [[FOR_BODY:%.*]] 834; CHECK: for.body: 835; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[FOR_INC:%.*]] 836; CHECK: if.then: 837; CHECK-NEXT: br i1 undef, label [[IF_THEN8:%.*]], label [[IF_ELSE:%.*]] 838; CHECK: if.then8: 839; CHECK-NEXT: br label [[FOR_INC]] 840; CHECK: if.else: 841; CHECK-NEXT: br i1 undef, label [[IF_THEN16:%.*]], label [[FOR_INC]] 842; CHECK: if.then16: 843; CHECK-NEXT: br label [[FOR_INC]] 844; CHECK: for.inc: 845; CHECK-NEXT: br i1 undef, label [[FOR_BODY]], label [[FOR_END]], [[LOOP33:!llvm.loop !.*]] 846; CHECK: for.end: 847; CHECK-NEXT: [[SUM_1_LCSSA:%.*]] = phi float [ undef, [[FOR_INC]] ], [ [[TMP15]], [[MIDDLE_BLOCK]] ] 848; CHECK-NEXT: ret float [[SUM_1_LCSSA]] 849; 850entry: 851 br label %for.body 852 853for.body: 854 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.inc ] 855 %sum.033 = phi float [ %S, %entry ], [ %sum.1, %for.inc ] 856 %arrayidx = getelementptr inbounds float, float* %A, i64 %indvars.iv 857 %l0 = load float, float* %arrayidx, align 4 858 %arrayidx2 = getelementptr inbounds float, float* %B, i64 %indvars.iv 859 %l1 = load float, float* %arrayidx2, align 4 860 %cmp3 = fcmp ogt float %l0, %l1 861 br i1 %cmp3, label %if.then, label %for.inc 862 863if.then: 864 %cmp6 = fcmp ogt float %l1, 1.000000e+00 865 br i1 %cmp6, label %if.then8, label %if.else 866 867if.then8: 868 %add = fadd fast float %sum.033, %l0 869 br label %for.inc 870 871if.else: 872 %cmp14 = fcmp ogt float %l0, 2.000000e+00 873 br i1 %cmp14, label %if.then16, label %for.inc 874 875if.then16: 876 %add19 = fadd fast float %sum.033, %l1 877 br label %for.inc 878 879for.inc: 880 %sum.1 = phi float [ %add, %if.then8 ], [ %add19, %if.then16 ], [ %sum.033, %if.else ], [ %sum.033, %for.body ] 881 %indvars.iv.next = add i64 %indvars.iv, 1 882 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 883 %exitcond = icmp ne i32 %lftr.wideiv, 128 884 br i1 %exitcond, label %for.body, label %for.end 885 886for.end: 887 %sum.1.lcssa = phi float [ %sum.1, %for.inc ] 888 ret float %sum.1.lcssa 889} 890 891define i32 @reduction_sum_multiuse(i32* noalias nocapture %A, i32* noalias nocapture %B) { 892; CHECK-LABEL: @reduction_sum_multiuse( 893; CHECK-NEXT: entry: 894; CHECK-NEXT: br label [[DOTLR_PH:%.*]] 895; CHECK: .lr.ph: 896; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[DOTLR_PH]] ], [ 0, [[ENTRY:%.*]] ] 897; CHECK-NEXT: [[SUM_02:%.*]] = phi i32 [ [[L10:%.*]], [[DOTLR_PH]] ], [ 0, [[ENTRY]] ] 898; CHECK-NEXT: [[L2:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDVARS_IV]] 899; CHECK-NEXT: [[L3:%.*]] = load i32, i32* [[L2]], align 4 900; CHECK-NEXT: [[L6:%.*]] = trunc i64 [[INDVARS_IV]] to i32 901; CHECK-NEXT: [[L7:%.*]] = add i32 [[SUM_02]], [[L6]] 902; CHECK-NEXT: [[L8:%.*]] = add i32 [[L7]], [[L3]] 903; CHECK-NEXT: [[L10]] = add i32 [[L8]], [[SUM_02]] 904; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 1 905; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 906; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], 256 907; CHECK-NEXT: br i1 [[EXITCOND]], label [[END:%.*]], label [[DOTLR_PH]] 908; CHECK: end: 909; CHECK-NEXT: ret i32 [[L10]] 910; 911entry: 912 br label %.lr.ph 913 914.lr.ph: ; preds = %entry, %.lr.ph 915 %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ] 916 %sum.02 = phi i32 [ %l10, %.lr.ph ], [ 0, %entry ] 917 %l2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv 918 %l3 = load i32, i32* %l2, align 4 919 %l4 = getelementptr inbounds i32, i32* %B, i64 %indvars.iv 920 %l5 = load i32, i32* %l4, align 4 921 %l6 = trunc i64 %indvars.iv to i32 922 %l7 = add i32 %sum.02, %l6 923 %l8 = add i32 %l7, %l3 924 %l9 = add i32 %l8, %l5 925 %l10 = add i32 %l8, %sum.02 926 %indvars.iv.next = add i64 %indvars.iv, 1 927 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 928 %exitcond = icmp eq i32 %lftr.wideiv, 256 929 br i1 %exitcond, label %end, label %.lr.ph 930 931end: 932 %f1 = phi i32 [ %l10, %.lr.ph ] 933 ret i32 %f1 934} 935 936; Predicated loop, cannot (yet) use in-loop reductions. 937define i32 @reduction_predicated(i32* noalias nocapture %A, i32* noalias nocapture %B) { 938; CHECK-LABEL: @reduction_predicated( 939; CHECK-NEXT: entry: 940; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 941; CHECK: vector.ph: 942; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 943; CHECK: vector.body: 944; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 945; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP9:%.*]], [[VECTOR_BODY]] ] 946; CHECK-NEXT: [[VEC_IND2:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT3:%.*]], [[VECTOR_BODY]] ] 947; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] 948; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>* 949; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4 950; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]] 951; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>* 952; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4 953; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[VEC_IND2]]) 954; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], [[VEC_PHI]] 955; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[WIDE_LOAD]]) 956; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TMP6]], [[TMP5]] 957; CHECK-NEXT: [[TMP8:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[WIDE_LOAD1]]) 958; CHECK-NEXT: [[TMP9]] = add i32 [[TMP8]], [[TMP7]] 959; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 960; CHECK-NEXT: [[VEC_IND_NEXT3]] = add <4 x i32> [[VEC_IND2]], <i32 4, i32 4, i32 4, i32 4> 961; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 962; CHECK-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP34:!llvm.loop !.*]] 963; CHECK: middle.block: 964; CHECK-NEXT: br i1 true, label [[DOT_CRIT_EDGE:%.*]], label [[SCALAR_PH]] 965; CHECK: scalar.ph: 966; CHECK-NEXT: br label [[DOTLR_PH:%.*]] 967; CHECK: .lr.ph: 968; CHECK-NEXT: br i1 undef, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], [[LOOP35:!llvm.loop !.*]] 969; CHECK: ._crit_edge: 970; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ undef, [[DOTLR_PH]] ], [ [[TMP9]], [[MIDDLE_BLOCK]] ] 971; CHECK-NEXT: ret i32 [[SUM_0_LCSSA]] 972; 973entry: 974 br label %.lr.ph 975 976.lr.ph: ; preds = %entry, %.lr.ph 977 %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ] 978 %sum.02 = phi i32 [ %l9, %.lr.ph ], [ 0, %entry ] 979 %l2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv 980 %l3 = load i32, i32* %l2, align 4 981 %l4 = getelementptr inbounds i32, i32* %B, i64 %indvars.iv 982 %l5 = load i32, i32* %l4, align 4 983 %l6 = trunc i64 %indvars.iv to i32 984 %l7 = add i32 %sum.02, %l6 985 %l8 = add i32 %l7, %l3 986 %l9 = add i32 %l8, %l5 987 %indvars.iv.next = add i64 %indvars.iv, 1 988 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 989 %exitcond = icmp eq i32 %lftr.wideiv, 256 990 br i1 %exitcond, label %._crit_edge, label %.lr.ph, !llvm.loop !6 991 992._crit_edge: ; preds = %.lr.ph 993 %sum.0.lcssa = phi i32 [ %l9, %.lr.ph ] 994 ret i32 %sum.0.lcssa 995} 996 997define i8 @reduction_add_trunc(i8* noalias nocapture %A) { 998; CHECK-LABEL: @reduction_add_trunc( 999; CHECK-NEXT: entry: 1000; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 1001; CHECK: vector.ph: 1002; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 1003; CHECK: vector.body: 1004; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 1005; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i8> [ <i8 -1, i8 0, i8 0, i8 0>, [[VECTOR_PH]] ], [ [[TMP3:%.*]], [[VECTOR_BODY]] ] 1006; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[INDEX]] to i64 1007; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i8, i8* [[A:%.*]], i64 [[TMP0]] 1008; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to <4 x i8>* 1009; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i8>, <4 x i8>* [[TMP2]], align 4 1010; CHECK-NEXT: [[TMP3]] = add <4 x i8> [[VEC_PHI]], [[WIDE_LOAD]] 1011; CHECK-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 4 1012; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[INDEX_NEXT]], 256 1013; CHECK-NEXT: br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP36:!llvm.loop !.*]] 1014; CHECK: middle.block: 1015; CHECK-NEXT: [[TMP5:%.*]] = call i8 @llvm.vector.reduce.add.v4i8(<4 x i8> [[TMP3]]) 1016; CHECK-NEXT: br i1 true, label [[DOT_CRIT_EDGE:%.*]], label [[SCALAR_PH]] 1017; CHECK: scalar.ph: 1018; CHECK-NEXT: br label [[DOTLR_PH:%.*]] 1019; CHECK: .lr.ph: 1020; CHECK-NEXT: br i1 undef, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], [[LOOP37:!llvm.loop !.*]] 1021; CHECK: ._crit_edge: 1022; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i8 [ undef, [[DOTLR_PH]] ], [ [[TMP5]], [[MIDDLE_BLOCK]] ] 1023; CHECK-NEXT: ret i8 [[SUM_0_LCSSA]] 1024; 1025entry: 1026 br label %.lr.ph 1027 1028.lr.ph: ; preds = %entry, %.lr.ph 1029 %indvars.iv = phi i32 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ] 1030 %sum.02p = phi i32 [ %l9, %.lr.ph ], [ 255, %entry ] 1031 %sum.02 = and i32 %sum.02p, 255 1032 %l2 = getelementptr inbounds i8, i8* %A, i32 %indvars.iv 1033 %l3 = load i8, i8* %l2, align 4 1034 %l3e = zext i8 %l3 to i32 1035 %l9 = add i32 %sum.02, %l3e 1036 %indvars.iv.next = add i32 %indvars.iv, 1 1037 %exitcond = icmp eq i32 %indvars.iv.next, 256 1038 br i1 %exitcond, label %._crit_edge, label %.lr.ph 1039 1040._crit_edge: ; preds = %.lr.ph 1041 %sum.0.lcssa = phi i32 [ %l9, %.lr.ph ] 1042 %ret = trunc i32 %sum.0.lcssa to i8 1043 ret i8 %ret 1044} 1045 1046 1047define i8 @reduction_and_trunc(i8* noalias nocapture %A) { 1048; CHECK-LABEL: @reduction_and_trunc( 1049; CHECK-NEXT: entry: 1050; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 1051; CHECK: vector.ph: 1052; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 1053; CHECK: vector.body: 1054; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 1055; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 255, [[VECTOR_PH]] ], [ [[TMP6:%.*]], [[VECTOR_BODY]] ] 1056; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[VEC_PHI]], 255 1057; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[INDEX]] to i64 1058; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, i8* [[A:%.*]], i64 [[TMP1]] 1059; CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to <4 x i8>* 1060; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i8>, <4 x i8>* [[TMP3]], align 4 1061; CHECK-NEXT: [[TMP4:%.*]] = zext <4 x i8> [[WIDE_LOAD]] to <4 x i32> 1062; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> [[TMP4]]) 1063; CHECK-NEXT: [[TMP6]] = and i32 [[TMP5]], [[TMP0]] 1064; CHECK-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 4 1065; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[INDEX_NEXT]], 256 1066; CHECK-NEXT: br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP38:!llvm.loop !.*]] 1067; CHECK: middle.block: 1068; CHECK-NEXT: br i1 true, label [[DOT_CRIT_EDGE:%.*]], label [[SCALAR_PH]] 1069; CHECK: scalar.ph: 1070; CHECK-NEXT: br label [[DOTLR_PH:%.*]] 1071; CHECK: .lr.ph: 1072; CHECK-NEXT: br i1 undef, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], [[LOOP39:!llvm.loop !.*]] 1073; CHECK: ._crit_edge: 1074; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ undef, [[DOTLR_PH]] ], [ [[TMP6]], [[MIDDLE_BLOCK]] ] 1075; CHECK-NEXT: [[RET:%.*]] = trunc i32 [[SUM_0_LCSSA]] to i8 1076; CHECK-NEXT: ret i8 [[RET]] 1077; 1078entry: 1079 br label %.lr.ph 1080 1081.lr.ph: ; preds = %entry, %.lr.ph 1082 %indvars.iv = phi i32 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ] 1083 %sum.02p = phi i32 [ %l9, %.lr.ph ], [ 255, %entry ] 1084 %sum.02 = and i32 %sum.02p, 255 1085 %l2 = getelementptr inbounds i8, i8* %A, i32 %indvars.iv 1086 %l3 = load i8, i8* %l2, align 4 1087 %l3e = zext i8 %l3 to i32 1088 %l9 = and i32 %sum.02, %l3e 1089 %indvars.iv.next = add i32 %indvars.iv, 1 1090 %exitcond = icmp eq i32 %indvars.iv.next, 256 1091 br i1 %exitcond, label %._crit_edge, label %.lr.ph 1092 1093._crit_edge: ; preds = %.lr.ph 1094 %sum.0.lcssa = phi i32 [ %l9, %.lr.ph ] 1095 %ret = trunc i32 %sum.0.lcssa to i8 1096 ret i8 %ret 1097} 1098 1099!6 = distinct !{!6, !7, !8} 1100!7 = !{!"llvm.loop.vectorize.predicate.enable", i1 true} 1101!8 = !{!"llvm.loop.vectorize.enable", i1 true} 1102