1; RUN: opt < %s -loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -dce -instcombine -S | FileCheck %s 2 3target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 4 5;CHECK-LABEL: @read_mod_write_single_ptr( 6;CHECK: load <4 x float> 7;CHECK: ret i32 8define i32 @read_mod_write_single_ptr(float* nocapture %a, i32 %n) nounwind uwtable ssp { 9 %1 = icmp sgt i32 %n, 0 10 br i1 %1, label %.lr.ph, label %._crit_edge 11 12.lr.ph: ; preds = %0, %.lr.ph 13 %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %0 ] 14 %2 = getelementptr inbounds float, float* %a, i64 %indvars.iv 15 %3 = load float, float* %2, align 4 16 %4 = fmul float %3, 3.000000e+00 17 store float %4, float* %2, align 4 18 %indvars.iv.next = add i64 %indvars.iv, 1 19 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 20 %exitcond = icmp eq i32 %lftr.wideiv, %n 21 br i1 %exitcond, label %._crit_edge, label %.lr.ph 22 23._crit_edge: ; preds = %.lr.ph, %0 24 ret i32 undef 25} 26 27; Ensure that volatile stores are not vectorized. 28; CHECK-LABEL: @read_mod_write_single_ptr_volatile_store( 29; CHECK-NOT: store <4 x float> 30; CHECK: ret i32 31define i32 @read_mod_write_single_ptr_volatile_store(float* nocapture %a, i32 %n) nounwind uwtable ssp { 32 %1 = icmp sgt i32 %n, 0 33 br i1 %1, label %.lr.ph, label %._crit_edge 34 35.lr.ph: ; preds = %0, %.lr.ph 36 %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %0 ] 37 %2 = getelementptr inbounds float, float* %a, i64 %indvars.iv 38 %3 = load float, float* %2, align 4 39 %4 = fmul float %3, 3.000000e+00 40 store volatile float %4, float* %2, align 4 41 %indvars.iv.next = add i64 %indvars.iv, 1 42 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 43 %exitcond = icmp eq i32 %lftr.wideiv, %n 44 br i1 %exitcond, label %._crit_edge, label %.lr.ph 45 46._crit_edge: ; preds = %.lr.ph, %0 47 ret i32 undef 48} 49