1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -basic-aa -newgvn -enable-phi-of-ops=true -S | FileCheck %s
3target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
4
5define i32 @test1(i32, i8**) {
6; CHECK-LABEL: @test1(
7; CHECK-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP0:%.*]], 0
8; CHECK-NEXT:    br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP5:%.*]]
9; CHECK:         br label [[TMP6:%.*]]
10; CHECK:         br label [[TMP6]]
11; CHECK:         [[PHIOFOPS:%.*]] = phi i32 [ 105, [[TMP5]] ], [ 75, [[TMP4]] ]
12; CHECK-NEXT:    [[DOT0:%.*]] = phi i32 [ 5, [[TMP4]] ], [ 7, [[TMP5]] ]
13; CHECK-NEXT:    ret i32 [[PHIOFOPS]]
14;
15  %3 = icmp ne i32 %0, 0
16  br i1 %3, label %4, label %5
17
18; <label>:4:                                      ; preds = %2
19  br label %6
20
21; <label>:5:                                      ; preds = %2
22  br label %6
23
24; <label>:6:                                      ; preds = %5, %4
25  %.0 = phi i32 [ 5, %4 ], [ 7, %5 ]
26  %7 = mul nsw i32 %.0, 15
27  ret i32 %7
28}
29;; Dependent phi of ops
30define i32 @test1b(i32, i8**) {
31; CHECK-LABEL: @test1b(
32; CHECK-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP0:%.*]], 0
33; CHECK-NEXT:    br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP5:%.*]]
34; CHECK:         br label [[TMP6:%.*]]
35; CHECK:         br label [[TMP6]]
36; CHECK:         [[PHIOFOPS1:%.*]] = phi i32 [ 105, [[TMP5]] ], [ 75, [[TMP4]] ]
37; CHECK-NEXT:    [[PHIOFOPS:%.*]] = phi i32 [ 1575, [[TMP5]] ], [ 1125, [[TMP4]] ]
38; CHECK-NEXT:    [[DOT0:%.*]] = phi i32 [ 5, [[TMP4]] ], [ 7, [[TMP5]] ]
39; CHECK-NEXT:    ret i32 [[PHIOFOPS]]
40;
41  %3 = icmp ne i32 %0, 0
42  br i1 %3, label %4, label %5
43
44; <label>:4:                                      ; preds = %2
45  br label %6
46
47; <label>:5:                                      ; preds = %2
48  br label %6
49
50; <label>:6:                                      ; preds = %5, %4
51  %.0 = phi i32 [ 5, %4 ], [ 7, %5 ]
52  %7 = mul nsw i32 %.0, 15
53  %8 = mul nsw i32 %7, 15
54  ret i32 %8
55}
56
57define i32 @test2(i32) {
58; CHECK-LABEL: @test2(
59; CHECK-NEXT:    [[TMP2:%.*]] = icmp ne i32 [[TMP0:%.*]], 0
60; CHECK-NEXT:    br i1 [[TMP2]], label [[TMP3:%.*]], label [[TMP4:%.*]]
61; CHECK:         br label [[TMP5:%.*]]
62; CHECK:         br label [[TMP5]]
63; CHECK:         [[DOT01:%.*]] = phi i32 [ 3, [[TMP3]] ], [ 2, [[TMP4]] ]
64; CHECK-NEXT:    [[DOT0:%.*]] = phi i32 [ 2, [[TMP3]] ], [ 3, [[TMP4]] ]
65; CHECK-NEXT:    ret i32 5
66;
67  %2 = icmp ne i32 %0, 0
68  br i1 %2, label %3, label %4
69
70; <label>:3:                                      ; preds = %1
71  br label %5
72
73; <label>:4:                                      ; preds = %1
74  br label %5
75
76; <label>:5:                                      ; preds = %4, %3
77  %.01 = phi i32 [ 3, %3 ], [ 2, %4 ]
78  %.0 = phi i32 [ 2, %3 ], [ 3, %4 ]
79  %6 = add nsw i32 %.01, %.0
80  ret i32 %6
81}
82define i32 @test3(i1 %which) {
83; CHECK-LABEL: @test3(
84; CHECK-NEXT:  entry:
85; CHECK-NEXT:    br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]
86; CHECK:       delay:
87; CHECK-NEXT:    br label [[FINAL]]
88; CHECK:       final:
89; CHECK-NEXT:    [[PHIOFOPS:%.*]] = phi i32 [ -877, [[ENTRY:%.*]] ], [ 113, [[DELAY]] ]
90; CHECK-NEXT:    [[A:%.*]] = phi i32 [ 1000, [[ENTRY]] ], [ 10, [[DELAY]] ]
91; CHECK-NEXT:    ret i32 [[PHIOFOPS]]
92;
93
94entry:
95  br i1 %which, label %final, label %delay
96
97delay:
98  br label %final
99
100final:
101  %A = phi i32 [ 1000, %entry ], [ 10, %delay ]
102  %value = sub i32 123, %A
103  ret i32 %value
104}
105
106define <2 x i32> @test3vec(i1 %which) {
107; CHECK-LABEL: @test3vec(
108; CHECK-NEXT:  entry:
109; CHECK-NEXT:    br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]
110; CHECK:       delay:
111; CHECK-NEXT:    br label [[FINAL]]
112; CHECK:       final:
113; CHECK-NEXT:    [[PHIOFOPS:%.*]] = phi <2 x i32> [ <i32 -877, i32 -877>, [[ENTRY:%.*]] ], [ <i32 113, i32 113>, [[DELAY]] ]
114; CHECK-NEXT:    [[A:%.*]] = phi <2 x i32> [ <i32 1000, i32 1000>, [[ENTRY]] ], [ <i32 10, i32 10>, [[DELAY]] ]
115; CHECK-NEXT:    ret <2 x i32> [[PHIOFOPS]]
116;
117
118entry:
119  br i1 %which, label %final, label %delay
120
121delay:
122  br label %final
123
124final:
125  %A = phi <2 x i32> [ <i32 1000, i32 1000>, %entry ], [ <i32 10, i32 10>, %delay ]
126  %value = sub <2 x i32> <i32 123, i32 123>, %A
127  ret <2 x i32> %value
128}
129
130define <2 x i32> @test3vec2(i1 %which) {
131; CHECK-LABEL: @test3vec2(
132; CHECK-NEXT:  entry:
133; CHECK-NEXT:    br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]
134; CHECK:       delay:
135; CHECK-NEXT:    br label [[FINAL]]
136; CHECK:       final:
137; CHECK-NEXT:    [[PHIOFOPS:%.*]] = phi <2 x i32> [ <i32 -877, i32 -2167>, [[ENTRY:%.*]] ], [ <i32 113, i32 303>, [[DELAY]] ]
138; CHECK-NEXT:    [[A:%.*]] = phi <2 x i32> [ <i32 1000, i32 2500>, [[ENTRY]] ], [ <i32 10, i32 30>, [[DELAY]] ]
139; CHECK-NEXT:    ret <2 x i32> [[PHIOFOPS]]
140;
141
142entry:
143  br i1 %which, label %final, label %delay
144
145delay:
146  br label %final
147
148final:
149  %A = phi <2 x i32> [ <i32 1000, i32 2500>, %entry ], [ <i32 10, i32 30>, %delay ]
150  %value = sub <2 x i32> <i32 123, i32 333>, %A
151  ret <2 x i32> %value
152}
153
154;; This example is a bit contrived because we can't create fake memoryuses, so we use two loads in the if blocks
155define i32 @test4(i32, i8**, i32* noalias, i32* noalias) {
156; CHECK-LABEL: @test4(
157; CHECK-NEXT:    store i32 5, i32* [[TMP2:%.*]], align 4
158; CHECK-NEXT:    store i32 7, i32* [[TMP3:%.*]], align 4
159; CHECK-NEXT:    [[TMP5:%.*]] = icmp ne i32 [[TMP0:%.*]], 0
160; CHECK-NEXT:    br i1 [[TMP5]], label [[TMP6:%.*]], label [[TMP7:%.*]]
161; CHECK:         br label [[TMP8:%.*]]
162; CHECK:         br label [[TMP8]]
163; CHECK:         [[DOT01:%.*]] = phi i32 [ 5, [[TMP6]] ], [ 7, [[TMP7]] ]
164; CHECK-NEXT:    [[DOT0:%.*]] = phi i32* [ [[TMP2]], [[TMP6]] ], [ [[TMP3]], [[TMP7]] ]
165; CHECK-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOT0]], align 4
166; CHECK-NEXT:    [[TMP10:%.*]] = mul nsw i32 [[TMP9]], 15
167; CHECK-NEXT:    [[TMP11:%.*]] = mul nsw i32 [[TMP10]], [[DOT01]]
168; CHECK-NEXT:    ret i32 [[TMP11]]
169;
170  store i32 5, i32* %2, align 4
171  store i32 7, i32* %3, align 4
172  %5 = icmp ne i32 %0, 0
173  br i1 %5, label %6, label %8
174
175; <label>:6:                                      ; preds = %4
176  %7 = load i32, i32* %2, align 4
177  br label %10
178
179; <label>:8:                                      ; preds = %4
180  %9 = load i32, i32* %3, align 4
181  br label %10
182
183; <label>:10:                                     ; preds = %8, %6
184  %.01 = phi i32 [ %7, %6 ], [ %9, %8 ]
185  %.0 = phi i32* [ %2, %6 ], [ %3, %8 ]
186  %11 = load i32, i32* %.0, align 4
187  %12 = mul nsw i32 %11, 15
188  %13 = mul nsw i32 %12, %.01
189  ret i32 %13
190}
191
192@global = common global [100 x i64] zeroinitializer, align 16
193@global.1 = common global [100 x i64] zeroinitializer, align 16
194define i64 @test5(i64 %arg) {
195; CHECK-LABEL: @test5(
196; CHECK-NEXT:  bb:
197; CHECK-NEXT:    [[TMP:%.*]] = alloca i64, align 8
198; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i64 [[ARG:%.*]], 0
199; CHECK-NEXT:    br i1 [[TMP1]], label [[BB28:%.*]], label [[BB2:%.*]]
200; CHECK:       bb2:
201; CHECK-NEXT:    br label [[BB7:%.*]]
202; CHECK:       bb4:
203; CHECK-NEXT:    br label [[BB5:%.*]]
204; CHECK:       bb5:
205; CHECK-NEXT:    [[TMP6:%.*]] = icmp eq i64 [[TMP9:%.*]], 0
206; CHECK-NEXT:    br i1 [[TMP6]], label [[BB27:%.*]], label [[BB7]]
207; CHECK:       bb7:
208; CHECK-NEXT:    [[TMP8:%.*]] = phi i64 [ [[ARG]], [[BB2]] ], [ [[TMP9]], [[BB5]] ]
209; CHECK-NEXT:    [[TMP9]] = add nsw i64 [[TMP8]], -1
210; CHECK-NEXT:    [[TMP10:%.*]] = load i64, i64* getelementptr inbounds ([100 x i64], [100 x i64]* @global, i64 0, i64 0), align 16
211; CHECK-NEXT:    [[TMP11:%.*]] = load i64, i64* getelementptr inbounds ([100 x i64], [100 x i64]* @global.1, i64 0, i64 0), align 16
212; CHECK-NEXT:    [[TMP12:%.*]] = mul nsw i64 [[TMP11]], [[TMP10]]
213; CHECK-NEXT:    [[TMP13:%.*]] = icmp eq i64 [[TMP12]], 0
214; CHECK-NEXT:    br i1 [[TMP13]], label [[BB5]], label [[BB14:%.*]]
215; CHECK:       bb14:
216; CHECK-NEXT:    br label [[BB15:%.*]]
217; CHECK:       bb15:
218; CHECK-NEXT:    [[PHIOFOPS:%.*]] = phi i64 [ [[TMP12]], [[BB14]] ], [ [[TMP25:%.*]], [[BB15]] ]
219; CHECK-NEXT:    [[TMP16:%.*]] = phi i64 [ [[TMP24:%.*]], [[BB15]] ], [ [[TMP11]], [[BB14]] ]
220; CHECK-NEXT:    [[TMP17:%.*]] = phi i64 [ [[TMP22:%.*]], [[BB15]] ], [ [[TMP10]], [[BB14]] ]
221; CHECK-NEXT:    [[TMP18:%.*]] = phi i64 [ [[TMP20:%.*]], [[BB15]] ], [ 0, [[BB14]] ]
222; CHECK-NEXT:    store i64 [[PHIOFOPS]], i64* [[TMP]], align 8
223; CHECK-NEXT:    [[TMP20]] = add nuw nsw i64 [[TMP18]], 1
224; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [100 x i64], [100 x i64]* @global, i64 0, i64 [[TMP20]]
225; CHECK-NEXT:    [[TMP22]] = load i64, i64* [[TMP21]], align 8
226; CHECK-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [100 x i64], [100 x i64]* @global.1, i64 0, i64 [[TMP20]]
227; CHECK-NEXT:    [[TMP24]] = load i64, i64* [[TMP23]], align 8
228; CHECK-NEXT:    [[TMP25]] = mul nsw i64 [[TMP24]], [[TMP22]]
229; CHECK-NEXT:    [[TMP26:%.*]] = icmp eq i64 [[TMP20]], [[TMP25]]
230; CHECK-NEXT:    br i1 [[TMP26]], label [[BB4:%.*]], label [[BB15]]
231; CHECK:       bb27:
232; CHECK-NEXT:    br label [[BB28]]
233; CHECK:       bb28:
234; CHECK-NEXT:    ret i64 0
235;
236bb:
237  %tmp = alloca i64, align 8
238  %tmp1 = icmp eq i64 %arg, 0
239  br i1 %tmp1, label %bb28, label %bb2
240
241bb2:                                              ; preds = %bb
242  %tmp3 = bitcast i64* %tmp to i8*
243  br label %bb7
244
245bb4:                                              ; preds = %bb15
246  br label %bb5
247
248bb5:                                              ; preds = %bb7, %bb4
249  %tmp6 = icmp eq i64 %tmp9, 0
250  br i1 %tmp6, label %bb27, label %bb7
251
252bb7:                                              ; preds = %bb5, %bb2
253  %tmp8 = phi i64 [ %arg, %bb2 ], [ %tmp9, %bb5 ]
254  %tmp9 = add nsw i64 %tmp8, -1
255  %tmp10 = load i64, i64* getelementptr inbounds ([100 x i64], [100 x i64]* @global, i64 0, i64 0), align 16
256  %tmp11 = load i64, i64* getelementptr inbounds ([100 x i64], [100 x i64]* @global.1, i64 0, i64 0), align 16
257  %tmp12 = mul nsw i64 %tmp11, %tmp10
258  %tmp13 = icmp eq i64 %tmp12, 0
259  br i1 %tmp13, label %bb5, label %bb14
260
261bb14:                                             ; preds = %bb7
262  br label %bb15
263
264bb15:                                             ; preds = %bb15, %bb14
265  %tmp16 = phi i64 [ %tmp24, %bb15 ], [ %tmp11, %bb14 ]
266  %tmp17 = phi i64 [ %tmp22, %bb15 ], [ %tmp10, %bb14 ]
267  %tmp18 = phi i64 [ %tmp20, %bb15 ], [ 0, %bb14 ]
268;; This multiply is an op of phis which is really equivalent to phi(tmp25, tmp12)
269  %tmp19 = mul nsw i64 %tmp16, %tmp17
270  store i64 %tmp19, i64* %tmp, align 8
271  %tmp20 = add nuw nsw i64 %tmp18, 1
272  %tmp21 = getelementptr inbounds [100 x i64], [100 x i64]* @global, i64 0, i64 %tmp20
273  %tmp22 = load i64, i64* %tmp21, align 8
274  %tmp23 = getelementptr inbounds [100 x i64], [100 x i64]* @global.1, i64 0, i64 %tmp20
275  %tmp24 = load i64, i64* %tmp23, align 8
276  %tmp25 = mul nsw i64 %tmp24, %tmp22
277  %tmp26 = icmp eq i64 %tmp20, %tmp25
278  br i1 %tmp26, label %bb4, label %bb15
279
280bb27:                                             ; preds = %bb5
281  br label %bb28
282
283bb28:                                             ; preds = %bb27, %bb
284  ret i64 0
285}
286
287;; These icmps are all equivalent to phis of constants
288define i8 @test6(i8* %addr) {
289; CHECK-LABEL: @test6(
290; CHECK-NEXT:  entry-block:
291; CHECK-NEXT:    br label %main-loop
292; CHECK:       main-loop:
293; CHECK-NEXT:    [[PHIOFOPS1:%.*]] = phi i1 [ true, %entry-block ], [ false, [[CORE:%.*]] ]
294; CHECK-NEXT:    [[PHIOFOPS:%.*]] = phi i1 [ false, %entry-block ], [ true, [[CORE]] ]
295; CHECK-NEXT:    [[PHI:%.*]] = phi i8 [ 0, %entry-block ], [ 1, [[CORE]] ]
296; CHECK-NEXT:    store volatile i8 0, i8* [[ADDR:%.*]]
297; CHECK-NEXT:    br i1 [[PHIOFOPS1]], label %busy-wait-phi-0, label [[EXIT:%.*]]
298; CHECK:       busy-wait-phi-0:
299; CHECK-NEXT:    [[LOAD:%.*]] = load volatile i8, i8* [[ADDR]]
300; CHECK-NEXT:    [[ICMP:%.*]] = icmp eq i8 [[LOAD]], 0
301; CHECK-NEXT:    br i1 [[ICMP]], label %busy-wait-phi-0, label [[CORE]]
302; CHECK:       core:
303; CHECK-NEXT:    br i1 [[PHIOFOPS]], label [[TRAP:%.*]], label %main-loop
304; CHECK:       trap:
305; CHECK-NEXT:    ret i8 1
306; CHECK:       exit:
307; CHECK-NEXT:    ret i8 0
308;
309entry-block:
310  br label %main-loop
311
312main-loop:
313  %phi = phi i8 [ 0, %entry-block ], [ 1, %core ]
314  %switch_0 = icmp eq i8 %phi, 0
315  store volatile i8 0, i8* %addr
316  br i1 %switch_0, label %busy-wait-phi-0, label %exit
317
318busy-wait-phi-0:
319  %load = load volatile i8, i8* %addr
320  %icmp = icmp eq i8 %load, 0
321  br i1 %icmp, label %busy-wait-phi-0, label %core
322
323core:
324  %switch_1 = icmp eq i8 %phi, 1
325  br i1 %switch_1, label %trap, label %main-loop
326
327trap:
328  ret i8 1
329
330exit:
331  ret i8 0
332}
333
334; Test that we don't infinite loop simplifying
335; an undefined value that can go both ways.
336define void @test7() {
337; CHECK-LABEL: @test7(
338; CHECK-NEXT:  bb:
339; CHECK-NEXT:    br label [[BB1:%.*]]
340; CHECK:       bb1:
341; CHECK-NEXT:    br label [[BB1]]
342;
343bb:
344  br label %bb1
345
346bb1:                                              ; preds = %bb1, %bb
347  %tmp = phi i32 [ undef, %bb ], [ %tmp3, %bb1 ]
348  %tmp2 = icmp eq i32 %tmp, 0
349  %tmp3 = select i1 %tmp2, i32 1, i32 %tmp
350  br label %bb1
351}
352
353
354
355; Test that we get a consistent answer about what the
356; value of this undefined select is.
357define void @test8() {
358; CHECK-LABEL: @test8(
359; CHECK-NEXT:  bb:
360; CHECK-NEXT:    br label [[BB1:%.*]]
361; CHECK:       bb1:
362; CHECK-NEXT:    br label [[BB1]]
363;
364bb:
365  %tmp = select i1 undef, i8 0, i8 1
366  br label %bb1
367
368bb1:                                              ; preds = %bb1, %bb
369  %tmp2 = phi i8 [ %tmp4, %bb1 ], [ %tmp, %bb ]
370  %tmp3 = icmp eq i8 %tmp2, 0
371  %tmp4 = select i1 %tmp3, i8 1, i8 %tmp2
372  br label %bb1
373}
374
375
376;; Make sure we handle the case where we later come up with an expression that we need
377;; for a phi of ops.
378define void @test9() {
379; CHECK-LABEL: @test9(
380; CHECK-NEXT:  bb:
381; CHECK-NEXT:    br label [[BB1:%.*]]
382; CHECK:       bb1:
383; CHECK-NEXT:    br i1 undef, label [[BB1]], label [[BB2:%.*]]
384; CHECK:       bb2:
385; CHECK-NEXT:    br label [[BB6:%.*]]
386; CHECK:       bb6:
387; CHECK-NEXT:    [[PHIOFOPS:%.*]] = phi i32 [ -13, [[BB2]] ], [ [[TMP11:%.*]], [[BB6]] ]
388; CHECK-NEXT:    [[TMP7:%.*]] = phi i32 [ 1, [[BB2]] ], [ [[TMP8:%.*]], [[BB6]] ]
389; CHECK-NEXT:    [[TMP8]] = add nuw nsw i32 [[TMP7]], 1
390; CHECK-NEXT:    [[TMP11]] = add i32 -14, [[TMP8]]
391; CHECK-NEXT:    br label [[BB6]]
392;
393bb:
394  br label %bb1
395
396bb1:                                              ; preds = %bb1, %bb
397  br i1 undef, label %bb1, label %bb2
398
399bb2:                                              ; preds = %bb1
400  %tmp = select i1 true, i32 -14, i32 -10
401  %tmp3 = add i32 %tmp, 0
402  %tmp4 = select i1 true, i32 -14, i32 -10
403  %tmp5 = add i32 %tmp4, 0
404  br label %bb6
405
406bb6:                                              ; preds = %bb6, %bb2
407  %tmp7 = phi i32 [ 1, %bb2 ], [ %tmp13, %bb6 ]
408  %tmp8 = add nuw nsw i32 %tmp7, 1
409  %tmp9 = add i32 %tmp3, %tmp7
410  %tmp10 = select i1 false, i32 undef, i32 %tmp9
411  %tmp11 = add i32 %tmp5, %tmp8
412  %tmp12 = select i1 undef, i32 undef, i32 %tmp11
413  %tmp13 = add nuw nsw i32 %tmp7, 1
414  br label %bb6
415}
416
417;; Ensure that we revisit predicateinfo operands at the right points in time.
418define void @test10() {
419; CHECK-LABEL: @test10(
420; CHECK-NEXT:  b:
421; CHECK-NEXT:    br label [[G:%.*]]
422; CHECK:       g:
423; CHECK-NEXT:    [[N:%.*]] = phi i32* [ [[H:%.*]], [[I:%.*]] ], [ null, [[B:%.*]] ]
424; CHECK-NEXT:    [[H]] = getelementptr i32, i32* [[N]], i64 1
425; CHECK-NEXT:    [[J:%.*]] = icmp eq i32* [[H]], inttoptr (i64 32 to i32*)
426; CHECK-NEXT:    br i1 [[J]], label [[C:%.*]], label [[I]]
427; CHECK:       i:
428; CHECK-NEXT:    br i1 undef, label [[K:%.*]], label [[G]]
429; CHECK:       k:
430; CHECK-NEXT:    br i1 false, label [[C]], label [[O:%.*]]
431; CHECK:       o:
432; CHECK-NEXT:    br label [[C]]
433; CHECK:       c:
434; CHECK-NEXT:    ret void
435;
436b:
437  %m = getelementptr i32, i32* null, i64 8
438  br label %g
439
440g:                                                ; preds = %i, %b
441  %n = phi i32* [ %h, %i ], [ null, %b ]
442  %h = getelementptr i32, i32* %n, i64 1
443  %j = icmp eq i32* %h, %m
444  br i1 %j, label %c, label %i
445
446i:                                                ; preds = %g
447  br i1 undef, label %k, label %g
448
449k:                                                ; preds = %i
450  %l = icmp eq i32* %n, %m
451  br i1 %l, label %c, label %o
452
453o:                                                ; preds = %k
454  br label %c
455
456c:                                                ; preds = %o, %k, %g
457  %0 = phi i32* [ undef, %o ], [ %m, %k ], [ %m, %g ]
458  ret void
459}
460
461;; Ensure we handle VariableExpression properly.
462define void @test11() {
463; CHECK-LABEL: @test11(
464; CHECK-NEXT:  bb:
465; CHECK-NEXT:    br i1 undef, label [[BB1:%.*]], label [[BB2:%.*]]
466; CHECK:       bb1:
467; CHECK-NEXT:    br label [[BB2]]
468; CHECK:       bb2:
469; CHECK-NEXT:    [[TMP:%.*]] = phi i1 [ false, [[BB1]] ], [ true, [[BB:%.*]] ]
470; CHECK-NEXT:    [[TMP3:%.*]] = call i32* @wombat()
471; CHECK-NEXT:    [[TMP4:%.*]] = icmp ne i32* [[TMP3]], null
472; CHECK-NEXT:    [[TMP5:%.*]] = and i1 [[TMP]], [[TMP4]]
473; CHECK-NEXT:    br i1 [[TMP5]], label [[BB6:%.*]], label [[BB7:%.*]]
474; CHECK:       bb6:
475; CHECK-NEXT:    unreachable
476; CHECK:       bb7:
477; CHECK-NEXT:    ret void
478;
479bb:
480  br i1 undef, label %bb1, label %bb2
481
482bb1:                                              ; preds = %bb
483  br label %bb2
484
485bb2:                                              ; preds = %bb1, %bb
486  %tmp = phi i1 [ false, %bb1 ], [ true, %bb ]
487  %tmp3 = call i32* @wombat()
488  %tmp4 = icmp ne i32* %tmp3, null
489  %tmp5 = and i1 %tmp, %tmp4
490  br i1 %tmp5, label %bb6, label %bb7
491
492bb6:                                              ; preds = %bb2
493  unreachable
494
495bb7:                                              ; preds = %bb2
496  ret void
497}
498
499declare i32* @wombat()
500
501;; Ensure that when reachability affects a phi of ops, we recompute
502;; it.  Here, the phi node is marked for recomputation when bb7->bb3
503;; becomes live, but the value does not change. if we do not directly
504;; recompute the phi of ops instruction (tmp5), the value number will
505;; change in the verifier, as it goes from a constant value to a
506;; phi of [true, false]
507
508define void @test12() {
509; CHECK-LABEL: @test12(
510; CHECK-NEXT:  bb:
511; CHECK-NEXT:    [[TMP:%.*]] = load i32, i32* null
512; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i32 [[TMP]], 0
513; CHECK-NEXT:    br i1 [[TMP1]], label [[BB2:%.*]], label [[BB8:%.*]]
514; CHECK:       bb2:
515; CHECK-NEXT:    br label [[BB3:%.*]]
516; CHECK:       bb3:
517; CHECK-NEXT:    [[PHIOFOPS:%.*]] = phi i1 [ true, [[BB2]] ], [ false, [[BB7:%.*]] ]
518; CHECK-NEXT:    br i1 [[PHIOFOPS]], label [[BB6:%.*]], label [[BB7]]
519; CHECK:       bb6:
520; CHECK-NEXT:    br label [[BB7]]
521; CHECK:       bb7:
522; CHECK-NEXT:    br label [[BB3]]
523; CHECK:       bb8:
524; CHECK-NEXT:    ret void
525;
526bb:
527  %tmp = load i32, i32* null
528  %tmp1 = icmp sgt i32 %tmp, 0
529  br i1 %tmp1, label %bb2, label %bb8
530
531bb2:                                              ; preds = %bb
532  br label %bb3
533
534bb3:                                              ; preds = %bb7, %bb2
535  %tmp4 = phi i32 [ %tmp, %bb2 ], [ undef, %bb7 ]
536  %tmp5 = icmp sgt i32 %tmp4, 0
537  br i1 %tmp5, label %bb6, label %bb7
538
539bb6:                                              ; preds = %bb3
540  br label %bb7
541
542bb7:                                              ; preds = %bb6, %bb3
543  br label %bb3
544
545bb8:                                              ; preds = %bb
546  ret void
547}
548
549;; Make sure we reprocess phi of ops involving loads when loads change class.
550;; This is PR 34473
551define void @test13() {
552; CHECK-LABEL: @test13(
553; CHECK-NEXT:  bb:
554; CHECK-NEXT:    br label [[BB1:%.*]]
555; CHECK:       bb1:
556; CHECK-NEXT:    [[TMP:%.*]] = load i8, i8* null
557; CHECK-NEXT:    br label [[BB3:%.*]]
558; CHECK:       bb3:
559; CHECK-NEXT:    [[PHIOFOPS:%.*]] = phi i8 [ [[TMP]], [[BB1]] ], [ [[TMP10:%.*]], [[BB3]] ]
560; CHECK-NEXT:    [[TMP4:%.*]] = phi i8* [ null, [[BB1]] ], [ [[TMP6:%.*]], [[BB3]] ]
561; CHECK-NEXT:    [[TMP5:%.*]] = phi i32 [ undef, [[BB1]] ], [ [[TMP9:%.*]], [[BB3]] ]
562; CHECK-NEXT:    [[TMP6]] = getelementptr i8, i8* [[TMP4]], i64 1
563; CHECK-NEXT:    [[TMP8:%.*]] = sext i8 [[PHIOFOPS]] to i32
564; CHECK-NEXT:    [[TMP9]] = mul i32 [[TMP5]], [[TMP8]]
565; CHECK-NEXT:    [[TMP10]] = load i8, i8* [[TMP6]]
566; CHECK-NEXT:    [[TMP11:%.*]] = icmp eq i8 [[TMP10]], 0
567; CHECK-NEXT:    br i1 [[TMP11]], label [[BB12:%.*]], label [[BB3]]
568; CHECK:       bb12:
569; CHECK-NEXT:    [[TMP14:%.*]] = icmp eq i32 [[TMP9]], 0
570; CHECK-NEXT:    br i1 [[TMP14]], label [[BB1]], label [[BB15:%.*]]
571; CHECK:       bb15:
572; CHECK-NEXT:    call void (...) @bar()
573; CHECK-NEXT:    br label [[BB1]]
574;
575bb:
576  br label %bb1
577
578bb1:                                              ; preds = %bb15, %bb12, %bb
579  %tmp = load i8, i8* null
580  %tmp2 = icmp eq i8 %tmp, 8
581  br label %bb3
582
583bb3:                                              ; preds = %bb3, %bb1
584  %tmp4 = phi i8* [ null, %bb1 ], [ %tmp6, %bb3 ]
585  %tmp5 = phi i32 [ undef, %bb1 ], [ %tmp9, %bb3 ]
586  %tmp6 = getelementptr i8, i8* %tmp4, i64 1
587  %tmp7 = load i8, i8* %tmp4
588  %tmp8 = sext i8 %tmp7 to i32
589  %tmp9 = mul i32 %tmp5, %tmp8
590  %tmp10 = load i8, i8* %tmp6
591  %tmp11 = icmp eq i8 %tmp10, 0
592  br i1 %tmp11, label %bb12, label %bb3
593
594bb12:                                             ; preds = %bb3
595  %tmp13 = phi i32 [ %tmp9, %bb3 ]
596  %tmp14 = icmp eq i32 %tmp13, 0
597  br i1 %tmp14, label %bb1, label %bb15
598
599bb15:                                             ; preds = %bb12
600  call void (...) @bar()
601  br label %bb1
602}
603
604declare void @bar(...)
605
606