1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -simplifycfg -S < %s | FileCheck %s --check-prefix=SIMPLIFYCFG 3; RUN: opt -instcombine -S < %s | FileCheck %s --check-prefix=INSTCOMBINEONLY 4; RUN: opt -instcombine -simplifycfg -S < %s | FileCheck %s --check-prefix=INSTCOMBINESIMPLIFYCFGONLY 5; RUN: opt -instcombine -simplifycfg -instcombine -S < %s | FileCheck %s --check-prefix=INSTCOMBINESIMPLIFYCFGINSTCOMBINE 6; RUN: opt -instcombine -simplifycfg -phi-node-folding-threshold=3 -S < %s | FileCheck %s --check-prefix=INSTCOMBINESIMPLIFYCFGONLY 7; RUN: opt -instcombine -simplifycfg -instcombine -phi-node-folding-threshold=3 -S < %s | FileCheck %s --check-prefix=INSTCOMBINESIMPLIFYCFGINSTCOMBINE 8 9target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 10target triple = "x86_64-pc-linux-gnu" 11 12; #include <limits> 13; #include <cstdint> 14; 15; using size_type = std::size_t; 16; bool will_not_overflow(size_type size, size_type nmemb) { 17; return (size != 0 && (nmemb > std::numeric_limits<size_type>::max() / size)); 18; } 19 20define i1 @will_not_overflow(i64 %arg, i64 %arg1) { 21; SIMPLIFYCFG-LABEL: @will_not_overflow( 22; SIMPLIFYCFG-NEXT: bb: 23; SIMPLIFYCFG-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 24; SIMPLIFYCFG-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]] 25; SIMPLIFYCFG: bb2: 26; SIMPLIFYCFG-NEXT: [[T3:%.*]] = udiv i64 -1, [[ARG]] 27; SIMPLIFYCFG-NEXT: [[T4:%.*]] = icmp ult i64 [[T3]], [[ARG1:%.*]] 28; SIMPLIFYCFG-NEXT: br label [[BB5]] 29; SIMPLIFYCFG: bb5: 30; SIMPLIFYCFG-NEXT: [[T6:%.*]] = phi i1 [ false, [[BB:%.*]] ], [ [[T4]], [[BB2]] ] 31; SIMPLIFYCFG-NEXT: ret i1 [[T6]] 32; 33; INSTCOMBINEONLY-LABEL: @will_not_overflow( 34; INSTCOMBINEONLY-NEXT: bb: 35; INSTCOMBINEONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 36; INSTCOMBINEONLY-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]] 37; INSTCOMBINEONLY: bb2: 38; INSTCOMBINEONLY-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]]) 39; INSTCOMBINEONLY-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1 40; INSTCOMBINEONLY-NEXT: br label [[BB5]] 41; INSTCOMBINEONLY: bb5: 42; INSTCOMBINEONLY-NEXT: [[T6:%.*]] = phi i1 [ false, [[BB:%.*]] ], [ [[UMUL_OV]], [[BB2]] ] 43; INSTCOMBINEONLY-NEXT: ret i1 [[T6]] 44; 45; INSTCOMBINESIMPLIFYCFGONLY-LABEL: @will_not_overflow( 46; INSTCOMBINESIMPLIFYCFGONLY-NEXT: bb: 47; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 48; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]]) 49; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1 50; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[T6:%.*]] = select i1 [[T0]], i1 false, i1 [[UMUL_OV]] 51; INSTCOMBINESIMPLIFYCFGONLY-NEXT: ret i1 [[T6]] 52; 53; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-LABEL: @will_not_overflow( 54; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: bb: 55; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG:%.*]], i64 [[ARG1:%.*]]) 56; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1 57; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: ret i1 [[UMUL_OV]] 58; 59bb: 60 %t0 = icmp eq i64 %arg, 0 61 br i1 %t0, label %bb5, label %bb2 62 63bb2: ; preds = %bb 64 %t3 = udiv i64 -1, %arg 65 %t4 = icmp ult i64 %t3, %arg1 66 br label %bb5 67 68bb5: ; preds = %bb2, %bb 69 %t6 = phi i1 [ false, %bb ], [ %t4, %bb2 ] 70 ret i1 %t6 71} 72 73; Same as @will_not_overflow, but inverting return value. 74 75define i1 @will_overflow(i64 %arg, i64 %arg1) { 76; SIMPLIFYCFG-LABEL: @will_overflow( 77; SIMPLIFYCFG-NEXT: bb: 78; SIMPLIFYCFG-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 79; SIMPLIFYCFG-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]] 80; SIMPLIFYCFG: bb2: 81; SIMPLIFYCFG-NEXT: [[T3:%.*]] = udiv i64 -1, [[ARG]] 82; SIMPLIFYCFG-NEXT: [[T4:%.*]] = icmp ult i64 [[T3]], [[ARG1:%.*]] 83; SIMPLIFYCFG-NEXT: br label [[BB5]] 84; SIMPLIFYCFG: bb5: 85; SIMPLIFYCFG-NEXT: [[T6:%.*]] = phi i1 [ false, [[BB:%.*]] ], [ [[T4]], [[BB2]] ] 86; SIMPLIFYCFG-NEXT: [[T7:%.*]] = xor i1 [[T6]], true 87; SIMPLIFYCFG-NEXT: ret i1 [[T7]] 88; 89; INSTCOMBINEONLY-LABEL: @will_overflow( 90; INSTCOMBINEONLY-NEXT: bb: 91; INSTCOMBINEONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 92; INSTCOMBINEONLY-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]] 93; INSTCOMBINEONLY: bb2: 94; INSTCOMBINEONLY-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]]) 95; INSTCOMBINEONLY-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1 96; INSTCOMBINEONLY-NEXT: [[PHITMP:%.*]] = xor i1 [[UMUL_OV]], true 97; INSTCOMBINEONLY-NEXT: br label [[BB5]] 98; INSTCOMBINEONLY: bb5: 99; INSTCOMBINEONLY-NEXT: [[T6:%.*]] = phi i1 [ true, [[BB:%.*]] ], [ [[PHITMP]], [[BB2]] ] 100; INSTCOMBINEONLY-NEXT: ret i1 [[T6]] 101; 102; INSTCOMBINESIMPLIFYCFGONLY-LABEL: @will_overflow( 103; INSTCOMBINESIMPLIFYCFGONLY-NEXT: bb: 104; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 105; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]]) 106; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1 107; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[PHITMP:%.*]] = xor i1 [[UMUL_OV]], true 108; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[T6:%.*]] = select i1 [[T0]], i1 true, i1 [[PHITMP]] 109; INSTCOMBINESIMPLIFYCFGONLY-NEXT: ret i1 [[T6]] 110; 111; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-LABEL: @will_overflow( 112; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: bb: 113; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG:%.*]], i64 [[ARG1:%.*]]) 114; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1 115; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[PHITMP:%.*]] = xor i1 [[UMUL_OV]], true 116; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: ret i1 [[PHITMP]] 117; 118bb: 119 %t0 = icmp eq i64 %arg, 0 120 br i1 %t0, label %bb5, label %bb2 121 122bb2: ; preds = %bb 123 %t3 = udiv i64 -1, %arg 124 %t4 = icmp ult i64 %t3, %arg1 125 br label %bb5 126 127bb5: ; preds = %bb2, %bb 128 %t6 = phi i1 [ false, %bb ], [ %t4, %bb2 ] 129 %t7 = xor i1 %t6, true 130 ret i1 %t7 131} 132