1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -basic-aa -slp-vectorizer -dce -S -mtriple=i386-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s
3
4target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32-S128"
5target triple = "i386-apple-macosx10.8.0"
6
7define double @foo(double* nocapture %D) {
8; CHECK-LABEL: @foo(
9; CHECK-NEXT:    br label [[TMP1:%.*]]
10; CHECK:       1:
11; CHECK-NEXT:    [[I_02:%.*]] = phi i32 [ 0, [[TMP0:%.*]] ], [ [[TMP12:%.*]], [[TMP1]] ]
12; CHECK-NEXT:    [[SUM_01:%.*]] = phi double [ 0.000000e+00, [[TMP0]] ], [ [[TMP11:%.*]], [[TMP1]] ]
13; CHECK-NEXT:    [[TMP2:%.*]] = shl nsw i32 [[I_02]], 1
14; CHECK-NEXT:    [[TMP3:%.*]] = getelementptr inbounds double, double* [[D:%.*]], i32 [[TMP2]]
15; CHECK-NEXT:    [[TMP4:%.*]] = bitcast double* [[TMP3]] to <2 x double>*
16; CHECK-NEXT:    [[TMP5:%.*]] = load <2 x double>, <2 x double>* [[TMP4]], align 4
17; CHECK-NEXT:    [[TMP6:%.*]] = fmul <2 x double> [[TMP5]], [[TMP5]]
18; CHECK-NEXT:    [[TMP7:%.*]] = fmul <2 x double> [[TMP6]], [[TMP6]]
19; CHECK-NEXT:    [[TMP8:%.*]] = extractelement <2 x double> [[TMP7]], i32 0
20; CHECK-NEXT:    [[TMP9:%.*]] = extractelement <2 x double> [[TMP7]], i32 1
21; CHECK-NEXT:    [[TMP10:%.*]] = fadd double [[TMP8]], [[TMP9]]
22; CHECK-NEXT:    [[TMP11]] = fadd double [[SUM_01]], [[TMP10]]
23; CHECK-NEXT:    [[TMP12]] = add nsw i32 [[I_02]], 1
24; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp eq i32 [[TMP12]], 100
25; CHECK-NEXT:    br i1 [[EXITCOND]], label [[TMP13:%.*]], label [[TMP1]]
26; CHECK:       13:
27; CHECK-NEXT:    ret double [[TMP11]]
28;
29  br label %1
30
31; <label>:1                                       ; preds = %1, %0
32  %i.02 = phi i32 [ 0, %0 ], [ %10, %1 ]
33  %sum.01 = phi double [ 0.000000e+00, %0 ], [ %9, %1 ]
34  %2 = shl nsw i32 %i.02, 1
35  %3 = getelementptr inbounds double, double* %D, i32 %2
36  %4 = load double, double* %3, align 4
37  %A4 = fmul double %4, %4
38  %A42 = fmul double %A4, %A4
39  %5 = or i32 %2, 1
40  %6 = getelementptr inbounds double, double* %D, i32 %5
41  %7 = load double, double* %6, align 4
42  %A7 = fmul double %7, %7
43  %A72 = fmul double %A7, %A7
44  %8 = fadd double %A42, %A72
45  %9 = fadd double %sum.01, %8
46  %10 = add nsw i32 %i.02, 1
47  %exitcond = icmp eq i32 %10, 100
48  br i1 %exitcond, label %11, label %1
49
50; <label>:11                                      ; preds = %1
51  ret double %9
52}
53
54define i1 @two_wide_fcmp_reduction(<2 x double> %a0) {
55; CHECK-LABEL: @two_wide_fcmp_reduction(
56; CHECK-NEXT:    [[A:%.*]] = fcmp ogt <2 x double> [[A0:%.*]], <double 1.000000e+00, double 1.000000e+00>
57; CHECK-NEXT:    [[B:%.*]] = extractelement <2 x i1> [[A]], i32 0
58; CHECK-NEXT:    [[C:%.*]] = extractelement <2 x i1> [[A]], i32 1
59; CHECK-NEXT:    [[D:%.*]] = and i1 [[B]], [[C]]
60; CHECK-NEXT:    ret i1 [[D]]
61;
62  %a = fcmp ogt <2 x double> %a0, <double 1.0, double 1.0>
63  %b = extractelement <2 x i1> %a, i32 0
64  %c = extractelement <2 x i1> %a, i32 1
65  %d = and i1 %b, %c
66  ret i1 %d
67}
68
69define double @fadd_reduction(<2 x double> %a0) {
70; CHECK-LABEL: @fadd_reduction(
71; CHECK-NEXT:    [[A:%.*]] = fadd fast <2 x double> [[A0:%.*]], <double 1.000000e+00, double 1.000000e+00>
72; CHECK-NEXT:    [[B:%.*]] = extractelement <2 x double> [[A]], i32 0
73; CHECK-NEXT:    [[C:%.*]] = extractelement <2 x double> [[A]], i32 1
74; CHECK-NEXT:    [[D:%.*]] = fadd fast double [[B]], [[C]]
75; CHECK-NEXT:    ret double [[D]]
76;
77  %a = fadd fast <2 x double> %a0, <double 1.000000e+00, double 1.000000e+00>
78  %b = extractelement <2 x double> %a, i32 0
79  %c = extractelement <2 x double> %a, i32 1
80  %d = fadd fast double %b, %c
81  ret double %d
82}
83
84; PR43745 https://bugs.llvm.org/show_bug.cgi?id=43745
85
86define i1 @fcmp_lt_gt(double %a, double %b, double %c) {
87; CHECK-LABEL: @fcmp_lt_gt(
88; CHECK-NEXT:  entry:
89; CHECK-NEXT:    [[FNEG:%.*]] = fneg double [[B:%.*]]
90; CHECK-NEXT:    [[MUL:%.*]] = fmul double [[A:%.*]], 2.000000e+00
91; CHECK-NEXT:    [[TMP0:%.*]] = insertelement <2 x double> undef, double [[FNEG]], i32 0
92; CHECK-NEXT:    [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[C:%.*]], i32 1
93; CHECK-NEXT:    [[TMP2:%.*]] = insertelement <2 x double> undef, double [[C]], i32 0
94; CHECK-NEXT:    [[TMP3:%.*]] = insertelement <2 x double> [[TMP2]], double [[B]], i32 1
95; CHECK-NEXT:    [[TMP4:%.*]] = fsub <2 x double> [[TMP1]], [[TMP3]]
96; CHECK-NEXT:    [[TMP5:%.*]] = insertelement <2 x double> undef, double [[MUL]], i32 0
97; CHECK-NEXT:    [[TMP6:%.*]] = insertelement <2 x double> [[TMP5]], double [[MUL]], i32 1
98; CHECK-NEXT:    [[TMP7:%.*]] = fdiv <2 x double> [[TMP4]], [[TMP6]]
99; CHECK-NEXT:    [[TMP8:%.*]] = extractelement <2 x double> [[TMP7]], i32 1
100; CHECK-NEXT:    [[CMP:%.*]] = fcmp olt double [[TMP8]], 0x3EB0C6F7A0B5ED8D
101; CHECK-NEXT:    [[TMP9:%.*]] = extractelement <2 x double> [[TMP7]], i32 0
102; CHECK-NEXT:    [[CMP4:%.*]] = fcmp olt double [[TMP9]], 0x3EB0C6F7A0B5ED8D
103; CHECK-NEXT:    [[OR_COND:%.*]] = and i1 [[CMP]], [[CMP4]]
104; CHECK-NEXT:    br i1 [[OR_COND]], label [[CLEANUP:%.*]], label [[LOR_LHS_FALSE:%.*]]
105; CHECK:       lor.lhs.false:
106; CHECK-NEXT:    [[TMP10:%.*]] = fcmp ule <2 x double> [[TMP7]], <double 1.000000e+00, double 1.000000e+00>
107; CHECK-NEXT:    [[TMP11:%.*]] = extractelement <2 x i1> [[TMP10]], i32 0
108; CHECK-NEXT:    [[TMP12:%.*]] = extractelement <2 x i1> [[TMP10]], i32 1
109; CHECK-NEXT:    [[NOT_OR_COND9:%.*]] = or i1 [[TMP11]], [[TMP12]]
110; CHECK-NEXT:    ret i1 [[NOT_OR_COND9]]
111; CHECK:       cleanup:
112; CHECK-NEXT:    ret i1 false
113;
114entry:
115  %fneg = fneg double %b
116  %add = fsub double %c, %b
117  %mul = fmul double %a, 2.000000e+00
118  %div = fdiv double %add, %mul
119  %sub = fsub double %fneg, %c
120  %div3 = fdiv double %sub, %mul
121  %cmp = fcmp olt double %div, 0x3EB0C6F7A0B5ED8D
122  %cmp4 = fcmp olt double %div3, 0x3EB0C6F7A0B5ED8D
123  %or.cond = and i1 %cmp, %cmp4
124  br i1 %or.cond, label %cleanup, label %lor.lhs.false
125
126lor.lhs.false:
127  %cmp5 = fcmp ule double %div, 1.000000e+00
128  %cmp7 = fcmp ule double %div3, 1.000000e+00
129  %not.or.cond9 = or i1 %cmp7, %cmp5
130  ret i1 %not.or.cond9
131
132cleanup:
133  ret i1 false
134}
135
136define i1 @fcmp_lt(double %a, double %b, double %c) {
137; CHECK-LABEL: @fcmp_lt(
138; CHECK-NEXT:    [[FNEG:%.*]] = fneg double [[B:%.*]]
139; CHECK-NEXT:    [[MUL:%.*]] = fmul double [[A:%.*]], 2.000000e+00
140; CHECK-NEXT:    [[TMP1:%.*]] = insertelement <2 x double> undef, double [[FNEG]], i32 0
141; CHECK-NEXT:    [[TMP2:%.*]] = insertelement <2 x double> [[TMP1]], double [[C:%.*]], i32 1
142; CHECK-NEXT:    [[TMP3:%.*]] = insertelement <2 x double> undef, double [[C]], i32 0
143; CHECK-NEXT:    [[TMP4:%.*]] = insertelement <2 x double> [[TMP3]], double [[B]], i32 1
144; CHECK-NEXT:    [[TMP5:%.*]] = fsub <2 x double> [[TMP2]], [[TMP4]]
145; CHECK-NEXT:    [[TMP6:%.*]] = insertelement <2 x double> undef, double [[MUL]], i32 0
146; CHECK-NEXT:    [[TMP7:%.*]] = insertelement <2 x double> [[TMP6]], double [[MUL]], i32 1
147; CHECK-NEXT:    [[TMP8:%.*]] = fdiv <2 x double> [[TMP5]], [[TMP7]]
148; CHECK-NEXT:    [[TMP9:%.*]] = fcmp uge <2 x double> [[TMP8]], <double 0x3EB0C6F7A0B5ED8D, double 0x3EB0C6F7A0B5ED8D>
149; CHECK-NEXT:    [[TMP10:%.*]] = extractelement <2 x i1> [[TMP9]], i32 0
150; CHECK-NEXT:    [[TMP11:%.*]] = extractelement <2 x i1> [[TMP9]], i32 1
151; CHECK-NEXT:    [[NOT_OR_COND:%.*]] = or i1 [[TMP10]], [[TMP11]]
152; CHECK-NEXT:    ret i1 [[NOT_OR_COND]]
153;
154  %fneg = fneg double %b
155  %add = fsub double %c, %b
156  %mul = fmul double %a, 2.000000e+00
157  %div = fdiv double %add, %mul
158  %sub = fsub double %fneg, %c
159  %div3 = fdiv double %sub, %mul
160  %cmp = fcmp uge double %div, 0x3EB0C6F7A0B5ED8D
161  %cmp4 = fcmp uge double %div3, 0x3EB0C6F7A0B5ED8D
162  %not.or.cond = or i1 %cmp4, %cmp
163  ret i1 %not.or.cond
164}
165