1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -simplifycfg -mtriple=thumbv8.1m.main -mattr=+mve < %s | FileCheck %s --check-prefix=CHECK-MVE
3; RUN: opt -S -simplifycfg -mtriple=thumbv8m.main < %s | FileCheck %s --check-prefix=CHECK-V8M-MAIN
4; RUN: opt -S -simplifycfg -mtriple=thumbv8m.base < %s | FileCheck %s --check-prefix=CHECK-V8M-BASE
5
6declare float @llvm.sqrt.f32(float) nounwind readonly
7declare float @llvm.fma.f32(float, float, float) nounwind readonly
8declare float @llvm.fmuladd.f32(float, float, float) nounwind readonly
9declare float @llvm.fabs.f32(float) nounwind readonly
10declare float @llvm.minnum.f32(float, float) nounwind readonly
11declare float @llvm.maxnum.f32(float, float) nounwind readonly
12declare float @llvm.minimum.f32(float, float) nounwind readonly
13declare float @llvm.maximum.f32(float, float) nounwind readonly
14
15define double @fdiv_test(double %a, double %b) {
16; CHECK-MVE-LABEL: @fdiv_test(
17; CHECK-MVE-NEXT:  entry:
18; CHECK-MVE-NEXT:    [[CMP:%.*]] = fcmp ogt double [[A:%.*]], 0.000000e+00
19; CHECK-MVE-NEXT:    [[DIV:%.*]] = fdiv double [[B:%.*]], [[A]]
20; CHECK-MVE-NEXT:    [[COND:%.*]] = select nsz i1 [[CMP]], double [[DIV]], double 0.000000e+00
21; CHECK-MVE-NEXT:    ret double [[COND]]
22;
23; CHECK-V8M-MAIN-LABEL: @fdiv_test(
24; CHECK-V8M-MAIN-NEXT:  entry:
25; CHECK-V8M-MAIN-NEXT:    [[CMP:%.*]] = fcmp ogt double [[A:%.*]], 0.000000e+00
26; CHECK-V8M-MAIN-NEXT:    [[DIV:%.*]] = fdiv double [[B:%.*]], [[A]]
27; CHECK-V8M-MAIN-NEXT:    [[COND:%.*]] = select nsz i1 [[CMP]], double [[DIV]], double 0.000000e+00
28; CHECK-V8M-MAIN-NEXT:    ret double [[COND]]
29;
30; CHECK-V8M-BASE-LABEL: @fdiv_test(
31; CHECK-V8M-BASE-NEXT:  entry:
32; CHECK-V8M-BASE-NEXT:    [[CMP:%.*]] = fcmp ogt double [[A:%.*]], 0.000000e+00
33; CHECK-V8M-BASE-NEXT:    [[DIV:%.*]] = fdiv double [[B:%.*]], [[A]]
34; CHECK-V8M-BASE-NEXT:    [[COND:%.*]] = select nsz i1 [[CMP]], double [[DIV]], double 0.000000e+00
35; CHECK-V8M-BASE-NEXT:    ret double [[COND]]
36;
37entry:
38  %cmp = fcmp ogt double %a, 0.0
39  br i1 %cmp, label %cond.true, label %cond.end
40
41cond.true:
42  %div = fdiv double %b, %a
43  br label %cond.end
44
45cond.end:
46  %cond = phi nsz double [ %div, %cond.true ], [ 0.0, %entry ]
47  ret double %cond
48}
49
50define void @sqrt_test(float addrspace(1)* noalias nocapture %out, float %a) nounwind {
51; CHECK-MVE-LABEL: @sqrt_test(
52; CHECK-MVE-NEXT:  entry:
53; CHECK-MVE-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
54; CHECK-MVE-NEXT:    [[TMP0:%.*]] = tail call float @llvm.sqrt.f32(float [[A]]) #3
55; CHECK-MVE-NEXT:    [[COND_I:%.*]] = select afn i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
56; CHECK-MVE-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
57; CHECK-MVE-NEXT:    ret void
58;
59; CHECK-V8M-MAIN-LABEL: @sqrt_test(
60; CHECK-V8M-MAIN-NEXT:  entry:
61; CHECK-V8M-MAIN-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
62; CHECK-V8M-MAIN-NEXT:    [[TMP0:%.*]] = tail call float @llvm.sqrt.f32(float [[A]]) #2
63; CHECK-V8M-MAIN-NEXT:    [[COND_I:%.*]] = select afn i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
64; CHECK-V8M-MAIN-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
65; CHECK-V8M-MAIN-NEXT:    ret void
66;
67; CHECK-V8M-BASE-LABEL: @sqrt_test(
68; CHECK-V8M-BASE-NEXT:  entry:
69; CHECK-V8M-BASE-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
70; CHECK-V8M-BASE-NEXT:    [[TMP0:%.*]] = tail call float @llvm.sqrt.f32(float [[A]]) #2
71; CHECK-V8M-BASE-NEXT:    [[COND_I:%.*]] = select afn i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
72; CHECK-V8M-BASE-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
73; CHECK-V8M-BASE-NEXT:    ret void
74;
75entry:
76  %cmp.i = fcmp olt float %a, 0.000000e+00
77  br i1 %cmp.i, label %test_sqrt.exit, label %cond.else.i
78
79cond.else.i:                                      ; preds = %entry
80  %0 = tail call float @llvm.sqrt.f32(float %a) nounwind readnone
81  br label %test_sqrt.exit
82
83test_sqrt.exit:                                   ; preds = %cond.else.i, %entry
84  %cond.i = phi afn float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
85  store float %cond.i, float addrspace(1)* %out, align 4
86  ret void
87}
88
89define void @fabs_test(float addrspace(1)* noalias nocapture %out, float %a) nounwind {
90; CHECK-MVE-LABEL: @fabs_test(
91; CHECK-MVE-NEXT:  entry:
92; CHECK-MVE-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
93; CHECK-MVE-NEXT:    [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[A]]) #3
94; CHECK-MVE-NEXT:    [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
95; CHECK-MVE-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
96; CHECK-MVE-NEXT:    ret void
97;
98; CHECK-V8M-MAIN-LABEL: @fabs_test(
99; CHECK-V8M-MAIN-NEXT:  entry:
100; CHECK-V8M-MAIN-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
101; CHECK-V8M-MAIN-NEXT:    [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[A]]) #2
102; CHECK-V8M-MAIN-NEXT:    [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
103; CHECK-V8M-MAIN-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
104; CHECK-V8M-MAIN-NEXT:    ret void
105;
106; CHECK-V8M-BASE-LABEL: @fabs_test(
107; CHECK-V8M-BASE-NEXT:  entry:
108; CHECK-V8M-BASE-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
109; CHECK-V8M-BASE-NEXT:    [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[A]]) #2
110; CHECK-V8M-BASE-NEXT:    [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
111; CHECK-V8M-BASE-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
112; CHECK-V8M-BASE-NEXT:    ret void
113;
114entry:
115  %cmp.i = fcmp olt float %a, 0.000000e+00
116  br i1 %cmp.i, label %test_fabs.exit, label %cond.else.i
117
118cond.else.i:                                      ; preds = %entry
119  %0 = tail call float @llvm.fabs.f32(float %a) nounwind readnone
120  br label %test_fabs.exit
121
122test_fabs.exit:                                   ; preds = %cond.else.i, %entry
123  %cond.i = phi reassoc float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
124  store float %cond.i, float addrspace(1)* %out, align 4
125  ret void
126}
127
128define void @fma_test(float addrspace(1)* noalias nocapture %out, float %a, float %b, float %c) nounwind {
129; CHECK-MVE-LABEL: @fma_test(
130; CHECK-MVE-NEXT:  entry:
131; CHECK-MVE-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
132; CHECK-MVE-NEXT:    [[TMP0:%.*]] = tail call float @llvm.fma.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #3
133; CHECK-MVE-NEXT:    [[COND_I:%.*]] = select reassoc nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
134; CHECK-MVE-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
135; CHECK-MVE-NEXT:    ret void
136;
137; CHECK-V8M-MAIN-LABEL: @fma_test(
138; CHECK-V8M-MAIN-NEXT:  entry:
139; CHECK-V8M-MAIN-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
140; CHECK-V8M-MAIN-NEXT:    [[TMP0:%.*]] = tail call float @llvm.fma.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2
141; CHECK-V8M-MAIN-NEXT:    [[COND_I:%.*]] = select reassoc nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
142; CHECK-V8M-MAIN-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
143; CHECK-V8M-MAIN-NEXT:    ret void
144;
145; CHECK-V8M-BASE-LABEL: @fma_test(
146; CHECK-V8M-BASE-NEXT:  entry:
147; CHECK-V8M-BASE-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
148; CHECK-V8M-BASE-NEXT:    [[TMP0:%.*]] = tail call float @llvm.fma.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2
149; CHECK-V8M-BASE-NEXT:    [[COND_I:%.*]] = select reassoc nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
150; CHECK-V8M-BASE-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
151; CHECK-V8M-BASE-NEXT:    ret void
152;
153entry:
154  %cmp.i = fcmp olt float %a, 0.000000e+00
155  br i1 %cmp.i, label %test_fma.exit, label %cond.else.i
156
157cond.else.i:                                      ; preds = %entry
158  %0 = tail call float @llvm.fma.f32(float %a, float %b, float %c) nounwind readnone
159  br label %test_fma.exit
160
161test_fma.exit:                                   ; preds = %cond.else.i, %entry
162  %cond.i = phi nsz reassoc float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
163  store float %cond.i, float addrspace(1)* %out, align 4
164  ret void
165}
166
167define void @fmuladd_test(float addrspace(1)* noalias nocapture %out, float %a, float %b, float %c) nounwind {
168; CHECK-MVE-LABEL: @fmuladd_test(
169; CHECK-MVE-NEXT:  entry:
170; CHECK-MVE-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
171; CHECK-MVE-NEXT:    [[TMP0:%.*]] = tail call float @llvm.fmuladd.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #3
172; CHECK-MVE-NEXT:    [[COND_I:%.*]] = select ninf i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
173; CHECK-MVE-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
174; CHECK-MVE-NEXT:    ret void
175;
176; CHECK-V8M-MAIN-LABEL: @fmuladd_test(
177; CHECK-V8M-MAIN-NEXT:  entry:
178; CHECK-V8M-MAIN-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
179; CHECK-V8M-MAIN-NEXT:    [[TMP0:%.*]] = tail call float @llvm.fmuladd.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2
180; CHECK-V8M-MAIN-NEXT:    [[COND_I:%.*]] = select ninf i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
181; CHECK-V8M-MAIN-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
182; CHECK-V8M-MAIN-NEXT:    ret void
183;
184; CHECK-V8M-BASE-LABEL: @fmuladd_test(
185; CHECK-V8M-BASE-NEXT:  entry:
186; CHECK-V8M-BASE-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
187; CHECK-V8M-BASE-NEXT:    [[TMP0:%.*]] = tail call float @llvm.fmuladd.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2
188; CHECK-V8M-BASE-NEXT:    [[COND_I:%.*]] = select ninf i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
189; CHECK-V8M-BASE-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
190; CHECK-V8M-BASE-NEXT:    ret void
191;
192entry:
193  %cmp.i = fcmp olt float %a, 0.000000e+00
194  br i1 %cmp.i, label %test_fmuladd.exit, label %cond.else.i
195
196cond.else.i:                                      ; preds = %entry
197  %0 = tail call float @llvm.fmuladd.f32(float %a, float %b, float %c) nounwind readnone
198  br label %test_fmuladd.exit
199
200test_fmuladd.exit:                                   ; preds = %cond.else.i, %entry
201  %cond.i = phi ninf float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
202  store float %cond.i, float addrspace(1)* %out, align 4
203  ret void
204}
205
206define void @minnum_test(float addrspace(1)* noalias nocapture %out, float %a, float %b) nounwind {
207; CHECK-MVE-LABEL: @minnum_test(
208; CHECK-MVE-NEXT:  entry:
209; CHECK-MVE-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
210; CHECK-MVE-NEXT:    [[TMP0:%.*]] = tail call float @llvm.minnum.f32(float [[A]], float [[B:%.*]]) #3
211; CHECK-MVE-NEXT:    [[COND_I:%.*]] = select i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
212; CHECK-MVE-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
213; CHECK-MVE-NEXT:    ret void
214;
215; CHECK-V8M-MAIN-LABEL: @minnum_test(
216; CHECK-V8M-MAIN-NEXT:  entry:
217; CHECK-V8M-MAIN-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
218; CHECK-V8M-MAIN-NEXT:    [[TMP0:%.*]] = tail call float @llvm.minnum.f32(float [[A]], float [[B:%.*]]) #2
219; CHECK-V8M-MAIN-NEXT:    [[COND_I:%.*]] = select i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
220; CHECK-V8M-MAIN-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
221; CHECK-V8M-MAIN-NEXT:    ret void
222;
223; CHECK-V8M-BASE-LABEL: @minnum_test(
224; CHECK-V8M-BASE-NEXT:  entry:
225; CHECK-V8M-BASE-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
226; CHECK-V8M-BASE-NEXT:    [[TMP0:%.*]] = tail call float @llvm.minnum.f32(float [[A]], float [[B:%.*]]) #2
227; CHECK-V8M-BASE-NEXT:    [[COND_I:%.*]] = select i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
228; CHECK-V8M-BASE-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
229; CHECK-V8M-BASE-NEXT:    ret void
230;
231entry:
232  %cmp.i = fcmp olt float %a, 0.000000e+00
233  br i1 %cmp.i, label %test_minnum.exit, label %cond.else.i
234
235cond.else.i:                                      ; preds = %entry
236  %0 = tail call float @llvm.minnum.f32(float %a, float %b) nounwind readnone
237  br label %test_minnum.exit
238
239test_minnum.exit:                                   ; preds = %cond.else.i, %entry
240  %cond.i = phi float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
241  store float %cond.i, float addrspace(1)* %out, align 4
242  ret void
243}
244
245define void @maxnum_test(float addrspace(1)* noalias nocapture %out, float %a, float %b) nounwind {
246; CHECK-MVE-LABEL: @maxnum_test(
247; CHECK-MVE-NEXT:  entry:
248; CHECK-MVE-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
249; CHECK-MVE-NEXT:    [[TMP0:%.*]] = tail call float @llvm.maxnum.f32(float [[A]], float [[B:%.*]]) #3
250; CHECK-MVE-NEXT:    [[COND_I:%.*]] = select ninf nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
251; CHECK-MVE-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
252; CHECK-MVE-NEXT:    ret void
253;
254; CHECK-V8M-MAIN-LABEL: @maxnum_test(
255; CHECK-V8M-MAIN-NEXT:  entry:
256; CHECK-V8M-MAIN-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
257; CHECK-V8M-MAIN-NEXT:    [[TMP0:%.*]] = tail call float @llvm.maxnum.f32(float [[A]], float [[B:%.*]]) #2
258; CHECK-V8M-MAIN-NEXT:    [[COND_I:%.*]] = select ninf nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
259; CHECK-V8M-MAIN-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
260; CHECK-V8M-MAIN-NEXT:    ret void
261;
262; CHECK-V8M-BASE-LABEL: @maxnum_test(
263; CHECK-V8M-BASE-NEXT:  entry:
264; CHECK-V8M-BASE-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
265; CHECK-V8M-BASE-NEXT:    [[TMP0:%.*]] = tail call float @llvm.maxnum.f32(float [[A]], float [[B:%.*]]) #2
266; CHECK-V8M-BASE-NEXT:    [[COND_I:%.*]] = select ninf nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
267; CHECK-V8M-BASE-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
268; CHECK-V8M-BASE-NEXT:    ret void
269;
270entry:
271  %cmp.i = fcmp olt float %a, 0.000000e+00
272  br i1 %cmp.i, label %test_maxnum.exit, label %cond.else.i
273
274cond.else.i:                                      ; preds = %entry
275  %0 = tail call float @llvm.maxnum.f32(float %a, float %b) nounwind readnone
276  br label %test_maxnum.exit
277
278test_maxnum.exit:                                   ; preds = %cond.else.i, %entry
279  %cond.i = phi ninf nsz float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
280  store float %cond.i, float addrspace(1)* %out, align 4
281  ret void
282}
283
284define void @minimum_test(float addrspace(1)* noalias nocapture %out, float %a, float %b) nounwind {
285; CHECK-MVE-LABEL: @minimum_test(
286; CHECK-MVE-NEXT:  entry:
287; CHECK-MVE-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
288; CHECK-MVE-NEXT:    [[TMP0:%.*]] = tail call float @llvm.minimum.f32(float [[A]], float [[B:%.*]]) #3
289; CHECK-MVE-NEXT:    [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
290; CHECK-MVE-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
291; CHECK-MVE-NEXT:    ret void
292;
293; CHECK-V8M-MAIN-LABEL: @minimum_test(
294; CHECK-V8M-MAIN-NEXT:  entry:
295; CHECK-V8M-MAIN-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
296; CHECK-V8M-MAIN-NEXT:    [[TMP0:%.*]] = tail call float @llvm.minimum.f32(float [[A]], float [[B:%.*]]) #2
297; CHECK-V8M-MAIN-NEXT:    [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
298; CHECK-V8M-MAIN-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
299; CHECK-V8M-MAIN-NEXT:    ret void
300;
301; CHECK-V8M-BASE-LABEL: @minimum_test(
302; CHECK-V8M-BASE-NEXT:  entry:
303; CHECK-V8M-BASE-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
304; CHECK-V8M-BASE-NEXT:    [[TMP0:%.*]] = tail call float @llvm.minimum.f32(float [[A]], float [[B:%.*]]) #2
305; CHECK-V8M-BASE-NEXT:    [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
306; CHECK-V8M-BASE-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
307; CHECK-V8M-BASE-NEXT:    ret void
308;
309entry:
310  %cmp.i = fcmp olt float %a, 0.000000e+00
311  br i1 %cmp.i, label %test_minimum.exit, label %cond.else.i
312
313cond.else.i:                                      ; preds = %entry
314  %0 = tail call float @llvm.minimum.f32(float %a, float %b) nounwind readnone
315  br label %test_minimum.exit
316
317test_minimum.exit:                                   ; preds = %cond.else.i, %entry
318  %cond.i = phi reassoc float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
319  store float %cond.i, float addrspace(1)* %out, align 4
320  ret void
321}
322
323define void @maximum_test(float addrspace(1)* noalias nocapture %out, float %a, float %b) nounwind {
324; CHECK-MVE-LABEL: @maximum_test(
325; CHECK-MVE-NEXT:  entry:
326; CHECK-MVE-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
327; CHECK-MVE-NEXT:    [[TMP0:%.*]] = tail call float @llvm.maximum.f32(float [[A]], float [[B:%.*]]) #3
328; CHECK-MVE-NEXT:    [[COND_I:%.*]] = select nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
329; CHECK-MVE-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
330; CHECK-MVE-NEXT:    ret void
331;
332; CHECK-V8M-MAIN-LABEL: @maximum_test(
333; CHECK-V8M-MAIN-NEXT:  entry:
334; CHECK-V8M-MAIN-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
335; CHECK-V8M-MAIN-NEXT:    [[TMP0:%.*]] = tail call float @llvm.maximum.f32(float [[A]], float [[B:%.*]]) #2
336; CHECK-V8M-MAIN-NEXT:    [[COND_I:%.*]] = select nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
337; CHECK-V8M-MAIN-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
338; CHECK-V8M-MAIN-NEXT:    ret void
339;
340; CHECK-V8M-BASE-LABEL: @maximum_test(
341; CHECK-V8M-BASE-NEXT:  entry:
342; CHECK-V8M-BASE-NEXT:    [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
343; CHECK-V8M-BASE-NEXT:    [[TMP0:%.*]] = tail call float @llvm.maximum.f32(float [[A]], float [[B:%.*]]) #2
344; CHECK-V8M-BASE-NEXT:    [[COND_I:%.*]] = select nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
345; CHECK-V8M-BASE-NEXT:    store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
346; CHECK-V8M-BASE-NEXT:    ret void
347;
348entry:
349  %cmp.i = fcmp olt float %a, 0.000000e+00
350  br i1 %cmp.i, label %test_maximum.exit, label %cond.else.i
351
352cond.else.i:                                      ; preds = %entry
353  %0 = tail call float @llvm.maximum.f32(float %a, float %b) nounwind readnone
354  br label %test_maximum.exit
355
356test_maximum.exit:                                   ; preds = %cond.else.i, %entry
357  %cond.i = phi nsz float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
358  store float %cond.i, float addrspace(1)* %out, align 4
359  ret void
360}
361