1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -simplifycfg -switch-to-lookup -mtriple=arm -relocation-model=static    < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ENABLE
3; RUN: opt -S -simplifycfg -switch-to-lookup -mtriple=arm -relocation-model=pic       < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ENABLE
4; RUN: opt -S -simplifycfg -switch-to-lookup -mtriple=arm -relocation-model=ropi      < %s | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLE
5; RUN: opt -S -simplifycfg -switch-to-lookup -mtriple=arm -relocation-model=rwpi      < %s | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLE
6; RUN: opt -S -simplifycfg -switch-to-lookup -mtriple=arm -relocation-model=ropi-rwpi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLE
7
8; RUN: opt -S -passes='simplify-cfg<switch-to-lookup>' -mtriple=arm -relocation-model=static    < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ENABLE
9; RUN: opt -S -passes='simplify-cfg<switch-to-lookup>' -mtriple=arm -relocation-model=pic       < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ENABLE
10; RUN: opt -S -passes='simplify-cfg<switch-to-lookup>' -mtriple=arm -relocation-model=ropi      < %s | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLE
11; RUN: opt -S -passes='simplify-cfg<switch-to-lookup>' -mtriple=arm -relocation-model=rwpi      < %s | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLE
12; RUN: opt -S -passes='simplify-cfg<switch-to-lookup>' -mtriple=arm -relocation-model=ropi-rwpi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLE
13
14; CHECK:       @{{.*}} = private unnamed_addr constant [3 x i32] [i32 1234, i32 5678, i32 15532]
15; ENABLE:      @{{.*}} = private unnamed_addr constant [3 x i32*] [i32* @c1, i32* @c2, i32* @c3]
16; DISABLE-NOT: @{{.*}} = private unnamed_addr constant [3 x i32*] [i32* @c1, i32* @c2, i32* @c3]
17; ENABLE:      @{{.*}} = private unnamed_addr constant [3 x i32*] [i32* @g1, i32* @g2, i32* @g3]
18; DISABLE-NOT: @{{.*}} = private unnamed_addr constant [3 x i32*] [i32* @g1, i32* @g2, i32* @g3]
19; ENABLE:      @{{.*}} = private unnamed_addr constant [3 x i32 (i32, i32)*] [i32 (i32, i32)* @f1, i32 (i32, i32)* @f2, i32 (i32, i32)* @f3]
20; DISABLE-NOT: @{{.*}} = private unnamed_addr constant [3 x i32 (i32, i32)*] [i32 (i32, i32)* @f1, i32 (i32, i32)* @f2, i32 (i32, i32)* @f3]
21
22target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
23target triple = "armv7a--none-eabi"
24
25define i32 @test1(i32 %n) {
26entry:
27  switch i32 %n, label %sw.default [
28  i32 0, label %sw.bb
29  i32 1, label %sw.bb1
30  i32 2, label %sw.bb2
31  ]
32
33sw.bb:
34  br label %return
35
36sw.bb1:
37  br label %return
38
39sw.bb2:
40  br label %return
41
42sw.default:
43  br label %return
44
45return:
46  %retval.0 = phi i32 [ 15498, %sw.default ], [ 15532, %sw.bb2 ], [ 5678, %sw.bb1 ], [ 1234, %sw.bb ]
47  ret i32 %retval.0
48}
49
50@c1 = external constant i32, align 4
51@c2 = external constant i32, align 4
52@c3 = external constant i32, align 4
53@c4 = external constant i32, align 4
54
55
56define i32* @test2(i32 %n) {
57entry:
58  switch i32 %n, label %sw.default [
59  i32 0, label %sw.bb
60  i32 1, label %sw.bb1
61  i32 2, label %sw.bb2
62  ]
63
64sw.bb:
65  br label %return
66
67sw.bb1:
68  br label %return
69
70sw.bb2:
71  br label %return
72
73sw.default:
74  br label %return
75
76return:
77  %retval.0 = phi i32* [ @c4, %sw.default ], [ @c3, %sw.bb2 ], [ @c2, %sw.bb1 ], [ @c1, %sw.bb ]
78  ret i32* %retval.0
79}
80
81@g1 = external global i32, align 4
82@g2 = external global i32, align 4
83@g3 = external global i32, align 4
84@g4 = external global i32, align 4
85
86define i32* @test3(i32 %n) {
87entry:
88  switch i32 %n, label %sw.default [
89  i32 0, label %sw.bb
90  i32 1, label %sw.bb1
91  i32 2, label %sw.bb2
92  ]
93
94sw.bb:
95  br label %return
96
97sw.bb1:
98  br label %return
99
100sw.bb2:
101  br label %return
102
103sw.default:
104  br label %return
105
106return:
107  %retval.0 = phi i32* [ @g4, %sw.default ], [ @g3, %sw.bb2 ], [ @g2, %sw.bb1 ], [ @g1, %sw.bb ]
108  ret i32* %retval.0
109}
110
111declare i32 @f1(i32, i32)
112declare i32 @f2(i32, i32)
113declare i32 @f3(i32, i32)
114declare i32 @f4(i32, i32)
115declare i32 @f5(i32, i32)
116
117define i32 @test4(i32 %a, i32 %b, i32 %c) {
118entry:
119  %cmp = icmp eq i32 %a, 1
120  br i1 %cmp, label %cond.end11, label %cond.false
121
122cond.false:
123  %cmp1 = icmp eq i32 %a, 2
124  br i1 %cmp1, label %cond.end11, label %cond.false3
125
126cond.false3:
127  %cmp4 = icmp eq i32 %a, 3
128  br i1 %cmp4, label %cond.end11, label %cond.false6
129
130cond.false6:
131  %cmp7 = icmp eq i32 %a, 4
132  %cond = select i1 %cmp7, i32 (i32, i32)* @f4, i32 (i32, i32)* @f5
133  br label %cond.end11
134
135cond.end11:
136  %cond12 = phi i32 (i32, i32)* [ @f1, %entry ], [ @f2, %cond.false ], [ %cond, %cond.false6 ], [ @f3, %cond.false3 ]
137  %call = call i32 %cond12(i32 %b, i32 %c) #2
138  ret i32 %call
139}
140