1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2# RUN: llvm-mca -mtriple=armv7-unknown-unknown -mcpu=swift -timeline -iterations=5 < %s | FileCheck %s 3 4# Register r1 is updated in one cycle by instruction vld1.32, so the add.w can 5# start one cycle later. 6 7add.w r1, r1, r12 8vld1.32 {d16, d17}, [r1]! 9 10# CHECK: Iterations: 5 11# CHECK-NEXT: Instructions: 10 12# CHECK-NEXT: Total Cycles: 16 13# CHECK-NEXT: Total uOps: 15 14 15# CHECK: Dispatch Width: 3 16# CHECK-NEXT: uOps Per Cycle: 0.94 17# CHECK-NEXT: IPC: 0.63 18# CHECK-NEXT: Block RThroughput: 1.0 19 20# CHECK: Instruction Info: 21# CHECK-NEXT: [1]: #uOps 22# CHECK-NEXT: [2]: Latency 23# CHECK-NEXT: [3]: RThroughput 24# CHECK-NEXT: [4]: MayLoad 25# CHECK-NEXT: [5]: MayStore 26# CHECK-NEXT: [6]: HasSideEffects (U) 27 28# CHECK: [1] [2] [3] [4] [5] [6] Instructions: 29# CHECK-NEXT: 1 1 0.50 add r1, r1, r12 30# CHECK-NEXT: 2 4 1.00 * vld1.32 {d16, d17}, [r1]! 31 32# CHECK: Resources: 33# CHECK-NEXT: [0] - SwiftUnitDiv 34# CHECK-NEXT: [1] - SwiftUnitP0 35# CHECK-NEXT: [2] - SwiftUnitP1 36# CHECK-NEXT: [3] - SwiftUnitP2 37# CHECK-NEXT: [4.0] - SwiftUnitP01 38# CHECK-NEXT: [4.1] - SwiftUnitP01 39 40# CHECK: Resource pressure per iteration: 41# CHECK-NEXT: [0] [1] [2] [3] [4.0] [4.1] 42# CHECK-NEXT: - - - 1.00 1.00 1.00 43 44# CHECK: Resource pressure by instruction: 45# CHECK-NEXT: [0] [1] [2] [3] [4.0] [4.1] Instructions: 46# CHECK-NEXT: - - - - - 1.00 add r1, r1, r12 47# CHECK-NEXT: - - - 1.00 1.00 - vld1.32 {d16, d17}, [r1]! 48 49# CHECK: Timeline view: 50# CHECK-NEXT: 012345 51# CHECK-NEXT: Index 0123456789 52 53# CHECK: [0,0] DeER . . . add r1, r1, r12 54# CHECK-NEXT: [0,1] D=eeeeER . . vld1.32 {d16, d17}, [r1]! 55# CHECK-NEXT: [1,0] .D=eE--R . . add r1, r1, r12 56# CHECK-NEXT: [1,1] .D==eeeeER. . vld1.32 {d16, d17}, [r1]! 57# CHECK-NEXT: [2,0] . D==eE--R. . add r1, r1, r12 58# CHECK-NEXT: [2,1] . D===eeeeER . vld1.32 {d16, d17}, [r1]! 59# CHECK-NEXT: [3,0] . D===eE--R . add r1, r1, r12 60# CHECK-NEXT: [3,1] . D====eeeeER . vld1.32 {d16, d17}, [r1]! 61# CHECK-NEXT: [4,0] . D====eE--R . add r1, r1, r12 62# CHECK-NEXT: [4,1] . D=====eeeeER vld1.32 {d16, d17}, [r1]! 63 64# CHECK: Average Wait times (based on the timeline view): 65# CHECK-NEXT: [0]: Executions 66# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue 67# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready 68# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage 69 70# CHECK: [0] [1] [2] [3] 71# CHECK-NEXT: 0. 5 3.0 0.2 1.6 add r1, r1, r12 72# CHECK-NEXT: 1. 5 4.0 0.0 0.0 vld1.32 {d16, d17}, [r1]! 73# CHECK-NEXT: 5 3.5 0.1 0.8 <total> 74