1; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s
2; RUN: opt %loadPolly -polly-function-scops -analyze < %s | FileCheck %s
3
4;void f(long a[][128], long N, long M) {
5;  long i, j;
6;  for (j = 0; j < (4*N + 7*M +3); ++j)
7;    for (i = j; i < (5*N + 2); ++i)
8;        ...
9;}
10
11target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
12
13define void @f([128 x i64]* nocapture %a, i64 %N, i64 %M) nounwind {
14entry:
15  %0 = shl i64 %N, 2                              ; <i64> [#uses=2]
16  %1 = mul i64 %M, 7                              ; <i64> [#uses=2]
17  %2 = or i64 %0, 3                               ; <i64> [#uses=1]
18  %3 = add nsw i64 %2, %1                         ; <i64> [#uses=1]
19  %4 = icmp sgt i64 %3, 0                         ; <i1> [#uses=1]
20  br i1 true, label %bb.nph8, label %return
21
22bb1:                                              ; preds = %bb2.preheader, %bb1
23  %indvar = phi i64 [ 0, %bb2.preheader ], [ %indvar.next, %bb1 ] ; <i64> [#uses=2]
24  %scevgep = getelementptr [128 x i64], [128 x i64]* %a, i64 %indvar, i64 %tmp10 ; <i64*> [#uses=1]
25  store i64 0, i64* %scevgep, align 8
26  %indvar.next = add i64 %indvar, 1               ; <i64> [#uses=2]
27  %exitcond = icmp sge i64 %indvar.next, %tmp9     ; <i1> [#uses=1]
28  br i1 %exitcond, label %bb3, label %bb1
29
30bb3:                                              ; preds = %bb2.preheader, %bb1
31  %5 = add i64 %8, 1                              ; <i64> [#uses=2]
32  %exitcond14 = icmp sge i64 %5, %tmp13            ; <i1> [#uses=1]
33  br i1 %exitcond14, label %return, label %bb2.preheader
34
35bb.nph8:                                          ; preds = %entry
36  %6 = mul i64 %N, 5                              ; <i64> [#uses=1]
37  %7 = add nsw i64 %6, 2                          ; <i64> [#uses=2]
38  %tmp12 = add i64 %1, %0                         ; <i64> [#uses=1]
39  %tmp13 = add i64 %tmp12, 3                      ; <i64> [#uses=1]
40  br label %bb2.preheader
41
42bb2.preheader:                                    ; preds = %bb.nph8, %bb3
43  %8 = phi i64 [ 0, %bb.nph8 ], [ %5, %bb3 ]      ; <i64> [#uses=4]
44  %tmp10 = mul i64 %8, 129                        ; <i64> [#uses=1]
45  %tmp9 = sub i64 %7, %8                          ; <i64> [#uses=1]
46  %9 = icmp sgt i64 %7, %8                        ; <i1> [#uses=1]
47  br i1 %9, label %bb1, label %bb3
48
49return:                                           ; preds = %bb3, %entry
50  ret void
51}
52
53
54; CHECK:      p0: %N
55; CHECK-NEXT: p1: %M
56;
57; CHECK:      Statements {
58; CHECK-NEXT:     Stmt_bb1
59; CHECK-NEXT:         Domain :=
60; CHECK-NEXT:             [N, M] -> { Stmt_bb1[i0, i1] : 0 <= i0 <= 2 + 4N + 7M and 0 <= i1 <= 1 + 5N - i0; Stmt_bb1[0, i1] : 7M <= -3 - 4N and 0 <= i1 <= 1 + 5N };
61; CHECK-NEXT:         Schedule :=
62; CHECK-NEXT:             [N, M] -> { Stmt_bb1[i0, i1] -> [i0, i1] : i0 <= 2 + 4N + 7M; Stmt_bb1[0, i1] -> [0, i1] : 7M <= -3 - 4N };
63; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
64; CHECK-NEXT:             [N, M] -> { Stmt_bb1[i0, i1] -> MemRef_a[i1, 129i0] };
65; CHECK-NEXT: }
66