1; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s
2;
3; Verify the scalar x defined in a non-affine subregion is written as it
4; escapes the region. In this test the two conditionals inside the region
5; are expressed as two PHI nodes with two incoming values each.
6;
7;    void f(int *A, int b) {
8;      for (int i = 0; i < 1024; i++) {
9;        int x = 0;
10;        if (A[i]) {
11;          if (b > i)
12;            x = 0;
13;          else if (b < 2 * i)
14;            x = i;
15;          else
16;            x = b;
17;        }
18;        A[i] = x;
19;      }
20;    }
21
22; CHECK-LABEL: Region: %bb2---%bb21
23;
24; CHECK:       Statements {
25; CHECK-NEXT:      Stmt_bb3__TO__bb18
26; CHECK-NEXT:          Domain :=
27; CHECK-NEXT:              { Stmt_bb3__TO__bb18[i0] : 0 <= i0 <= 1023 };
28; CHECK-NEXT:          Schedule :=
29; CHECK-NEXT:              { Stmt_bb3__TO__bb18[i0] -> [i0, 0] };
30; CHECK-NEXT:          ReadAccess :=    [Reduction Type: NONE] [Scalar: 0]
31; CHECK-NEXT:              { Stmt_bb3__TO__bb18[i0] -> MemRef_A[i0] };
32; CHECK-NEXT:          MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 1]
33; CHECK-NEXT:              { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] };
34; CHECK-NEXT:      Stmt_bb18
35; CHECK-NEXT:          Domain :=
36; CHECK-NEXT:              { Stmt_bb18[i0] : 0 <= i0 <= 1023 };
37; CHECK-NEXT:          Schedule :=
38; CHECK-NEXT:              { Stmt_bb18[i0] -> [i0, 1] };
39; CHECK-NEXT:          ReadAccess :=    [Reduction Type: NONE] [Scalar: 1]
40; CHECK-NEXT:              { Stmt_bb18[i0] -> MemRef_x_2__phi[] };
41; CHECK-NEXT:          MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
42; CHECK-NEXT:              { Stmt_bb18[i0] -> MemRef_A[i0] };
43; CHECK-NEXT:  }
44
45target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
46
47define void @f(i32* %A, i32 %b) {
48bb:
49  %tmp = sext i32 %b to i64
50  %tmp1 = sext i32 %b to i64
51  br label %bb2
52
53bb2:                                              ; preds = %bb20, %bb
54  %indvars.iv = phi i64 [ %indvars.iv.next, %bb20 ], [ 0, %bb ]
55  %exitcond = icmp ne i64 %indvars.iv, 1024
56  br i1 %exitcond, label %bb3, label %bb21
57
58bb3:                                              ; preds = %bb2
59  %tmp4 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
60  %tmp5 = load i32,  i32* %tmp4, align 4
61  %tmp6 = icmp eq i32 %tmp5, 0
62  br i1 %tmp6, label %bb18, label %bb7
63
64bb7:                                              ; preds = %bb3
65  %tmp8 = icmp slt i64 %indvars.iv, %tmp
66  br i1 %tmp8, label %bb9, label %bb10
67
68bb9:                                              ; preds = %bb7
69  br label %bb17
70
71bb10:                                             ; preds = %bb7
72  %tmp11 = shl nsw i64 %indvars.iv, 1
73  %tmp12 = icmp sgt i64 %tmp11, %tmp1
74  br i1 %tmp12, label %bb13, label %bb15
75
76bb13:                                             ; preds = %bb10
77  %tmp14 = trunc i64 %indvars.iv to i32
78  br label %bb16
79
80bb15:                                             ; preds = %bb10
81  br label %bb16
82
83bb16:                                             ; preds = %bb15, %bb13
84  %x.0 = phi i32 [ %tmp14, %bb13 ], [ %b, %bb15 ]
85  br label %bb17
86
87bb17:                                             ; preds = %bb16, %bb9
88  %x.1 = phi i32 [ 0, %bb9 ], [ %x.0, %bb16 ]
89  br label %bb18
90
91bb18:                                             ; preds = %bb3, %bb17
92  %x.2 = phi i32 [ %x.1, %bb17 ], [ 0, %bb3 ]
93  %tmp19 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
94  store i32 %x.2, i32* %tmp19, align 4
95  br label %bb20
96
97bb20:                                             ; preds = %bb18
98  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
99  br label %bb2
100
101bb21:                                             ; preds = %bb2
102  ret void
103}
104