1; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s
2; RUN: opt %loadPolly -polly-function-scops -analyze < %s | FileCheck %s
3;
4; Verify the scalar x defined in a non-affine subregion is written as it
5; escapes the region. In this test the two conditionals inside the region
6; are expressed as one PHI nodes with three incoming values.
7;
8;    void f(int *A, int b) {
9;      for (int i = 0; i < 1024; i++) {
10;        int x = 0;
11;        if (A[i]) {
12;          if (b > i)
13;            x = 0;
14;          else if (b < 2 * i)
15;            x = i;
16;          else
17;            x = b;
18;        }
19;        A[i] = x;
20;      }
21;    }
22
23; CHECK-LABEL: Region: %bb2---%bb21
24;
25; CHECK:       Statements {
26; CHECK-NEXT:      Stmt_bb3__TO__bb18
27; CHECK-NEXT:          Domain :=
28; CHECK-NEXT:              { Stmt_bb3__TO__bb18[i0] : 0 <= i0 <= 1023 };
29; CHECK-NEXT:          Schedule :=
30; CHECK-NEXT:              { Stmt_bb3__TO__bb18[i0] -> [i0, 0] };
31; CHECK-NEXT:          ReadAccess :=    [Reduction Type: NONE] [Scalar: 0]
32; CHECK-NEXT:              { Stmt_bb3__TO__bb18[i0] -> MemRef_A[i0] };
33; CHECK-NEXT:          MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 1]
34; CHECK-NEXT:              { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] };
35; CHECK-NEXT:      Stmt_bb18
36; CHECK-NEXT:          Domain :=
37; CHECK-NEXT:              { Stmt_bb18[i0] : 0 <= i0 <= 1023 };
38; CHECK-NEXT:          Schedule :=
39; CHECK-NEXT:              { Stmt_bb18[i0] -> [i0, 1] };
40; CHECK-NEXT:          ReadAccess :=    [Reduction Type: NONE] [Scalar: 1]
41; CHECK-NEXT:              { Stmt_bb18[i0] -> MemRef_x_2__phi[] };
42; CHECK-NEXT:          MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
43; CHECK-NEXT:              { Stmt_bb18[i0] -> MemRef_A[i0] };
44; CHECK-NEXT:  }
45
46target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
47
48define void @f(i32* %A, i32 %b) {
49bb:
50  %tmp = sext i32 %b to i64
51  %tmp1 = sext i32 %b to i64
52  br label %bb2
53
54bb2:                                              ; preds = %bb20, %bb
55  %indvars.iv = phi i64 [ %indvars.iv.next, %bb20 ], [ 0, %bb ]
56  %exitcond = icmp ne i64 %indvars.iv, 1024
57  br i1 %exitcond, label %bb3, label %bb21
58
59bb3:                                              ; preds = %bb2
60  %tmp4 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
61  %tmp5 = load i32,  i32* %tmp4, align 4
62  %tmp6 = icmp eq i32 %tmp5, 0
63  br i1 %tmp6, label %bb18, label %bb7
64
65bb7:                                              ; preds = %bb3
66  %tmp8 = icmp slt i64 %indvars.iv, %tmp
67  br i1 %tmp8, label %bb9, label %bb10
68
69bb9:                                              ; preds = %bb7
70  br label %bb18
71
72bb10:                                             ; preds = %bb7
73  %tmp11 = shl nsw i64 %indvars.iv, 1
74  %tmp12 = icmp sgt i64 %tmp11, %tmp1
75  br i1 %tmp12, label %bb13, label %bb15
76
77bb13:                                             ; preds = %bb10
78  %tmp14 = trunc i64 %indvars.iv to i32
79  br label %bb18
80
81bb15:                                             ; preds = %bb10
82  br label %bb18
83
84bb18:                                             ; preds = %bb3, %bb13, %bb15, %bb9
85  %x.2 = phi i32 [ 0, %bb9 ], [ %tmp14, %bb13 ], [ %b, %bb15 ], [ 0, %bb3 ]
86  %tmp19 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
87  store i32 %x.2, i32* %tmp19, align 4
88  br label %bb20
89
90bb20:                                             ; preds = %bb18
91  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
92  br label %bb2
93
94bb21:                                             ; preds = %bb2
95  ret void
96}
97