1; RUN: opt %loadPolly -polly-scops  -analyze < %s | FileCheck %s
2;
3; Verify that both scalars (x and y) are properly written in the non-affine
4; region and read afterwards.
5;
6;    void f(int *A, int b) {
7;      for (int i = 0; i < 1024; i++) {
8;        int x = 0, y = 0;
9;        if ((x = 1 + A[i]))
10;          y++;
11;        A[i] = x + y;
12;      }
13;    }
14
15; CHECK-LABEL: Region: %bb1---%bb11
16;
17; CHECK:       Arrays {
18; CHECK-NEXT:      i32 MemRef_A[*]; // Element size 4
19; CHECK-NEXT:      i32 MemRef_y__phi; // Element size 4
20; CHECK-NEXT:      i32 MemRef_x; // Element size 4
21; CHECK-NEXT:  }
22;
23; CHECK:       Arrays (Bounds as pw_affs) {
24; CHECK-NEXT:      i32 MemRef_A[*]; // Element size 4
25; CHECK-NEXT:      i32 MemRef_y__phi; // Element size 4
26; CHECK-NEXT:      i32 MemRef_x; // Element size 4
27; CHECK-NEXT:  }
28;
29; CHECK:       Statements {
30; CHECK-NEXT:      Stmt_bb2__TO__bb7
31; CHECK-NEXT:          Domain :=
32; CHECK-NEXT:              { Stmt_bb2__TO__bb7[i0] : 0 <= i0 <= 1023 };
33; CHECK-NEXT:          Schedule :=
34; CHECK-NEXT:              { Stmt_bb2__TO__bb7[i0] -> [i0, 0] };
35; CHECK-NEXT:          ReadAccess :=    [Reduction Type: NONE] [Scalar: 0]
36; CHECK-NEXT:              { Stmt_bb2__TO__bb7[i0] -> MemRef_A[i0] };
37; CHECK-NEXT:          MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 1]
38; CHECK-NEXT:              { Stmt_bb2__TO__bb7[i0] -> MemRef_y__phi[] };
39; CHECK-NEXT:          MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 1]
40; CHECK-NEXT:              { Stmt_bb2__TO__bb7[i0] -> MemRef_x[] };
41; CHECK-NEXT:      Stmt_bb7
42; CHECK-NEXT:          Domain :=
43; CHECK-NEXT:              { Stmt_bb7[i0] : 0 <= i0 <= 1023 };
44; CHECK-NEXT:          Schedule :=
45; CHECK-NEXT:              { Stmt_bb7[i0] -> [i0, 1] };
46; CHECK-NEXT:          ReadAccess :=    [Reduction Type: NONE] [Scalar: 1]
47; CHECK-NEXT:              { Stmt_bb7[i0] -> MemRef_y__phi[] };
48; CHECK-NEXT:          ReadAccess :=    [Reduction Type: NONE] [Scalar: 1]
49; CHECK-NEXT:              { Stmt_bb7[i0] -> MemRef_x[] };
50; CHECK-NEXT:          MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
51; CHECK-NEXT:              { Stmt_bb7[i0] -> MemRef_A[i0] };
52; CHECK-NEXT:  }
53
54target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
55
56define void @f(i32* %A, i32 %b) {
57bb:
58  br label %bb1
59
60bb1:                                              ; preds = %bb10, %bb
61  %indvars.iv = phi i64 [ %indvars.iv.next, %bb10 ], [ 0, %bb ]
62  %exitcond = icmp ne i64 %indvars.iv, 1024
63  br i1 %exitcond, label %bb2, label %bb11
64
65bb2:                                              ; preds = %bb1
66  %tmp = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
67  %x = load i32,  i32* %tmp, align 4
68  %tmp4 = add nsw i32 %x, 1
69  %tmp5 = icmp eq i32 %tmp4, 0
70  br i1 %tmp5, label %bb7, label %bb6
71
72bb6:                                              ; preds = %bb2
73  br label %bb7
74
75bb7:                                              ; preds = %bb2, %bb6
76  %y = phi i32 [ 1, %bb6 ], [ 0, %bb2 ]
77  %tmp4copy = add nsw i32 %x, 1
78  %tmp8 = add nsw i32 %tmp4copy, %y
79  %tmp9 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
80  store i32 %tmp8, i32* %tmp9, align 4
81  br label %bb10
82
83bb10:                                             ; preds = %bb7
84  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
85  br label %bb1
86
87bb11:                                             ; preds = %bb1
88  ret void
89}
90